* Add FEC support for TQM8540 board.
Interfaces are named as follows: "ENET1" - TSEC2, "ENET2" - FEC * Patch by Martin Krause, 04 Apr 2005: Update default configuration for CMC_PU2 board.
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wdenk
parent
8aa1a2d115
commit
3dd7f0f0ca
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@ -2,6 +2,12 @@
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Changes for U-Boot 1.1.3:
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======================================================================
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* Add FEC support for TQM8540 board.
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Interfaces are named as follows: "ENET1" - TSEC2, "ENET2" - FEC
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* Patch by Martin Krause, 04 Apr 2005:
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Update default configuration for CMC_PU2 board.
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* Patch by Steven Scholz, 04 Apr 2005:
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- remove all references to CONFIG_INIT_CRITICAL for ARM based boards
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- introduce two new configuration options instead:
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@ -277,7 +277,21 @@ static int init_phy(struct eth_device *dev)
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struct phy_info *curphy;
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/* Assign a Physical address to the TBI */
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priv->regs->tbipa=TBIPA_VALUE;
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{
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volatile tsec_t *regs = (volatile tsec_t *)(TSEC_BASE_ADDR);
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regs->tbipa = TBIPA_VALUE;
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regs = (volatile tsec_t *)(TSEC_BASE_ADDR + TSEC_SIZE);
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regs->tbipa = TBIPA_VALUE;
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asm("msync");
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}
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/* Reset MII (due to new addresses) */
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priv->phyregs->miimcfg = MIIMCFG_RESET;
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asm("msync");
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priv->phyregs->miimcfg = MIIMCFG_INIT_VALUE;
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asm("msync");
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while(priv->phyregs->miimind & MIIMIND_BUSY);
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if(0 == relocated)
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relocate_cmds();
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@ -793,19 +807,50 @@ struct phy_info phy_info_dm9161 = {
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},
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};
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uint mii_parse_lxt971_sr2(uint mii_reg, struct tsec_private *priv)
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{
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unsigned int speed;
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if (priv->link) {
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speed = mii_reg & MIIM_LXT971_SR2_SPEED_MASK;
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switch (speed) {
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case MIIM_LXT971_SR2_10HDX:
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priv->speed = 10;
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priv->duplexity = 0;
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break;
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case MIIM_LXT971_SR2_10FDX:
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priv->speed = 10;
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priv->duplexity = 1;
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break;
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case MIIM_LXT971_SR2_100HDX:
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priv->speed = 100;
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priv->duplexity = 0;
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default:
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priv->speed = 100;
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priv->duplexity = 1;
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break;
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}
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} else {
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priv->speed = 0;
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priv->duplexity = 0;
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}
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return 0;
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}
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static struct phy_info phy_info_lxt971 = {
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0x0001378e,
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"LXT971",
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4,
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(struct phy_cmd []) { /* config */
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{ MIIM_CONTROL, MIIM_CONTROL_INIT, mii_cr_init }, /* autonegotiate */
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{ MIIM_CR, MIIM_CR_INIT, mii_cr_init }, /* autonegotiate */
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{ miim_end, }
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},
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(struct phy_cmd []) { /* startup - enable interrupts */
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/* { 0x12, 0x00f2, NULL }, */
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{ 0x14, 0xd422, NULL }, /* LED config */
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{ MIIM_STATUS, miim_read, NULL },
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{ MIIM_STATUS, miim_read, mii_parse_sr },
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{ MIIM_STATUS, miim_read, &mii_parse_sr },
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{ MIIM_LXT971_SR2, miim_read, &mii_parse_lxt971_sr2 },
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{ miim_end, }
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},
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(struct phy_cmd []) { /* shutdown - disable interrupts */
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@ -142,6 +142,14 @@
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#define MIIM_DM9161_10BTCSR 0x12
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#define MIIM_DM9161_10BTCSR_INIT 0x7800
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/* LXT971 Status 2 registers */
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#define MIIM_LXT971_SR2 17 /* Status Register 2 */
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#define MIIM_LXT971_SR2_SPEED_MASK 0xf000
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#define MIIM_LXT971_SR2_10HDX 0x1000 /* 10 Mbit half duplex selected */
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#define MIIM_LXT971_SR2_10FDX 0x2000 /* 10 Mbit full duplex selected */
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#define MIIM_LXT971_SR2_100HDX 0x4000 /* 100 Mbit half duplex selected */
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#define MIIM_LXT971_SR2_100FDX 0x8000 /* 100 Mbit full duplex selected */
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#define MIIM_READ_COMMAND 0x00000001
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#define MRBLR_INIT_SETTINGS PKTSIZE_ALIGN
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@ -291,7 +291,7 @@
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#define TSEC1_PHYIDX 0
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#define TSEC2_PHYIDX 0
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#undef CONFIG_MPC85XX_FEC
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#define CONFIG_MPC85XX_FEC 1
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#define FEC_PHY_ADDR 0
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#define FEC_PHYIDX 0
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@ -140,14 +140,13 @@
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#define PHYS_SDRAM 0x20000000
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#define PHYS_SDRAM_SIZE 0x1000000 /* 16 megs */
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#define CFG_MEMTEST_START PHYS_SDRAM
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#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
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#define CFG_MEMTEST_START PHYS_SDRAM
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#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
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#define CONFIG_DRIVER_ETHER
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#define CONFIG_NET_RETRY_COUNT 20
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#define CONFIG_AT91C_USE_RMII
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#define CONFIG_HAS_DATAFLASH 1
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#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
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#define CFG_MAX_DATAFLASH_BANKS 2
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#define CFG_MAX_DATAFLASH_PAGES 16384
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@ -206,4 +205,48 @@ struct bd_info_ext {
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#error CONFIG_USE_IRQ not supported
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#endif
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#define CFG_DEVICE_NULLDEV 1 /* enble null device */
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#define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
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#define CONFIG_AUTOBOOT_KEYED
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#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n"
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#define CONFIG_AUTOBOOT_STOP_STR "R" /* default password */
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#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"net_nfs=tftp $(loadaddr) $(bootfile);run nfsargs addip addcons " \
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"addmtd;bootm\0" \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=$(serverip):$(rootpath)\0" \
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"net_cramfs=tftp $(loadaddr) $(bootfile); run flashargs addip " \
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"addcons addmtd; bootm\0" \
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"flash_cramfs=run flashargs addip addcons addmtd; bootm 10030000\0" \
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"flashargs=setenv bootargs root=/dev/mtdblock3 ro\0" \
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"addip=setenv bootargs $(bootargs) ethaddr=$(ethaddr) " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \
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"$(hostname)::off\0" \
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"addcons=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0" \
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"addmtd=setenv bootargs $(bootargs) mtdparts=cmc_pu2:128k(uboot)ro," \
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"64k(environment),768k(linux),4096k(root),-\0" \
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"load=tftp $(loadaddr) $(loadfile)\0" \
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"update=protect off 10000000 1001ffff;erase 10000000 1001ffff; " \
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"cp.b $(loadaddr) 10000000 $(filesize);" \
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"protect on 10000000 1001ffff\0" \
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"updatel=era 10030000 100effff;tftp $(loadaddr) $(bootfile); " \
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"cp.b $(loadaddr) 10030000 $(filesize)\0" \
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"updatec=era 100f0000 104effff;tftp $(loadaddr) $(cramfsimage); " \
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"cp.b $(loadaddr) 100f0000 $(filesize)\0" \
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"updatej=era 104f0000 107fffff;tftp $(loadaddr) $(jffsimage); " \
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"cp.b $(loadaddr) 104f0000 $(filesize)\0" \
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"cramfsimage=cramfs_cmc-pu2.img\0" \
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"jffsimage=jffs2_cmc-pu2.img\0" \
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"loadfile=u-boot_cmc-pu2.bin\0" \
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"bootfile=uImage_cmc-pu2\0" \
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"loadaddr=0x20800000\0" \
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"hostname=CMC-TC-PU2\0" \
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"bootcmd=run dhcp_start;run flash_cramfs\0" \
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"autoload=n\0" \
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"dhcp_start=echo no DHCP\0" \
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"ipaddr=192.168.0.190\0"
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#endif /* __CONFIG_H */
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