usb: ehci-hcd: port periodic transactions implementation from the u-boot
Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Peter Mamonov
Sascha Hauer
parent
8165f3131c
commit
4350744bf5
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@ -48,6 +48,19 @@ struct ehci_priv {
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int (*init)(void *drvdata);
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int (*post_init)(void *drvdata);
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void *drvdata;
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int periodic_schedules;
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struct QH *periodic_queue;
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uint32_t *periodic_list;
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};
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struct int_queue {
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int elementsize;
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int queuesize;
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unsigned long pipe;
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struct QH *first;
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struct QH *current;
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struct QH *last;
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struct qTD *tds;
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};
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#define to_ehci(ptr) container_of(ptr, struct ehci_priv, host)
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@ -768,6 +781,8 @@ static int ehci_init(struct usb_host *host)
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uint32_t reg;
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uint32_t cmd;
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int ret = 0;
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struct QH *periodic;
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int i;
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ehci_halt(ehci);
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@ -793,6 +808,44 @@ static int ehci_init(struct usb_host *host)
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/* Set async. queue head pointer. */
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ehci_writel(&ehci->hcor->or_asynclistaddr, (uint32_t)ehci->qh_list);
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/*
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* Set up periodic list
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* Step 1: Parent QH for all periodic transfers.
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*/
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ehci->periodic_schedules = 0;
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periodic = ehci->periodic_queue;
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memset(periodic, 0, sizeof(*periodic));
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periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
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periodic->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
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periodic->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
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/*
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* Step 2: Setup frame-list: Every microframe, USB tries the same list.
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* In particular, device specifications on polling frequency
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* are disregarded. Keyboards seem to send NAK/NYet reliably
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* when polled with an empty buffer.
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*
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* Split Transactions will be spread across microframes using
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* S-mask and C-mask.
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*/
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if (ehci->periodic_list == NULL)
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/*
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* FIXME: this memory chunk have to be 4k aligned AND
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* reside in coherent memory. Current implementation of
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* dma_alloc_coherent() allocates PAGE_SIZE aligned memory chunks.
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* PAGE_SIZE less then 4k will break this code.
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*/
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ehci->periodic_list = dma_alloc_coherent(1024 * 4,
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DMA_ADDRESS_BROKEN);
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for (i = 0; i < 1024; i++) {
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ehci->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
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| QH_LINK_TYPE_QH);
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}
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/* Set periodic list base address */
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ehci_writel(&ehci->hcor->or_periodiclistbase,
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(unsigned long)ehci->periodic_list);
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reg = ehci_readl(&ehci->hccr->cr_hcsparams);
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descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
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@ -863,16 +916,361 @@ submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
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return ehci_submit_async(dev, pipe, buffer, length, setup);
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}
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static int
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disable_periodic(struct ehci_priv *ehci)
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{
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uint32_t cmd;
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struct ehci_hcor *hcor = ehci->hcor;
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int ret;
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cmd = ehci_readl(&hcor->or_usbcmd);
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cmd &= ~CMD_PSE;
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ehci_writel(&hcor->or_usbcmd, cmd);
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ret = handshake((uint32_t *)&hcor->or_usbsts,
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STS_PSS, 0, 100 * 1000);
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if (ret < 0) {
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printf("EHCI failed: timeout when disabling periodic list\n");
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return -ETIMEDOUT;
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}
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return 0;
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}
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#define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
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static int
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enable_periodic(struct ehci_priv *ehci)
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{
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uint32_t cmd;
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struct ehci_hcor *hcor = ehci->hcor;
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int ret;
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cmd = ehci_readl(&hcor->or_usbcmd);
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cmd |= CMD_PSE;
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ehci_writel(&hcor->or_usbcmd, cmd);
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ret = handshake((uint32_t *)&hcor->or_usbsts,
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STS_PSS, STS_PSS, 100 * 1000);
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if (ret < 0) {
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printf("EHCI failed: timeout when enabling periodic list\n");
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return -ETIMEDOUT;
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}
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mdelay_non_interruptible(1);
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return 0;
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}
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static inline u8 ehci_encode_speed(enum usb_device_speed speed)
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{
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#define QH_HIGH_SPEED 2
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#define QH_FULL_SPEED 0
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#define QH_LOW_SPEED 1
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if (speed == USB_SPEED_HIGH)
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return QH_HIGH_SPEED;
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if (speed == USB_SPEED_LOW)
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return QH_LOW_SPEED;
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return QH_FULL_SPEED;
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}
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static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
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struct QH *qh)
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{
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struct usb_device *ttdev;
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int parent_devnum;
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if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
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return;
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/*
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* For full / low speed devices we need to get the devnum and portnr of
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* the tt, so of the first upstream usb-2 hub, there may be usb-1 hubs
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* in the tree before that one!
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*/
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ttdev = udev;
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while (ttdev->parent && ttdev->parent->speed != USB_SPEED_HIGH)
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ttdev = ttdev->parent;
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if (!ttdev->parent)
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return;
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parent_devnum = ttdev->parent->devnum;
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qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(ttdev->portnr) |
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QH_ENDPT2_HUBADDR(parent_devnum));
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}
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static struct int_queue *ehci_create_int_queue(struct usb_device *dev,
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unsigned long pipe, int queuesize, int elementsize,
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void *buffer, int interval)
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{
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struct usb_host *host = dev->host;
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struct ehci_priv *ehci = to_ehci(host);
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struct int_queue *result = NULL;
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uint32_t i, toggle;
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struct QH *list = ehci->periodic_queue;
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/*
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* Interrupt transfers requiring several transactions are not supported
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* because bInterval is ignored.
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*
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* Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
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* <= PKT_ALIGN if several qTDs are required, while the USB
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* specification does not constrain this for interrupt transfers. That
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* means that ehci_submit_async() would support interrupt transfers
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* requiring several transactions only as long as the transfer size does
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* not require more than a single qTD.
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*/
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if (elementsize > usb_maxpacket(dev, pipe)) {
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dev_err(&dev->dev,
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"%s: xfers requiring several transactions are not supported.\n",
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__func__);
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return NULL;
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}
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debug("Enter create_int_queue\n");
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if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
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dev_dbg(&dev->dev,
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"non-interrupt pipe (type=%lu)",
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usb_pipetype(pipe));
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return NULL;
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}
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/* limit to 4 full pages worth of data -
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* we can safely fit them in a single TD,
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* no matter the alignment
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*/
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if (elementsize >= 16384) {
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dev_dbg(&dev->dev,
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"too large elements for interrupt transfers\n");
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return NULL;
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}
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result = xzalloc(sizeof(*result));
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result->elementsize = elementsize;
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result->queuesize = queuesize;
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result->pipe = pipe;
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result->first = dma_alloc_coherent(sizeof(struct QH) * queuesize,
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DMA_ADDRESS_BROKEN);
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result->current = result->first;
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result->last = result->first + queuesize - 1;
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result->tds = dma_alloc_coherent(sizeof(struct qTD) * queuesize,
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DMA_ADDRESS_BROKEN);
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memset(result->first, 0, sizeof(struct QH) * queuesize);
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memset(result->tds, 0, sizeof(struct qTD) * queuesize);
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toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
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for (i = 0; i < queuesize; i++) {
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struct QH *qh = result->first + i;
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struct qTD *td = result->tds + i;
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void **buf = &qh->buffer;
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qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
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if (i == queuesize - 1)
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qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
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qh->qt_next = cpu_to_hc32((unsigned long)td);
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qh->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
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qh->qh_endpt1 =
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cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
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(usb_maxpacket(dev, pipe) << 16) | /* MPS */
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(1 << 14) |
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QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
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(usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
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(usb_pipedevice(pipe) << 0));
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qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
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(1 << 0)); /* S-mask: microframe 0 */
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if (dev->speed == USB_SPEED_LOW ||
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dev->speed == USB_SPEED_FULL) {
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/* C-mask: microframes 2-4 */
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qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
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}
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ehci_update_endpt2_dev_n_port(dev, qh);
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td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
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td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
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dev_dbg(&dev->dev,
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"communication direction is '%s'\n",
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usb_pipein(pipe) ? "in" : "out");
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td->qt_token = cpu_to_hc32(
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QT_TOKEN_DT(toggle) |
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(elementsize << 16) |
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((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
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0x80); /* active */
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td->qt_buffer[0] =
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cpu_to_hc32((unsigned long)buffer + i * elementsize);
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td->qt_buffer[1] =
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cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
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td->qt_buffer[2] =
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cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
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td->qt_buffer[3] =
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cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
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td->qt_buffer[4] =
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cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
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*buf = buffer + i * elementsize;
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toggle ^= 1;
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}
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if (ehci->periodic_schedules > 0) {
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if (disable_periodic(ehci) < 0) {
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dev_err(&dev->dev,
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"FATAL: periodic should never fail, but did");
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goto fail3;
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}
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}
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/* hook up to periodic list */
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result->last->qh_link = list->qh_link;
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list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
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if (enable_periodic(ehci) < 0) {
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dev_err(&dev->dev,
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"FATAL: periodic should never fail, but did");
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goto fail3;
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}
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ehci->periodic_schedules++;
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dev_dbg(&dev->dev, "Exit create_int_queue\n");
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return result;
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fail3:
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dma_free_coherent(result->tds, 0, sizeof(struct qTD) * queuesize);
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dma_free_coherent(result->first, 0, sizeof(struct QH) * queuesize);
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free(result);
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return NULL;
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}
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static void *ehci_poll_int_queue(struct usb_device *dev,
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struct int_queue *queue)
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{
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struct QH *cur = queue->current;
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struct qTD *cur_td;
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uint32_t token, toggle;
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unsigned long pipe = queue->pipe;
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/* depleted queue */
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if (cur == NULL) {
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dev_dbg(&dev->dev, "Exit poll_int_queue with completed queue\n");
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return NULL;
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}
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/* still active */
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cur_td = &queue->tds[queue->current - queue->first];
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token = hc32_to_cpu(cur_td->qt_token);
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if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
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dev_dbg(&dev->dev,
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"Exit poll_int_queue with no completed intr transfer. token is %x\n",
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token);
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return NULL;
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}
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toggle = QT_TOKEN_GET_DT(token);
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usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
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if (!(cur->qh_link & QH_LINK_TERMINATE))
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queue->current++;
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else
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queue->current = NULL;
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dev_dbg(&dev->dev,
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"Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
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token, cur, queue->first);
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return cur->buffer;
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}
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static int ehci_destroy_int_queue(struct usb_device *dev,
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struct int_queue *queue)
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{
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int result = -EINVAL;
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struct usb_host *host = dev->host;
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struct ehci_priv *ehci = to_ehci(host);
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struct QH *cur = ehci->periodic_queue;
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uint64_t start;
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if (disable_periodic(ehci) < 0) {
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dev_err(&dev->dev,
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"FATAL: periodic should never fail, but did\n");
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goto out;
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}
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ehci->periodic_schedules--;
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start = get_time_ns();
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while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
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dev_dbg(&dev->dev,
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"considering %p, with qh_link %x\n",
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cur, cur->qh_link);
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if (NEXT_QH(cur) == queue->first) {
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dev_dbg(&dev->dev,
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"found candidate. removing from chain\n");
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cur->qh_link = queue->last->qh_link;
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result = 0;
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break;
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}
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cur = NEXT_QH(cur);
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if (is_timeout_non_interruptible(start, 500 * MSECOND)) {
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dev_err(&dev->dev,
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"Timeout destroying interrupt endpoint queue\n");
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result = -ETIMEDOUT;
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goto out;
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}
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}
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if (ehci->periodic_schedules > 0) {
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result = enable_periodic(ehci);
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if (result < 0)
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dev_err(&dev->dev,
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"FATAL: periodic should never fail, but did");
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}
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out:
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dma_free_coherent(queue->tds, 0, sizeof(struct qTD) * queue->queuesize);
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dma_free_coherent(queue->first, 0, sizeof(struct QH) * queue->queuesize);
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free(queue);
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return result;
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}
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static int
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submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
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int length, int interval)
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{
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struct usb_host *host = dev->host;
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struct ehci_priv *ehci = to_ehci(host);
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struct int_queue *queue;
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uint64_t start;
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void *backbuffer;
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int result = 0, ret;
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dev_dbg(ehci->dev, "dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
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dev, pipe, buffer, length, interval);
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return -1;
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dma_sync_single_for_device((unsigned long)buffer, length,
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DMA_BIDIRECTIONAL);
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queue = ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
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if (!queue)
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return -EINVAL;
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start = get_time_ns();
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while ((backbuffer = ehci_poll_int_queue(dev, queue)) == NULL)
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if (is_timeout_non_interruptible(start,
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USB_CNTL_TIMEOUT * MSECOND)) {
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dev_err(&dev->dev,
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"Timeout poll on interrupt endpoint\n");
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result = -ETIMEDOUT;
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break;
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}
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if (backbuffer != buffer) {
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dev_err(&dev->dev,
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"got wrong buffer back (%p instead of %p)\n",
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backbuffer, buffer);
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if (!result)
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result = -EINVAL;
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}
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dma_sync_single_for_cpu((unsigned long)buffer, length,
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DMA_BIDIRECTIONAL);
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ret = ehci_destroy_int_queue(dev, queue);
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if (!result)
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result = ret;
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return result;
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}
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static int ehci_detect(struct device_d *dev)
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@ -907,6 +1305,8 @@ int ehci_register(struct device_d *dev, struct ehci_data *data)
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ehci->qh_list = dma_alloc_coherent(sizeof(struct QH) * NUM_TD,
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DMA_ADDRESS_BROKEN);
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ehci->periodic_queue = dma_alloc_coherent(sizeof(struct QH),
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DMA_ADDRESS_BROKEN);
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ehci->td = dma_alloc_coherent(sizeof(struct qTD) * NUM_TD,
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DMA_ADDRESS_BROKEN);
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@ -20,6 +20,15 @@
|
|||
|
||||
#include <io.h>
|
||||
|
||||
#define QH_ENDPT1_EPS(x) (((x) & 0x3) << 12) /* Endpoint Speed */
|
||||
#define QH_ENDPT2_PORTNUM(x) (((x) & 0x7f) << 23) /* Port Number */
|
||||
#define QH_ENDPT2_HUBADDR(x) (((x) & 0x7f) << 16) /* Hub Address */
|
||||
|
||||
#define QT_TOKEN_DT(x) (((x) & 0x1) << 31) /* Data Toggle */
|
||||
#define QT_TOKEN_GET_STATUS(x) (((x) >> 0) & 0xff)
|
||||
#define QT_TOKEN_STATUS_ACTIVE 0x80
|
||||
#define QT_TOKEN_GET_DT(x) (((x) >> 31) & 0x1)
|
||||
|
||||
#if !defined(CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS)
|
||||
#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 16
|
||||
#endif
|
||||
|
|
@ -51,6 +60,7 @@ struct ehci_hcor {
|
|||
#define CMD_RUN (1 << 0) /* start/stop HC */
|
||||
uint32_t or_usbsts;
|
||||
#define STD_ASS (1 << 15)
|
||||
#define STS_PSS (1 << 14)
|
||||
#define STS_HALT (1 << 12)
|
||||
uint32_t or_usbintr;
|
||||
uint32_t or_frindex;
|
||||
|
|
@ -148,7 +158,10 @@ struct QH {
|
|||
* Add dummy fill value to make the size of this struct
|
||||
* aligned to 32 bytes
|
||||
*/
|
||||
uint8_t fill[16];
|
||||
union {
|
||||
uint8_t fill[16];
|
||||
void* buffer;
|
||||
};
|
||||
};
|
||||
|
||||
#endif /* USB_EHCI_H */
|
||||
|
|
|
|||
Loading…
Reference in New Issue