ARM: rpi: fix reading of the EMMC clock for CONFIG_MMU
Add explicit flushing to prevent the 50MHz fallback. Signed-off-by: Andre Heider <a.heider@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -28,6 +28,7 @@
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* Author: Wilhelm Lundgren <wilhelm.lundgren@cybercom.com>
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* Author: Wilhelm Lundgren <wilhelm.lundgren@cybercom.com>
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*/
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*/
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#include <asm/mmu.h>
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#include <common.h>
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#include <common.h>
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#include <init.h>
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#include <init.h>
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#include <mci.h>
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#include <mci.h>
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@ -471,7 +472,7 @@ int bcm2835_mci_reset(struct mci_host *mci, struct device_d *mci_dev)
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static u32 bcm2835_mci_get_emmc_clock(struct msg_get_clock_rate *clk_data)
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static u32 bcm2835_mci_get_emmc_clock(struct msg_get_clock_rate *clk_data)
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{
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{
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u32 val;
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u32 val;
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struct bcm2835_mbox_regs *regs =
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struct bcm2835_mbox_regs __iomem *regs =
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(struct bcm2835_mbox_regs *) BCM2835_MBOX_PHYSADDR;
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(struct bcm2835_mbox_regs *) BCM2835_MBOX_PHYSADDR;
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/*Read out old msg*/
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/*Read out old msg*/
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@ -489,6 +490,7 @@ static u32 bcm2835_mci_get_emmc_clock(struct msg_get_clock_rate *clk_data)
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break;
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break;
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}
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}
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val = BCM2835_MBOX_PROP_CHAN + ((u32) &clk_data->hdr);
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val = BCM2835_MBOX_PROP_CHAN + ((u32) &clk_data->hdr);
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dma_flush_range((u32)clk_data, (u32)clk_data + sizeof(*clk_data));
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writel(val, ®s->write);
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writel(val, ®s->write);
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while (true) {
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while (true) {
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@ -504,6 +506,9 @@ static u32 bcm2835_mci_get_emmc_clock(struct msg_get_clock_rate *clk_data)
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if ((val & 0x0F) == BCM2835_MBOX_PROP_CHAN)
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if ((val & 0x0F) == BCM2835_MBOX_PROP_CHAN)
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break;
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break;
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}
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}
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dma_inv_range((u32)clk_data, (u32)clk_data + sizeof(*clk_data));
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if ((val & ~0x0F) == ((u32) &clk_data->hdr))
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if ((val & ~0x0F) == ((u32) &clk_data->hdr))
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if (clk_data->get_clock_rate.tag_hdr.val_len
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if (clk_data->get_clock_rate.tag_hdr.val_len
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& BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)
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& BCM2835_MBOX_TAG_VAL_LEN_RESPONSE)
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