diff --git a/arch/arm/dts/am335x-gsmk-owhw.dts b/arch/arm/dts/am335x-gsmk-owhw.dts
index 5114a268b..47e223d3b 100644
--- a/arch/arm/dts/am335x-gsmk-owhw.dts
+++ b/arch/arm/dts/am335x-gsmk-owhw.dts
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2015 Harald Welte <laforge@gnumonks.org>
+ * Copyright (C) 2015-2016 Harald Welte <laforge@gnumonks.org>
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 as
@@ -12,7 +12,7 @@
 #include "am335x-phytec-phycore-som.dtsi"
 
 / {
-	model = "GSMK OWHW";
+	model = "GSMK OWHW v2";
 	compatible = "gsmk,owhw", "phytec,phycore-am335x-som", "phytec,am335x-som", "ti,am33xx";
 
 	buttons: user_buttons {
@@ -123,6 +123,71 @@
 			default_attempts = <3>;
 		};
 	};
+
+	i2c_gpio {
+		compatible = "i2c-gpio";
+		gpios = <&gpio1 31 GPIO_ACTIVE_HIGH /* sda */
+			 &gpio1 16 GPIO_ACTIVE_HIGH /* scl */
+			>;
+		i2c-gpio,sda-open-drain;
+		i2c-gpio,scl-open-drain;
+		i2c-gpio,delay-us = <20>;	/* ~10 kHz */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&i2c_gpio_pins>;
+		status = "okay";
+
+		ltc4274@20 {
+			compatible = "ltc4275";
+			reg = <0x20>;
+		};
+	};
+
+	switch_mdio {
+		compatible = "virtual,mdio-gpio";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&switch_mdio_pins>;
+		/* order: MDC, MDIO */
+		gpios = <&gpio1 19
+			 &gpio1 21>;
+		status = "okay";
+	};
+
+	spi_gpio {
+		compatible = "spi-gpio";
+
+		pinctrl-names = "default";
+		pinctrl-0 = <&spi1_gpio_pins>;
+
+		status = "okay";
+		gpio-sck = <&gpio3 14 0>;
+		gpio-mosi = <&gpio3 16 0>;
+		gpio-miso = <&gpio3 15 0>;
+		cs-gpios = <&gpio3 21 0>;
+		num-chipselects = <1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		eeprom_baseboard: m95m02@0 {
+			compatible = "st,m95m02", "atmel,at25";
+			size = <262144>;
+			pagesize = <256>;
+			address-width = <24>;
+			spi-max-frequency = <5000000>;
+			reg = <0>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			status = "okay";
+
+			partition@0 {
+				label = "state";
+				reg = <0xc0 0x40>; /* last 0x40 bytes for eeprom */
+			};
+		};
+	};
 };
 
 &nand {
@@ -140,8 +205,6 @@
 
 &i2c0_pins {
 	pinctrl-single,pins = <
-		/* EEPROM_WP */
-		0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)  /* gpmc_a3.gpio1_19 */
 		0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_sda.i2c0_sda */
 		0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    /* i2c0_scl.i2c0_scl */
 	>;
@@ -211,8 +274,6 @@
 
 	pse_pins: pinmux_pse_pins {
 		pinctrl-single,pins = <
-			/* PSE_I2C_BUF_EN: 1_16 */
-			0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* (R13) gpmc_a0.gpio1[16] */
 			/* !PSE_INT: 1_20 */
 			0x50 (PIN_INPUT | MUX_MODE7)		/* (R14) gpmc_a4.gpio1[20] */
 		>;
@@ -238,22 +299,34 @@
 			0x64 (PIN_INPUT_PULLUP | MUX_MODE7)	/* (U16) gpmc_a9.gpio1[25] */
 		>;
 	};
-};
 
-&i2c0 {
-	eeprom_baseboard: 24cm02@50 {
-		status = "okay";
-		compatible = "atmel,24cm02";
-		pagesize = <256>;
-		reg = <0x50>;
-		wp-gpios = <&gpio1 19 0>;
-		#address-cells = <1>;
-		#size-cells = <1>;
+	i2c_gpio_pins: pinmux_i2c_gpio {
+		pinctrl-single,pins = <
+			/* I2C_S_SCL: 1_16 */
+			0x40 (PIN_OUTPUT_PULLUP | PIN_INPUT_PULLUP | MUX_MODE7)	/* (R13) gpmc_a0.gpio1[16] */
+			/* I2C_S_SDA: 1_31 */
+			0x84 (PIN_OUTPUT_PULLUP | PIN_INPUT_PULLUP | MUX_MODE7)	/* (V9) gpmc_csn2.gpio1[31] */
+		>;
+	};
 
-		partition@0 {
-			label = "state";
-			reg = <0xc0 0x40>; /* last 0x40 bytes for eeprom */
-		};
+	spi1_gpio_pins: pinmux_spi1_gpio {
+		pinctrl-single,pins = <
+			/* EEPROM_WP */
+			0x1a8 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* (D13) mcasp0_axr1.gpio3_20 */
+			0x190 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* (A13) mcasp0_aclkx.spi1_sclk */
+			0x194 (PIN_INPUT_PULLUP | MUX_MODE7)	/* (B13) mcasp0_fsx.spi1_d0 */
+			0x198 (PIN_INPUT_PULLDOWN | MUX_MODE7)	/* (D12) mcasp0_axr0.spi1_d1 */
+			0x1AC (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* (A14) mcasp0_ahclkx.gpio3_21 */
+		>;
+	};
+
+	switch_mdio_pins: pinmux_mdio_gpio {
+		pinctrl-single,pins = <
+			/* ETH_MDC: 1_19 */
+			0x4c (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* (T14) gpmc_a3.gpio1[19] */
+			/* ETH_MDIO: 1_21 */
+			0x54 (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* (V15) gpmc_a5.gpio1[21] */
+		>;
 	};
 };
 
@@ -265,3 +338,7 @@
 &usb0_phy {
 	status = "okay";
 };
+
+&spi0 {
+	status = "okay";
+};