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mips: qemu-malta: add little-endian mode support 

We can't just enable SYS_SUPPORTS_LITTLE_ENDIAN for successful
little-endian qemu-malta barebox build. Some byte swapping-related
macros are missed, e.g.:

    arch/mips/mach-malta/pci.c: In function 'pcibios_init':
    arch/mips/mach-malta/pci.c:218:28: error: 'GT_PCI0_CMD_MBYTESWAP_BIT'
    undeclared (first use in this function)
    GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
                              ^

This patch adds necessary macros definition.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Antony Pavlov 2014-10-10 00:08:56 +04:00 committed by Sascha Hauer
parent 11632790da
commit 4764384549
2 changed files with 8 additions and 0 deletions
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1
arch/mips/Kconfig
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@ -43,6 +43,7 @@ config MACH_MIPS_MALTA
select SYS_HAS_CPU_MIPS32_R2
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_BIG_ENDIAN
select SYS_SUPPORTS_LITTLE_ENDIAN
select HAS_DEBUG_LL
select GPIOLIB
select HW_HAS_PCI

7
arch/mips/include/asm/gt64120.h
View File

@ -76,6 +76,13 @@
#define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF)
#define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK
#define GT_PCI0_CMD_MBYTESWAP_SHF 0
#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF)
#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK
#define GT_PCI0_CMD_SBYTESWAP_SHF 16
#define GT_PCI0_CMD_SBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF)
#define GT_PCI0_CMD_SBYTESWAP_BIT GT_PCI0_CMD_SBYTESWAP_MSK
/*
* Because of an error/peculiarity in the Galileo chip, we need to swap the
* bytes when running bigendian. We also provide non-swapping versions.