ARM: MXS: Make gpio a driver
This turns the MXS gpio support into a driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
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2a0f2d46fd
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478ea1c0b1
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@ -120,6 +120,7 @@ config ARCH_MVEBU
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config ARCH_MXS
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bool "Freescale i.MX23/28 (mxs) based"
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select GPIOLIB
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select GENERIC_GPIO
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select COMMON_CLK
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select CLKDEV_LOOKUP
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@ -75,12 +75,6 @@ static unsigned calc_output_reg(unsigned no)
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return ((no >> 5) << 4) + HW_PINCTRL_DOUT0;
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}
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static unsigned calc_input_reg(unsigned no)
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{
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/* each register controls 32 pads */
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return ((no >> 5) << 4) + HW_PINCTRL_DIN0;
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}
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/**
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* @param[in] m One pin define per call from iomux-mx23.h/iomux-mx28.h
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*/
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@ -168,57 +162,3 @@ void imx_gpio_mode(uint32_t m)
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}
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}
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}
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int gpio_direction_input(unsigned gpio)
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{
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unsigned reg_offset;
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if (gpio > MAX_GPIO_NO)
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return -EINVAL;
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reg_offset = calc_output_enable_reg(gpio);
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writel(0x1 << (gpio % 32), IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_CLR);
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return 0;
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}
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int gpio_direction_output(unsigned gpio, int val)
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{
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unsigned reg_offset;
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if (gpio > MAX_GPIO_NO)
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return -EINVAL;
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/* first set the output value... */
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reg_offset = calc_output_reg(gpio);
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writel(0x1 << (gpio % 32), IMX_IOMUXC_BASE +
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reg_offset + (val != 0 ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR));
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/* ...then the direction */
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reg_offset = calc_output_enable_reg(gpio);
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writel(0x1 << (gpio % 32), IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_SET);
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return 0;
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}
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void gpio_set_value(unsigned gpio, int val)
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{
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unsigned reg_offset;
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reg_offset = calc_output_reg(gpio);
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writel(0x1 << (gpio % 32), IMX_IOMUXC_BASE +
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reg_offset + (val != 0 ?
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STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR));
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}
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int gpio_get_value(unsigned gpio)
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{
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uint32_t reg;
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unsigned reg_offset;
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reg_offset = calc_input_reg(gpio);
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reg = readl(IMX_IOMUXC_BASE + reg_offset);
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if (reg & (0x1 << (gpio % 32)))
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return 1;
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return 0;
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}
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@ -43,6 +43,9 @@ static int imx23_devices_init(void)
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add_generic_device("imx23-dma-apbh", 0, NULL, MXS_APBH_BASE, 0x2000, IORESOURCE_MEM, NULL);
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add_generic_device("imx23-clkctrl", 0, NULL, IMX_CCM_BASE, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx23-gpio", 0, NULL, IMX_IOMUXC_BASE, 0x2000, IORESOURCE_MEM, NULL);
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add_generic_device("imx23-gpio", 1, NULL, IMX_IOMUXC_BASE, 0x2000, IORESOURCE_MEM, NULL);
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add_generic_device("imx23-gpio", 2, NULL, IMX_IOMUXC_BASE, 0x2000, IORESOURCE_MEM, NULL);
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return 0;
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}
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@ -61,6 +61,11 @@ static int imx28_devices_init(void)
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add_generic_device("imx28-dma-apbh", 0, NULL, MXS_APBH_BASE, 0x2000, IORESOURCE_MEM, NULL);
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add_generic_device("imx28-clkctrl", 0, NULL, IMX_CCM_BASE, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx28-gpio", 0, NULL, IMX_IOMUXC_BASE, 0x2000, IORESOURCE_MEM, NULL);
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add_generic_device("imx28-gpio", 1, NULL, IMX_IOMUXC_BASE, 0x2000, IORESOURCE_MEM, NULL);
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add_generic_device("imx28-gpio", 2, NULL, IMX_IOMUXC_BASE, 0x2000, IORESOURCE_MEM, NULL);
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add_generic_device("imx28-gpio", 3, NULL, IMX_IOMUXC_BASE, 0x2000, IORESOURCE_MEM, NULL);
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add_generic_device("imx28-gpio", 4, NULL, IMX_IOMUXC_BASE, 0x2000, IORESOURCE_MEM, NULL);
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return 0;
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}
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@ -41,6 +41,9 @@ config GPIO_GENERIC_PLATFORM
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config GPIO_IMX
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def_bool ARCH_IMX
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config GPIO_MXS
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def_bool ARCH_MXS
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config GPIO_JZ4740
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bool "GPIO support for Ingenic SoCs"
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depends on MACH_MIPS_XBURST
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@ -6,6 +6,7 @@ obj-$(CONFIG_GPIO_CLPS711X) += gpio-clps711x.o
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obj-$(CONFIG_GPIO_DIGIC) += gpio-digic.o
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obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
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obj-$(CONFIG_GPIO_IMX) += gpio-imx.o
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obj-$(CONFIG_GPIO_MXS) += gpio-mxs.o
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obj-$(CONFIG_GPIO_JZ4740) += gpio-jz4740.o
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obj-$(CONFIG_GPIO_MALTA_FPGA_I2C) += gpio-malta-fpga-i2c.o
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obj-$(CONFIG_GPIO_ORION) += gpio-orion.o
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@ -0,0 +1,186 @@
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/*
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* Freescale MXS gpio support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <errno.h>
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#include <io.h>
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#include <of.h>
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#include <gpio.h>
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#include <init.h>
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#include <stmp-device.h>
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#include <linux/err.h>
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struct mxs_gpio_chip {
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void __iomem *base;
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void __iomem *din;
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void __iomem *doe;
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void __iomem *dout;
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struct gpio_chip chip;
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struct mxs_gpio_regs *regs;
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};
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struct mxs_gpio_regs {
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unsigned int din;
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unsigned int doe;
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unsigned int dout;
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};
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static struct mxs_gpio_regs regs_mxs23 = {
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.din = 0x0600,
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.dout = 0x0500,
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.doe = 0x0700,
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};
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static struct mxs_gpio_regs regs_mxs28 = {
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.din = 0x0900,
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.dout = 0x0700,
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.doe = 0x0b00,
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};
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static void mxs_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
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{
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struct mxs_gpio_chip *mxsgpio = container_of(chip, struct mxs_gpio_chip, chip);
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if (value)
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writel(0x1 << gpio, mxsgpio->dout + STMP_OFFSET_REG_SET);
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else
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writel(0x1 << gpio, mxsgpio->dout + STMP_OFFSET_REG_CLR);
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}
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static int mxs_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
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{
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struct mxs_gpio_chip *mxsgpio = container_of(chip, struct mxs_gpio_chip, chip);
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writel(0x1 << gpio, mxsgpio->doe + STMP_OFFSET_REG_CLR);
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return 0;
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}
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static int mxs_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value)
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{
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struct mxs_gpio_chip *mxsgpio = container_of(chip, struct mxs_gpio_chip, chip);
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mxs_gpio_set_value(chip, gpio, value);
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writel(0x1 << gpio, mxsgpio->doe + STMP_OFFSET_REG_SET);
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return 0;
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}
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static int mxs_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
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{
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struct mxs_gpio_chip *mxsgpio = container_of(chip, struct mxs_gpio_chip, chip);
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if (readl(mxsgpio->din) & (1 << gpio))
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return 1;
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else
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return 0;
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}
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static int mxs_get_direction(struct gpio_chip *chip, unsigned gpio)
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{
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struct mxs_gpio_chip *mxsgpio = container_of(chip, struct mxs_gpio_chip, chip);
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if (readl(mxsgpio->doe) & (1 << gpio))
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return GPIOF_DIR_OUT;
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else
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return GPIOF_DIR_IN;
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}
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static struct gpio_ops mxs_gpio_ops = {
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.direction_input = mxs_gpio_direction_input,
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.direction_output = mxs_gpio_direction_output,
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.get = mxs_gpio_get_value,
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.set = mxs_gpio_set_value,
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.get_direction = mxs_get_direction,
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};
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static int mxs_gpio_probe(struct device_d *dev)
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{
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struct mxs_gpio_chip *mxsgpio;
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struct mxs_gpio_regs *regs;
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int ret, id;
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ret = dev_get_drvdata(dev, (unsigned long *)®s);
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if (ret)
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return ret;
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mxsgpio = xzalloc(sizeof(*mxsgpio));
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mxsgpio->chip.ops = &mxs_gpio_ops;
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if (dev->id < 0) {
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id = of_alias_get_id(dev->device_node, "gpio");
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if (id < 0)
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return id;
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mxsgpio->base = dev_get_mem_region(dev->parent, 0);
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mxsgpio->chip.base = id * 32;
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} else {
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id = dev->id;
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mxsgpio->base = dev_get_mem_region(dev, 0);
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mxsgpio->chip.base = dev->id * 32;
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}
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if (IS_ERR(mxsgpio->base))
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return PTR_ERR(mxsgpio->base);
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mxsgpio->doe = mxsgpio->base + regs->doe + id * 0x10;
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mxsgpio->dout = mxsgpio->base + regs->dout + id * 0x10;
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mxsgpio->din = mxsgpio->base + regs->din + id * 0x10;
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mxsgpio->chip.ngpio = 32;
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mxsgpio->chip.dev = dev;
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mxsgpio->regs = regs;
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gpiochip_add(&mxsgpio->chip);
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dev_dbg(dev, "probed gpiochip%d with base %d\n", dev->id, mxsgpio->chip.base);
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return 0;
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}
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static __maybe_unused struct of_device_id mxs_gpio_dt_ids[] = {
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{
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.compatible = "fsl,imx23-gpio",
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.data = (unsigned long)®s_mxs23,
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}, {
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.compatible = "fsl,imx28-gpio",
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.data = (unsigned long)®s_mxs28,
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}, {
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/* sentinel */
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}
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};
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static struct platform_device_id mxs_gpio_ids[] = {
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{
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.name = "imx23-gpio",
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.driver_data = (unsigned long)®s_mxs23,
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}, {
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.name = "imx28-gpio",
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.driver_data = (unsigned long)®s_mxs28,
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}, {
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/* sentinel */
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},
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};
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static struct driver_d mxs_gpio_driver = {
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.name = "gpio-mxs",
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.probe = mxs_gpio_probe,
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.of_compatible = DRV_OF_COMPAT(mxs_gpio_dt_ids),
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.id_table = mxs_gpio_ids,
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};
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static int mxs_gpio_add(void)
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{
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platform_driver_register(&mxs_gpio_driver);
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return 0;
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}
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core_initcall(mxs_gpio_add);
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