From e5d31a7efd2f574ee0e81a2fa172249d6966f1a8 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 25 Jan 2014 23:34:17 +0400 Subject: [PATCH 1/5] ARM: animeo_ip: Use __iomem specifier for memory pointer Signed-off-by: Alexander Shiyan Signed-off-by: Sascha Hauer --- arch/arm/boards/animeo_ip/init.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boards/animeo_ip/init.c b/arch/arm/boards/animeo_ip/init.c index e684222bc..ca64d6df8 100644 --- a/arch/arm/boards/animeo_ip/init.c +++ b/arch/arm/boards/animeo_ip/init.c @@ -328,7 +328,7 @@ device_initcall(animeo_ip_devices_init); static struct device_d *usart0, *usart1; -static void animeo_ip_shutdown_uart(void *base) +static void animeo_ip_shutdown_uart(void __iomem *base) { #define ATMEL_US_BRGR 0x0020 writel(0, base + ATMEL_US_BRGR); From 44cd317378589909391f36519d541f3b7f73e734 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 25 Jan 2014 23:34:25 +0400 Subject: [PATCH 2/5] ARM: at91: irq_fixup: Use __iomem specifier for memory pointer Signed-off-by: Alexander Shiyan Signed-off-by: Sascha Hauer --- arch/arm/mach-at91/irq_fixup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/irq_fixup.c b/arch/arm/mach-at91/irq_fixup.c index a9eebd785..9815ac2ca 100644 --- a/arch/arm/mach-at91/irq_fixup.c +++ b/arch/arm/mach-at91/irq_fixup.c @@ -15,7 +15,7 @@ */ void at91_rtt_irq_fixup(void *base) { - void *reg = base + AT91_RTT_MR; + void __iomem *reg = base + AT91_RTT_MR; u32 mr = readl(reg); writel(mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN), reg); From fb2b6d0d0b4034352143b4f7aa1ec10de592dabe Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 25 Jan 2014 23:34:26 +0400 Subject: [PATCH 3/5] ARM: i.MX: external_nand_boot: Use __iomem specifier for memory pointer Signed-off-by: Alexander Shiyan Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/external-nand-boot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/external-nand-boot.c b/arch/arm/mach-imx/external-nand-boot.c index 1af46b78e..2dabd53d8 100644 --- a/arch/arm/mach-imx/external-nand-boot.c +++ b/arch/arm/mach-imx/external-nand-boot.c @@ -28,7 +28,7 @@ #include #include -static void __bare_init noinline imx_nandboot_wait_op_done(void *regs) +static void __bare_init noinline imx_nandboot_wait_op_done(void __iomem *regs) { u32 r; From 1a1c929ee9619bcc2f5b54c90f82530bd4787cd6 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 25 Jan 2014 23:34:27 +0400 Subject: [PATCH 4/5] ARM: i.MX: esdctl: Use __iomem specifier for memory pointer Signed-off-by: Alexander Shiyan Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/esdctl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index 3ac4075a4..d11957f80 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -195,7 +195,7 @@ static void add_mem(unsigned long base0, unsigned long size0, */ #define ESDCTL1_RESET_DEFAULT 0x81120080 -static inline void imx_esdctl_v2_disable_default(void *esdctlbase) +static inline void imx_esdctl_v2_disable_default(void __iomem *esdctlbase) { u32 ctlval = readl(esdctlbase + IMX_ESDCTL1); From f986b957354949eca175d8190d79a4506ad6be62 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 25 Jan 2014 23:34:28 +0400 Subject: [PATCH 5/5] ARM: i.MX: esdctl-v4: Use __iomem specifier for memory pointer Signed-off-by: Alexander Shiyan Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/esdctl-v4.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-imx/esdctl-v4.c b/arch/arm/mach-imx/esdctl-v4.c index 6441ac9ce..0652b492e 100644 --- a/arch/arm/mach-imx/esdctl-v4.c +++ b/arch/arm/mach-imx/esdctl-v4.c @@ -25,7 +25,7 @@ void imx_esdctlv4_do_write_leveling(void) { u32 val; - void __iomem *base = (void *)MX53_ESDCTL_BASE_ADDR; + void __iomem *base = IOMEM(MX53_ESDCTL_BASE_ADDR); /* switch RAMs to write-leveling mode */ @@ -80,7 +80,7 @@ void imx_esdctlv4_do_write_leveling(void) void imx_esdctlv4_do_dqs_gating(void) { u32 val; - void __iomem *base = (void *)MX53_ESDCTL_BASE_ADDR; + void __iomem *base = IOMEM(MX53_ESDCTL_BASE_ADDR); /* configure ESDCTL comparator to use MPR pattern */ writel(ESDCTL_V4_PDCMPR2_MPR_FULL_CMP | ESDCTL_V4_PDCMPR2_MPR_CMP, @@ -127,7 +127,7 @@ void imx_esdctlv4_do_dqs_gating(void) void imx_esdctlv4_do_zq_calibration(void) { u32 val; - void __iomem *base = (void *)MX53_ESDCTL_BASE_ADDR; + void __iomem *base = IOMEM(MX53_ESDCTL_BASE_ADDR); /* * configure ZQ parameters @@ -156,7 +156,7 @@ void imx_esdctlv4_do_zq_calibration(void) */ void imx_esdctlv4_start_ddr3_sdram(int cs) { - void __iomem *base = (void *)MX53_ESDCTL_BASE_ADDR; + void __iomem *base = IOMEM(MX53_ESDCTL_BASE_ADDR); u32 val; u32 val_cs1; @@ -206,7 +206,7 @@ void imx_esdctlv4_start_ddr3_sdram(int cs) void imx_esdctlv4_do_read_delay_line_calibration(void) { - void __iomem *base = (void *)MX53_ESDCTL_BASE_ADDR; + void __iomem *base = IOMEM(MX53_ESDCTL_BASE_ADDR); u32 val; /* configure ESDCTL comparator to use MPR pattern */ @@ -262,7 +262,7 @@ void imx_esdctlv4_do_read_delay_line_calibration(void) void imx_esdctlv4_do_write_delay_line_calibration(void) { - void __iomem *base = (void *)MX53_ESDCTL_BASE_ADDR; + void __iomem *base = IOMEM(MX53_ESDCTL_BASE_ADDR); void __iomem *adr; u32 val; @@ -275,7 +275,7 @@ void imx_esdctlv4_do_write_delay_line_calibration(void) /* write test-pattern to RAM */ /* ESCTL uses this address for calibration */ - adr = (void *)MX53_CSD0_BASE_ADDR + 0x10000000; + adr = IOMEM(MX53_CSD0_BASE_ADDR) + 0x10000000; writel(0, adr + 0x00); writel(0, adr + 0x0c); writel(0, adr + 0x10); @@ -328,7 +328,7 @@ void imx_esdctlv4_do_write_delay_line_calibration(void) /* * write magic values to RAM for testing purposes */ -static void imx_esdctlv4_write_magic_values(void *adr) +static void imx_esdctlv4_write_magic_values(void __iomem *adr) { /* * Freescale asks for first access to be a write to properly @@ -348,7 +348,7 @@ static void imx_esdctlv4_write_magic_values(void *adr) /* * check if given DRAM addresses match expected values for row/col configuration */ -static u32 check_ram_address_line(void *adr, u32 compare, u32 mask) +static u32 check_ram_address_line(void __iomem *adr, u32 compare, u32 mask) { u32 val; @@ -366,7 +366,7 @@ static u32 check_ram_address_line(void *adr, u32 compare, u32 mask) */ void imx_esdctlv4_set_tRFC_timing(void) { - void __iomem *base = (void *)MX53_ESDCTL_BASE_ADDR; + void __iomem *base = IOMEM(MX53_ESDCTL_BASE_ADDR); u32 val, trfc, r2, esdcfg; /* determine chip-density */ @@ -433,7 +433,7 @@ void imx_esdctlv4_set_tRFC_timing(void) */ void imx_esdctlv4_detect_sdrams(void) { - void __iomem *base = (void *)MX53_ESDCTL_BASE_ADDR; + void __iomem *base = IOMEM(MX53_ESDCTL_BASE_ADDR); u32 esdctl0; esdctl0 = readl(base + ESDCTL_V4_ESDCTL0); @@ -451,7 +451,7 @@ void imx_esdctlv4_detect_sdrams(void) void imx_esdctlv4_init(void) { - void __iomem *base = (void *)MX53_ESDCTL_BASE_ADDR; + void __iomem *base = IOMEM(MX53_ESDCTL_BASE_ADDR); u32 val, r1, esdctl0, mask, rows, cols; /*