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ARM i.MX53: enable imx53_init_lowlevel for pbl 

The KARO Tx53 board in the revision 8030 has an instable SDRAM
setup. It works as long as the MMU is disabled, but the board
crashes at arbitrary places once the MMU gets enabled. So we
need the PLL setup early. Enable it for pbl.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2012-10-12 15:21:13 +02:00
parent b1b76f6027
commit 4ad34853f1
2 changed files with 4 additions and 1 deletions
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1
arch/arm/mach-imx/Makefile
View File

@ -7,6 +7,7 @@ obj-$(CONFIG_ARCH_IMX31) += imx31.o iomux-v2.o clk-imx31.o
obj-$(CONFIG_ARCH_IMX35) += imx35.o iomux-v3.o clk-imx35.o
obj-$(CONFIG_ARCH_IMX51) += imx51.o iomux-v3.o imx5.o clk-imx5.o
obj-$(CONFIG_ARCH_IMX53) += imx53.o iomux-v3.o imx5.o clk-imx5.o
pbl-$(CONFIG_ARCH_IMX53) += imx53.o imx5.o
obj-$(CONFIG_ARCH_IMX6) += imx6.o iomux-v3.o usb-imx6.o clk-imx6.o
obj-$(CONFIG_IMX_IIM) += iim.o
obj-$(CONFIG_NAND_IMX) += nand.o

4
arch/arm/mach-imx/imx53.c
View File

@ -191,6 +191,8 @@ void imx53_init_lowlevel(unsigned int cpufreq_mhz)
writel(0xffffffff, ccm + MX5_CCM_CCGR6);
writel(0xffffffff, ccm + MX53_CCM_CCGR7);
clock_notifier_call_chain();
if (!IS_ENABLED(__PBL__))
clock_notifier_call_chain();
writel(0, ccm + MX5_CCM_CCDR);
}