Merge branch 'for-next/net'
This commit is contained in:
Sascha Hauer
commit
4afb09cc67
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@ -19,6 +19,9 @@
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|||
#define MII_M1011_PHY_SCR 0x10
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#define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
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#define MII_88E1121_PHY_LED_CTRL 16
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#define MII_88E1121_PHY_LED_PAGE 3
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#define MII_M1011_PHY_STATUS 0x11
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#define MII_M1011_PHY_STATUS_1000 BIT(15)
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#define MII_M1011_PHY_STATUS_100 BIT(14)
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@ -28,8 +31,11 @@
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#define MII_M1011_PHY_STATUS_RESOLVED BIT(11)
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#define MII_M1011_PHY_STATUS_LINK BIT(10)
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#define MII_M1111_COPPER 0
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#define MII_M1111_FIBER 1
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#define MII_88E1121_PHY_MSCR_PAGE 2
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#define MII_88E1121_PHY_MSCR 0x15
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#define MII_88E1121_PHY_MSCR_REG 21
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#define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
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#define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
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#define MII_88E1121_PHY_MSCR_DELAY_MASK \
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@ -38,13 +44,24 @@
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#define MII_88E1318S_PHY_MSCR1_REG 16
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#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
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#define MII_88E1540_LED_PAGE 0x3
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#define MII_88E1540_LED_CONTROL 0x10
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#define MII_88E1540_QSGMII_PAGE 0x4
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#define MII_88E1540_QSGMII_CONTROL 0x0
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#define MII_88E1540_QSGMII_AUTONEG_EN BIT(12)
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#define MII_88E1510_GEN_CTRL_REG_1 0x14
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#define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
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#define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
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#define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
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#define LPA_PAUSE_FIBER 0x180
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#define LPA_PAUSE_ASYM_FIBER 0x100
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#define ADVERTISE_FIBER_1000HALF 0x40
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#define ADVERTISE_FIBER_1000FULL 0x20
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#define ADVERTISE_PAUSE_FIBER 0x180
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#define ADVERTISE_PAUSE_ASYM_FIBER 0x100
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/*
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* marvell_read_status
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*
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@ -133,6 +150,216 @@ static int marvell_read_status(struct phy_device *phydev)
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return 0;
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}
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#define MII_88E1510_GEN_CTRL_REG_1 0x14
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static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
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{
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return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
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phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
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};
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/*
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* This same function in the Linux kernel parses the marvell,reg-init dt
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* property and does the necessary register writes. It's kept as an exercise for
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* a future user to implement this. :-)
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*/
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static int marvell_of_reg_init(struct phy_device *phydev)
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{
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return 0;
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}
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static int m88e1121_config_aneg(struct phy_device *phydev)
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{
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int err, oldpage, mscr;
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oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
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err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
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MII_88E1121_PHY_MSCR_PAGE);
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if (err < 0)
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return err;
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if (phy_interface_is_rgmii(phydev)) {
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mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
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MII_88E1121_PHY_MSCR_DELAY_MASK;
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
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mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
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MII_88E1121_PHY_MSCR_TX_DELAY);
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else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
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mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
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else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
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mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
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err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
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if (err < 0)
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return err;
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}
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phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
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err = phy_write(phydev, MII_BMCR, BMCR_RESET);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_M1011_PHY_SCR,
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MII_M1011_PHY_SCR_AUTO_CROSS);
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if (err < 0)
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return err;
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return genphy_config_aneg(phydev);
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}
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static int m88e1318_config_aneg(struct phy_device *phydev)
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{
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int err, oldpage, mscr;
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oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE);
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err = phy_write(phydev, MII_MARVELL_PHY_PAGE,
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MII_88E1121_PHY_MSCR_PAGE);
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if (err < 0)
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return err;
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mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
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mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
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err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
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if (err < 0)
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return err;
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err = phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage);
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if (err < 0)
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return err;
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return m88e1121_config_aneg(phydev);
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}
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/**
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* ethtool_adv_to_fiber_adv_t
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* @ethadv: the ethtool advertisement settings
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*
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* A small helper function that translates ethtool advertisement
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* settings to phy autonegotiation advertisements for the
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* MII_ADV register for fiber link.
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*/
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static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
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{
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u32 result = 0;
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if (ethadv & ADVERTISED_1000baseT_Half)
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result |= ADVERTISE_FIBER_1000HALF;
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if (ethadv & ADVERTISED_1000baseT_Full)
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result |= ADVERTISE_FIBER_1000FULL;
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if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
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result |= LPA_PAUSE_ASYM_FIBER;
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else if (ethadv & ADVERTISE_PAUSE_CAP)
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result |= (ADVERTISE_PAUSE_FIBER
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& (~ADVERTISE_PAUSE_ASYM_FIBER));
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return result;
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}
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/**
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* marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
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* @phydev: target phy_device struct
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*
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* Description: If auto-negotiation is enabled, we configure the
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* advertising, and then restart auto-negotiation. If it is not
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* enabled, then we write the BMCR. Adapted for fiber link in
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* some Marvell's devices.
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*/
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static int marvell_config_aneg_fiber(struct phy_device *phydev)
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{
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int changed = 0;
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int err;
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int adv, oldadv;
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u32 advertise;
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if (phydev->autoneg != AUTONEG_ENABLE)
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return genphy_setup_forced(phydev);
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/* Only allow advertising what this PHY supports */
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phydev->advertising &= phydev->supported;
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advertise = phydev->advertising;
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/* Setup fiber advertisement */
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adv = phy_read(phydev, MII_ADVERTISE);
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if (adv < 0)
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return adv;
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oldadv = adv;
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adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
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| LPA_PAUSE_FIBER);
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adv |= ethtool_adv_to_fiber_adv_t(advertise);
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if (adv != oldadv) {
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err = phy_write(phydev, MII_ADVERTISE, adv);
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if (err < 0)
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return err;
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changed = 1;
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}
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if (changed == 0) {
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/* Advertisement hasn't changed, but maybe aneg was never on to
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* begin with? Or maybe phy was isolated?
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*/
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int ctl = phy_read(phydev, MII_BMCR);
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if (ctl < 0)
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return ctl;
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if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
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changed = 1; /* do restart aneg */
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}
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/* Only restart aneg if we are advertising something different
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* than we were before.
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*/
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if (changed > 0)
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changed = genphy_restart_aneg(phydev);
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return changed;
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}
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static int m88e1510_config_aneg(struct phy_device *phydev)
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{
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int err;
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err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
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if (err < 0)
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goto error;
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/* Configure the copper link first */
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err = m88e1318_config_aneg(phydev);
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if (err < 0)
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goto error;
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/* Then the fiber link */
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err = phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_FIBER);
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if (err < 0)
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goto error;
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err = marvell_config_aneg_fiber(phydev);
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if (err < 0)
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goto error;
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return phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
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error:
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phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_M1111_COPPER);
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return err;
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}
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static int marvell_config_init(struct phy_device *phydev)
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{
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/* Set registers from marvell,reg-init DT property */
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return marvell_of_reg_init(phydev);
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}
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static int m88e1540_config_init(struct phy_device *phydev)
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{
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u16 reg;
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@ -157,8 +384,8 @@ static int m88e1540_config_init(struct phy_device *phydev)
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* Link: On
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* No Link: Off
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*/
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phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_88E1540_LED_PAGE);
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phy_write(phydev, MII_88E1540_LED_CONTROL, 0x1111);
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phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_88E1121_PHY_LED_PAGE);
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phy_write(phydev, MII_88E1121_PHY_LED_CTRL, 0x1111);
|
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|
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/* Power-up the PHY. When going from power down to normal operation,
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* software reset and auto-negotiation restart are also performed.
|
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@ -172,7 +399,7 @@ static int m88e1540_config_init(struct phy_device *phydev)
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|||
if (ret < 0)
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return ret;
|
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|
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return 0;
|
||||
return marvell_config_init(phydev);
|
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}
|
||||
|
||||
static int m88e1121_config_init(struct phy_device *phydev)
|
||||
|
|
@ -186,7 +413,7 @@ static int m88e1121_config_init(struct phy_device *phydev)
|
|||
return ret;
|
||||
|
||||
/* Setup RGMII TX/RX delay */
|
||||
reg = phy_read(phydev, MII_88E1121_PHY_MSCR) &
|
||||
reg = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) &
|
||||
~MII_88E1121_PHY_MSCR_DELAY_MASK;
|
||||
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
|
||||
phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
|
||||
|
|
@ -194,7 +421,7 @@ static int m88e1121_config_init(struct phy_device *phydev)
|
|||
if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
|
||||
phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
|
||||
reg |= MII_88E1121_PHY_MSCR_TX_DELAY;
|
||||
ret = phy_write(phydev, MII_88E1121_PHY_MSCR, reg);
|
||||
ret = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, reg);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
|
@ -215,9 +442,10 @@ static int m88e1121_config_init(struct phy_device *phydev)
|
|||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
return marvell_config_init(phydev);
|
||||
}
|
||||
|
||||
|
||||
static int m88e1318s_config_init(struct phy_device *phydev)
|
||||
{
|
||||
u16 reg;
|
||||
|
|
@ -237,47 +465,92 @@ static int m88e1318s_config_init(struct phy_device *phydev)
|
|||
return m88e1121_config_init(phydev);
|
||||
}
|
||||
|
||||
static struct phy_driver marvell_phys[] = {
|
||||
static int m88e1510_config_init(struct phy_device *phydev)
|
||||
{
|
||||
int err;
|
||||
int temp;
|
||||
|
||||
/* SGMII-to-Copper mode initialization */
|
||||
if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
|
||||
/* Select page 18 */
|
||||
err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 18);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
|
||||
temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
|
||||
temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
|
||||
temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
|
||||
err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* PHY reset is necessary after changing MODE[2:0] */
|
||||
temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
|
||||
err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
|
||||
if (err < 0)
|
||||
return err;
|
||||
|
||||
/* Reset page selection */
|
||||
err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0);
|
||||
if (err < 0)
|
||||
return err;
|
||||
}
|
||||
|
||||
return m88e1121_config_init(phydev);
|
||||
}
|
||||
|
||||
static struct phy_driver marvell_drivers[] = {
|
||||
{
|
||||
.phy_id = MARVELL_PHY_ID_88E1121R,
|
||||
.phy_id_mask = MARVELL_PHY_ID_MASK,
|
||||
.drv.name = "Marvell 88E1121R",
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config_init = m88e1121_config_init,
|
||||
.config_aneg = genphy_config_aneg,
|
||||
.read_status = marvell_read_status,
|
||||
.phy_id = MARVELL_PHY_ID_88E1121R,
|
||||
.phy_id_mask = MARVELL_PHY_ID_MASK,
|
||||
.drv.name = "Marvell 88E1121R",
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config_init = &m88e1121_config_init,
|
||||
.config_aneg = &m88e1121_config_aneg,
|
||||
.read_status = &marvell_read_status,
|
||||
},
|
||||
{
|
||||
.phy_id = MARVELL_PHY_ID_88E1318S,
|
||||
.phy_id_mask = MARVELL_PHY_ID_MASK,
|
||||
.drv.name = "Marvell 88E1318S",
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config_init = m88e1318s_config_init,
|
||||
.config_aneg = genphy_config_aneg,
|
||||
.read_status = marvell_read_status,
|
||||
.phy_id = MARVELL_PHY_ID_88E1318S,
|
||||
.phy_id_mask = MARVELL_PHY_ID_MASK,
|
||||
.drv.name = "Marvell 88E1318S",
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config_init = &m88e1318s_config_init,
|
||||
.config_aneg = &m88e1318_config_aneg,
|
||||
.read_status = &marvell_read_status,
|
||||
},
|
||||
{
|
||||
.phy_id = MARVELL_PHY_ID_88E1543,
|
||||
.phy_id_mask = MARVELL_PHY_ID_MASK,
|
||||
.drv.name = "Marvell 88E1543",
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config_init = m88e1540_config_init,
|
||||
.config_aneg = genphy_config_aneg,
|
||||
.read_status = marvell_read_status,
|
||||
.phy_id = MARVELL_PHY_ID_88E1543,
|
||||
.phy_id_mask = MARVELL_PHY_ID_MASK,
|
||||
.drv.name = "Marvell 88E1543",
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config_init = &m88e1540_config_init,
|
||||
.config_aneg = &genphy_config_aneg,
|
||||
.read_status = &marvell_read_status,
|
||||
},
|
||||
{
|
||||
.phy_id = MARVELL_PHY_ID_88E1545,
|
||||
.phy_id_mask = MARVELL_PHY_ID_MASK,
|
||||
.drv.name = "Marvell 88E1545",
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config_init = m88e1540_config_init,
|
||||
.config_aneg = genphy_config_aneg,
|
||||
.read_status = marvell_read_status,
|
||||
.phy_id = MARVELL_PHY_ID_88E1510,
|
||||
.phy_id_mask = MARVELL_PHY_ID_MASK,
|
||||
.drv.name = "Marvell 88E1510",
|
||||
.features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
|
||||
.config_init = &m88e1510_config_init,
|
||||
.config_aneg = &m88e1510_config_aneg,
|
||||
.read_status = &marvell_read_status,
|
||||
},
|
||||
{
|
||||
.phy_id = MARVELL_PHY_ID_88E1540,
|
||||
.phy_id_mask = MARVELL_PHY_ID_MASK,
|
||||
.drv.name = "Marvell 88E1540",
|
||||
.features = PHY_GBIT_FEATURES,
|
||||
.config_init = &m88e1540_config_init,
|
||||
.config_aneg = &m88e1510_config_aneg,
|
||||
.read_status = &marvell_read_status,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init marvell_phy_init(void)
|
||||
{
|
||||
return phy_drivers_register(marvell_phys, ARRAY_SIZE(marvell_phys));
|
||||
return phy_drivers_register(marvell_drivers,
|
||||
ARRAY_SIZE(marvell_drivers));
|
||||
}
|
||||
fs_initcall(marvell_phy_init);
|
||||
|
|
|
|||
|
|
@ -27,8 +27,8 @@
|
|||
#define MARVELL_PHY_ID_88E1318S 0x01410e90
|
||||
#define MARVELL_PHY_ID_88E1116R 0x01410e40
|
||||
#define MARVELL_PHY_ID_88E1510 0x01410dd0
|
||||
#define MARVELL_PHY_ID_88E1540 0x01410eb0
|
||||
#define MARVELL_PHY_ID_88E1543 0x01410ea0
|
||||
#define MARVELL_PHY_ID_88E1545 0x01410eb0
|
||||
|
||||
/* Mask used for ID comparisons */
|
||||
#define MARVELL_PHY_ID_MASK 0xfffffff0
|
||||
|
|
|
|||
Loading…
Reference in New Issue