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at91: add sram memory devices 

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD 2011-12-31 16:21:31 +01:00 committed by Sascha Hauer
parent 5524cd966b
commit 4c8fa9f064
7 changed files with 40 additions and 0 deletions
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2
arch/arm/mach-at91/at91rm9200_devices.c
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@ -23,6 +23,8 @@
void at91_add_device_sdram(u32 size)
{
arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size);
add_mem_device("sram0", AT91RM9200_SRAM_BASE, AT91RM9200_SRAM_SIZE,
IORESOURCE_MEM_WRITEABLE);
}
/* --------------------------------------------------------------------

12
arch/arm/mach-at91/at91sam9260_devices.c
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@ -18,12 +18,24 @@
#include <mach/at91sam9260_matrix.h>
#include <mach/gpio.h>
#include <mach/io.h>
#include <mach/cpu.h>
#include "generic.h"
void at91_add_device_sdram(u32 size)
{
arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size);
if (cpu_is_at91sam9g20()) {
add_mem_device("sram0", AT91SAM9G20_SRAM0_BASE,
AT91SAM9G20_SRAM0_SIZE, IORESOURCE_MEM_WRITEABLE);
add_mem_device("sram1", AT91SAM9G20_SRAM1_BASE,
AT91SAM9G20_SRAM1_SIZE, IORESOURCE_MEM_WRITEABLE);
} else {
add_mem_device("sram0", AT91SAM9260_SRAM0_BASE,
AT91SAM9260_SRAM0_SIZE, IORESOURCE_MEM_WRITEABLE);
add_mem_device("sram1", AT91SAM9260_SRAM1_BASE,
AT91SAM9260_SRAM1_SIZE, IORESOURCE_MEM_WRITEABLE);
}
}
#if defined(CONFIG_USB_OHCI)

7
arch/arm/mach-at91/at91sam9261_devices.c
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@ -18,12 +18,19 @@
#include <mach/board.h>
#include <mach/gpio.h>
#include <mach/io.h>
#include <mach/cpu.h>
#include "generic.h"
void at91_add_device_sdram(u32 size)
{
arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size);
if (cpu_is_at91sam9g10())
add_mem_device("sram0", AT91SAM9G10_SRAM_BASE,
AT91SAM9G10_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE);
else
add_mem_device("sram0", AT91SAM9261_SRAM_BASE,
AT91SAM9261_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE);
}
/* --------------------------------------------------------------------

4
arch/arm/mach-at91/at91sam9263_devices.c
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@ -24,6 +24,10 @@
void at91_add_device_sdram(u32 size)
{
arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size);
add_mem_device("sram0", AT91SAM9263_SRAM0_BASE,
AT91SAM9263_SRAM0_SIZE, IORESOURCE_MEM_WRITEABLE);
add_mem_device("sram1", AT91SAM9263_SRAM1_BASE,
AT91SAM9263_SRAM1_SIZE, IORESOURCE_MEM_WRITEABLE);
}
/* --------------------------------------------------------------------

2
arch/arm/mach-at91/at91sam9g45_devices.c
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@ -24,6 +24,8 @@
void at91_add_device_sdram(u32 size)
{
arm_add_mem_device("ram0", AT91_CHIPSELECT_6, size);
add_mem_device("sram0", AT91SAM9G45_SRAM_BASE,
AT91SAM9G45_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE);
}
/* --------------------------------------------------------------------

10
arch/arm/mach-at91/include/mach/at91sam9260.h
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@ -126,6 +126,16 @@
#define AT91SAM9XE_FLASH_BASE 0x00200000 /* Internal FLASH base address */
#define AT91SAM9XE_SRAM_BASE 0x00300000 /* Internal SRAM base address */
#define AT91SAM9G20_ROM_BASE 0x00100000 /* Internal ROM base address */
#define AT91SAM9G20_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */
#define AT91SAM9G20_SRAM0_BASE 0x00200000 /* Internal SRAM 0 base address */
#define AT91SAM9G20_SRAM0_SIZE SZ_16K /* Internal SRAM 0 size (16Kb) */
#define AT91SAM9G20_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */
#define AT91SAM9G20_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */
#define AT91SAM9G20_UHP_BASE 0x00500000 /* USB Host controller */
/*
* Cpu Name
*/

3
arch/arm/mach-at91/include/mach/at91sam9261.h
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@ -95,6 +95,9 @@
#define AT91SAM9261_SRAM_BASE 0x00300000 /* Internal SRAM base address */
#define AT91SAM9261_SRAM_SIZE 0x00028000 /* Internal SRAM size (160Kb) */
#define AT91SAM9G10_SRAM_BASE AT91SAM9261_SRAM_BASE /* Internal SRAM base address */
#define AT91SAM9G10_SRAM_SIZE 0x00004000 /* Internal SRAM size (16Kb) */
#define AT91SAM9261_ROM_BASE 0x00400000 /* Internal ROM base address */
#define AT91SAM9261_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */