saving added docu
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@ -16,5 +16,7 @@ Hints and tips for simply adapting UBootv2
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Various themes:
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- @subpage how_mount_works
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- @subpage boot_preparation
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- @subpage uboot_simul
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*/
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@ -1,7 +1,20 @@
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/** @page users_manual User's Manual
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FIXME: Hints and tips for simply using UBootv2
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<!--
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This manual should help the user to manage his target with the new U-Boot
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look and fell. Many things are new in v2, but some old fashion feelings
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are still present.
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First of all, you will recognise the U-Boot v2 is much faster than its
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precedessor. Booting up your target needs less time, as U-Boot's v2 core is
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shrinked down.
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-->
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Who should read this part?
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Mostly everyone. The user needs it to find help for his daily work to manage
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his targets. The developer to find out all the new features that make his
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work easier.
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- @subpage shell_notes
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- @subpage readline_parser
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2
Doxyfile
2
Doxyfile
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@ -418,7 +418,7 @@ WARNINGS = YES
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# for undocumented members. If EXTRACT_ALL is set to YES then this flag will
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# automatically be disabled.
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WARN_IF_UNDOCUMENTED = YES
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WARN_IF_UNDOCUMENTED = NO
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# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for
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# potential errors in the documentation, such as not documenting some
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@ -1,6 +1,33 @@
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/** @page dev_architecture Integrate a new architecture (ARCH)
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Friesel
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@section linker_scripts Rules for the generic Linker Script File
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Never include an object file by name directly! Linker Script Files defines the
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layout, not the content. Content is defined in objecfiles instead.
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Don't rely on the given object file order to create your binary U-Boot v2! This
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may work, but is not relyable in all cases (and its a very bad style)!
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For the special case some layout contraints exists, use specific section
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naming instead. Refer @ref reset_code how to define this specific section.
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@section reset_code Bring it up: The Reset Code
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The way a CPU wakes up after reset is very specific to its architecture.
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For example the ARM architecture starts its reset code at address 0x0000000,
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the x86 architecture at 0x000FFFF0, PowerPC at 0x00000100 or 0xFFFFF100.
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So for the special reset code on all architectures it must be located at
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architecture specific locations within the binary U-Boot image.
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All reset code uses section ".text_entry" for its localisation within the
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binary U-Boot image. Its up to the linker script file to use this section name
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to find the right place in whatever environment and U-Boot sizes.
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@code
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.section ".text_entry","ax"
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@endcode
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*/
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@ -1,7 +1,37 @@
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/*
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* cpu.c - A few helper functions for ARM
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*
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* Copyright (c) 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/**
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* @file
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* @brief A few helper functions for ARM
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*/
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#include <common.h>
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#include <command.h>
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/* read co-processor 15, register #1 (control register) */
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/**
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* Read special processor register
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* @return co-processor 15, register #1 (control register)
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*/
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static unsigned long read_p15_c1 (void)
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{
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unsigned long value;
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@ -18,7 +48,12 @@ static unsigned long read_p15_c1 (void)
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return value;
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}
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/* write to co-processor 15, register #1 (control register) */
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/**
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*
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* Write special processor register
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* @param[in] value to write
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* @return to co-processor 15, register #1 (control register)
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*/
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static void write_p15_c1 (unsigned long value)
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{
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#ifdef MMU_DEBUG
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@ -33,23 +68,38 @@ static void write_p15_c1 (unsigned long value)
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read_p15_c1 ();
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}
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/**
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* Wait for co prozessor (waste time)
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* Co processor seems to need some delay between accesses
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*/
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static void cp_delay (void)
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{
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volatile int i;
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/* copro seems to need some delay between reading and writing */
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for (i = 0; i < 100; i++);
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for (i = 0; i < 100; i++) /* FIXME does it work as expected?? */
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;
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}
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#define C1_MMU (1<<0) /* mmu off/on */
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#define C1_ALIGN (1<<1) /* alignment faults off/on */
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#define C1_DC (1<<2) /* dcache off/on */
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#define C1_BIG_ENDIAN (1<<7) /* big endian off/on */
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#define C1_SYS_PROT (1<<8) /* system protection */
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#define C1_ROM_PROT (1<<9) /* ROM protection */
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#define C1_IC (1<<12) /* icache off/on */
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#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
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/** mmu off/on */
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#define C1_MMU (1<<0)
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/** alignment faults off/on */
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#define C1_ALIGN (1<<1)
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/** dcache off/on */
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#define C1_DC (1<<2)
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/** big endian off/on */
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#define C1_BIG_ENDIAN (1<<7)
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/** system protection */
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#define C1_SYS_PROT (1<<8)
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/** ROM protection */
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#define C1_ROM_PROT (1<<9)
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/** icache off/on */
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#define C1_IC (1<<12)
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/** location of vectors: low/high addresses */
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#define C1_HIGH_VECTORS (1<<13)
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/**
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* Enable processor's instruction cache
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*/
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void icache_enable (void)
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{
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ulong reg;
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@ -59,6 +109,9 @@ void icache_enable (void)
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write_p15_c1 (reg | C1_IC);
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}
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/**
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* Disable processor's instruction cache
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*/
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void icache_disable (void)
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{
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ulong reg;
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@ -68,30 +121,39 @@ void icache_disable (void)
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write_p15_c1 (reg & ~C1_IC);
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}
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/**
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* Detect processor's current instruction cache status
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* @return 0=disabled, 1=enabled
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*/
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int icache_status (void)
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{
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return (read_p15_c1 () & C1_IC) != 0;
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}
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/*
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* this function is called just before we call linux
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* it prepares the processor for linux
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/**
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* Prepare a "clean" CPU for Linux to run
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* @return 0 (always)
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*
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* This function is called by the generic U-Boot part just before we call
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* Linux. It prepares the processor for Linux.
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*/
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int cleanup_before_linux (void)
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{
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int i;
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/*
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* we never enable dcache so we do not need to disable
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* it. Linux can be called with icache enabled, so just
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* do nothing here
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*/
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/* flush I/D-cache */
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i = 0;
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asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
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return (0);
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}
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/**
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* @page arm_boot_preparation Linux Preparation on ARM
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*
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* For ARM we never enable data cache so we do not need to disable it again.
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* Linux can be called with instruction cache enabled. As this is the
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* default setting we are running in U-Boot, there's no special preparation
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* required.
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*/
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#ifdef CONFIG_USE_IRQ
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static int cpu_init (void)
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@ -106,3 +168,9 @@ static int cpu_init (void)
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core_initcall(cpu_init);
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#endif
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/**
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* @page arm_for_linux Preparing for Linux to run
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*
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* What's to do on ARM to run Linux after U-Boot did its job?
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*/
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@ -1,3 +1,30 @@
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/*
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* interrupts.c - Interrupt Support Routines
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*
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* Copyright (c) 2007 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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||||
*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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/**
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* @file
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* @brief Interrupt Support Routines
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*/
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#include <common.h>
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#include <asm/ptrace.h>
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@ -32,12 +59,19 @@ int disable_interrupts (void)
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}
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#endif
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/**
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* FIXME
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*/
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void bad_mode (void)
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{
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panic ("Resetting CPU ...\n");
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reset_cpu (0);
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}
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/**
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* Display current register set content
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* @param[in] regs Guess what
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*/
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void show_regs (struct pt_regs *regs)
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{
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unsigned long flags;
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@ -75,6 +109,10 @@ void show_regs (struct pt_regs *regs)
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thumb_mode (regs) ? " (T)" : "");
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}
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/**
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* The CPU runs into an undefined instruction. That really should not happen!
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* @param[in] pt_regs Register set content when the accident happens
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*/
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void do_undefined_instruction (struct pt_regs *pt_regs)
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{
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printf ("undefined instruction\n");
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@ -82,6 +120,13 @@ void do_undefined_instruction (struct pt_regs *pt_regs)
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bad_mode ();
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}
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/**
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* The CPU catches a software interrupt
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* @param[in] pt_regs Register set content when the interrupt happens
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*
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* There is not functione behind this feature. So what to do else than
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* a reset?
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*/
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void do_software_interrupt (struct pt_regs *pt_regs)
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{
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printf ("software interrupt\n");
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@ -89,6 +134,12 @@ void do_software_interrupt (struct pt_regs *pt_regs)
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bad_mode ();
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}
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/**
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* The CPU catches a prefetch abort. That really should not happen!
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* @param[in] pt_regs Register set content when the accident happens
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*
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* FIXME: What does it mean, why is reset the only solution?
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*/
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void do_prefetch_abort (struct pt_regs *pt_regs)
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{
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printf ("prefetch abort\n");
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@ -96,6 +147,12 @@ void do_prefetch_abort (struct pt_regs *pt_regs)
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bad_mode ();
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}
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/**
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* The CPU catches a data abort. That really should not happen!
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* @param[in] pt_regs Register set content when the accident happens
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*
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* FIXME: What does it mean, why is reset the only solution?
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*/
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void do_data_abort (struct pt_regs *pt_regs)
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{
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printf ("data abort\n");
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@ -103,6 +160,12 @@ void do_data_abort (struct pt_regs *pt_regs)
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bad_mode ();
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}
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/**
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* The CPU catches a not-used(?) abort.
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* @param[in] pt_regs Register set content when the accident happens
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*
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* FIXME: What does it mean, why is reset the only solution?
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*/
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void do_not_used (struct pt_regs *pt_regs)
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{
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printf ("not used\n");
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@ -110,6 +173,12 @@ void do_not_used (struct pt_regs *pt_regs)
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bad_mode ();
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}
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/**
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* The CPU catches a fast interrupt request.
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* @param[in] pt_regs Register set content when the interrupt happens
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*
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* FIXME: What does it mean, why is reset the only solution?
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*/
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void do_fiq (struct pt_regs *pt_regs)
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{
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printf ("fast interrupt request\n");
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@ -117,9 +186,21 @@ void do_fiq (struct pt_regs *pt_regs)
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bad_mode ();
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}
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/**
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* The CPU catches a regular interrupt.
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* @param[in] pt_regs Register set content when the interrupt happens
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*
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* FIXME: What does it mean, why is reset the only solution?
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*/
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void do_irq (struct pt_regs *pt_regs)
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{
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printf ("interrupt request\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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/**
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* @page arm_interrupts Interrupt handling on ARM
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*
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* Why U-boot doesn't use interrupts?
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*/
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@ -24,13 +24,18 @@
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* MA 02111-1307 USA
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*/
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||||
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/*
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* Note:
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* This file can be used for at least:
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||||
* - ARM920T
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* - i.MX1
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||||
* - i.MX27
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||||
* - i.MX31
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/**
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* @file
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* @brief The very basic beginning of each CPU after reset
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*
|
||||
* @note
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||||
* This reset code can be used at least for:
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||||
* - ARM920T
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||||
* - i.MX1
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||||
* - i.MX27
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||||
* - i.MX31
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||||
*
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||||
* FIXME: Stop doxygen from parsing the text below
|
||||
*/
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.section ".text_entry","ax"
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|
|
|
@ -61,3 +61,8 @@ int tap_alloc(char *dev)
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strcpy(dev, ifr.ifr_name);
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return fd;
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||||
}
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||||
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||||
/**
|
||||
* @file
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||||
* @brief Host side functions for tap driver
|
||||
*/
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||||
|
|
|
@ -1,5 +1,81 @@
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|||
/** @page dev_board Integrating a new Board
|
||||
/** @page dev_board Adapting a new Board
|
||||
|
||||
Blablubb
|
||||
To add a new board to U-Boot a few steps must be done, to extend and modify
|
||||
the U-Boot source tree.
|
||||
|
||||
@section board_add_files Files/Directories to be added
|
||||
|
||||
- board/<boardname>
|
||||
- board/<boardname>/<boardname>.c
|
||||
- board/<boardname>/<boardname>.dox
|
||||
- board/<boardname>/Makefile
|
||||
- include/configs/<boardname>.h
|
||||
- arch/<architecture>/configs/<boardname>_defconfig
|
||||
|
||||
Makefile
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||||
|
||||
obj-y += all files that builds the BSP (Assembler and/or C files)
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||||
|
||||
@subsection board_doxygen board/<boardname>/<boardname>.dox
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||||
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||||
This file should describe in short words your new board, what CPU
|
||||
it uses, what resources are provided and features it supports.
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||||
|
||||
Use the doxygen style for this kind of documentation. Below you find a
|
||||
template for this kind of file
|
||||
|
||||
@code
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||||
</>** <@>page <boardname> <Manufacturer> <Board's Name>
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||||
|
||||
This board uses an <architecture> based CPU. The board is shipped with:
|
||||
|
||||
- many MiB NOR type Flash Memory
|
||||
- many MiB SDRAM
|
||||
- a very special network controller
|
||||
|
||||
and so on.
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||||
|
||||
*</>
|
||||
@endcode
|
||||
|
||||
To make your new shiny file visible in the automatically generated
|
||||
documentation you must sort in the used page lable ("<boardname>" in the
|
||||
template above) into Documentation/boards.dox as
|
||||
|
||||
@code
|
||||
...
|
||||
<@>subpage <boardname>
|
||||
...
|
||||
@endcode
|
||||
|
||||
at the right architecture.
|
||||
|
||||
@note Consider to use an unique page lable.
|
||||
|
||||
@subsection board_lscript board/<boardname>/u-boot.ld.S
|
||||
|
||||
If your board needs a special binary U-Boot layout, you can provide a local
|
||||
board linker script file. This will replace the generic one provided by your
|
||||
architecture or CPU support.
|
||||
|
||||
Add this file with
|
||||
|
||||
@code
|
||||
extra-y += <board_linker_script>
|
||||
@endcode
|
||||
|
||||
in your local Makefile to the list of files, forwarded to the last linking step.
|
||||
|
||||
@section board_mod_files These files needs to be modified:
|
||||
|
||||
- modify board/board.doc
|
||||
- modify arch/<architecture>/Kconfig
|
||||
- add your board (MACH_*) to the list
|
||||
- add your default text base address for this architecture (ARCH_TEXT_BASE)
|
||||
- add BOARDINFO with valueable info for your board
|
||||
- modify arch/<architecture>/Makefile:
|
||||
- add board-$(MACH_*) = <your board_dir>
|
||||
|
||||
First, the new board should be visible in the menu.
|
||||
|
||||
*/
|
||||
|
|
|
@ -853,3 +853,20 @@ do_bootm_lynxkdi (cmd_tbl_t *cmdtp,
|
|||
}
|
||||
|
||||
#endif /* CONFIG_LYNXKDI */
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief Boot support for Linux
|
||||
*/
|
||||
|
||||
/**
|
||||
* @page boot_preparation Preparing for Boot
|
||||
*
|
||||
* This chapter describes what's to be done to forward the control from
|
||||
* U-Boot to Linux. This part describes the generic part, below you can find
|
||||
* the architecture specific part.
|
||||
*
|
||||
* - @subpage arm_boot_preparation
|
||||
* - @subpage ppc_boot_preparation
|
||||
* - @subpage x86_boot_preparation
|
||||
*/
|
|
@ -61,7 +61,7 @@ static struct env_context *context;
|
|||
|
||||
/**
|
||||
* Remove a list of environment variables
|
||||
* @param[inout] v Variable anchor to remove
|
||||
* @param[in] v Variable anchor to remove
|
||||
*/
|
||||
static void free_variables(struct variable_d *v)
|
||||
{
|
||||
|
|
|
@ -31,8 +31,9 @@
|
|||
*
|
||||
*/
|
||||
|
||||
/* The DEBUG define must be before common to enable debugging */
|
||||
/* #define DEBUG */
|
||||
#ifdef CONFIG_ENABLE_FLASH_NOISE
|
||||
# define DEBUG
|
||||
#endif
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/byteorder.h>
|
||||
|
@ -42,22 +43,6 @@
|
|||
#include <malloc.h>
|
||||
#include <cfi_flash.h>
|
||||
|
||||
/*
|
||||
* This file implements a Common Flash Interface (CFI) driver for U-Boot.
|
||||
* The width of the port and the width of the chips are determined at initialization.
|
||||
* These widths are used to calculate the address for access CFI data structures.
|
||||
*
|
||||
* References
|
||||
* JEDEC Standard JESD68 - Common Flash Interface (CFI)
|
||||
* JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
|
||||
* Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
|
||||
* Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
|
||||
* AMD CFI Specification, Release 2.0 December 1, 2001
|
||||
* AMD/Spansion Application Note: Migration from Single-byte to Three-byte
|
||||
* Device IDs, Publication Number 25538 Revision A, November 8, 2001
|
||||
*
|
||||
*/
|
||||
|
||||
#define FLASH_CMD_CFI 0x98
|
||||
#define FLASH_CMD_READ_ID 0x90
|
||||
#define FLASH_CMD_RESET 0xff
|
||||
|
@ -326,16 +311,14 @@ static int cfi_probe (struct device_d *dev)
|
|||
|
||||
dev->priv = (void *)info;
|
||||
|
||||
printf("cfi_probe: %s base: 0x%08x size: 0x%08x\n", dev->name, dev->map_base, dev->size);
|
||||
debug ("cfi_probe: %s base: 0x%08x size: 0x%08x\n", dev->name, dev->map_base, dev->size);
|
||||
|
||||
/* Init: no FLASHes known */
|
||||
info->flash_id = FLASH_UNKNOWN;
|
||||
size += info->size = flash_get_size(info, dev->map_base);
|
||||
if (info->flash_id == FLASH_UNKNOWN) {
|
||||
#ifndef CFG_FLASH_QUIET_TEST
|
||||
printf ("## Unknown FLASH on Bank at 0x%08x - Size = 0x%08lx = %ld MB\n",
|
||||
debug ("## Unknown FLASH on Bank at 0x%08x - Size = 0x%08lx = %ld MB\n",
|
||||
dev->map_base, info->size, info->size << 20);
|
||||
#endif /* CFG_FLASH_QUIET_TEST */
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -1495,3 +1478,22 @@ static int flash_write_cfibuffer (flash_info_t * info, ulong dest, const uchar *
|
|||
}
|
||||
#endif /* CONFIG_CFI_BUFFER_WRITE */
|
||||
|
||||
/**
|
||||
* @file
|
||||
* @brief This file implements a Common Flash Interface (CFI) driver for U-Boot.
|
||||
*
|
||||
* This file implements a Common Flash Interface (CFI) driver for U-Boot.
|
||||
* The width of the port and the width of the chips are determined at initialization.
|
||||
* These widths are used to calculate the address for access CFI data structures.
|
||||
*
|
||||
* References
|
||||
*
|
||||
* - JEDEC Standard JESD68 - Common Flash Interface (CFI)
|
||||
* - JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
|
||||
* - Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
|
||||
* - Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
|
||||
* - AMD CFI Specification, Release 2.0 December 1, 2001
|
||||
* - AMD/Spansion Application Note: Migration from Single-byte to Three-byte
|
||||
* Device IDs, Publication Number 25538 Revision A, November 8, 2001
|
||||
*
|
||||
*/
|
||||
|
|
|
@ -504,10 +504,10 @@ static int nand_check_wp (struct mtd_info *mtd)
|
|||
|
||||
/**
|
||||
* nand_block_checkbad - [GENERIC] Check if a block is marked bad
|
||||
* @mtd: MTD device structure
|
||||
* @ofs: offset from device start
|
||||
* @getchip: 0, if the chip is already selected
|
||||
* @allowbbt: 1, if its allowed to access the bbt area
|
||||
* @param[in] mtd: MTD device structure
|
||||
* @param[in] ofs: offset from device start
|
||||
* @param[in] getchip: 0, if the chip is already selected
|
||||
* @param[in] allowbbt: 1, if its allowed to access the bbt area
|
||||
*
|
||||
* Check, if the block is bad. Either by reading the bad block table or
|
||||
* calling of the scan function.
|
||||
|
@ -525,10 +525,10 @@ static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, i
|
|||
|
||||
/**
|
||||
* nand_command - [DEFAULT] Send command to NAND device
|
||||
* @mtd: MTD device structure
|
||||
* @command: the command to be sent
|
||||
* @column: the column address for this command, -1 if none
|
||||
* @page_addr: the page address for this command, -1 if none
|
||||
* @param[in] mtd: MTD device structure
|
||||
* @param[in] command: the command to be sent
|
||||
* @param[in] column: the column address for this command, -1 if none
|
||||
* @param[in] page_addr: the page address for this command, -1 if none
|
||||
*
|
||||
* Send command to NAND device. This function is used for small page
|
||||
* devices (256/512 Bytes per page)
|
||||
|
@ -628,10 +628,10 @@ static void nand_command (struct mtd_info *mtd, unsigned command, int column, in
|
|||
|
||||
/**
|
||||
* nand_command_lp - [DEFAULT] Send command to NAND large page device
|
||||
* @mtd: MTD device structure
|
||||
* @command: the command to be sent
|
||||
* @column: the column address for this command, -1 if none
|
||||
* @page_addr: the page address for this command, -1 if none
|
||||
* @param[in] mtd: MTD device structure
|
||||
* @param[in] command: the command to be sent
|
||||
* @param[in] column: the column address for this command, -1 if none
|
||||
* @param[in] page_addr: the page address for this command, -1 if none
|
||||
*
|
||||
* Send command to NAND device. This is the version for the new large page devices
|
||||
* We dont have the seperate regions as we have in the small page devices.
|
||||
|
@ -733,9 +733,9 @@ static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column,
|
|||
|
||||
/**
|
||||
* nand_get_device - [GENERIC] Get chip for selected access
|
||||
* @this: the nand chip descriptor
|
||||
* @mtd: MTD device structure
|
||||
* @new_state: the state which is requested
|
||||
* @param[in] this: the nand chip descriptor
|
||||
* @param[in] mtd: MTD device structure
|
||||
* @param[in] new_state: the state which is requested
|
||||
*
|
||||
* Get the device and lock it for exclusive access
|
||||
*/
|
||||
|
@ -782,9 +782,9 @@ static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int n
|
|||
|
||||
/**
|
||||
* nand_wait - [DEFAULT] wait until the command is done
|
||||
* @mtd: MTD device structure
|
||||
* @this: NAND chip structure
|
||||
* @state: state to select the max. timeout value
|
||||
* @param[in] mtd: MTD device structure
|
||||
* @param[in] this: NAND chip structure
|
||||
* @param[in] state: state to select the max. timeout value
|
||||
*
|
||||
* Wait for command done. This applies to erase and program only
|
||||
* Erase can take up to 400ms and program up to 20ms according to
|
||||
|
@ -873,12 +873,12 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
|
|||
|
||||
/**
|
||||
* nand_write_page - [GENERIC] write one page
|
||||
* @mtd: MTD device structure
|
||||
* @this: NAND chip structure
|
||||
* @page: startpage inside the chip, must be called with (page & this->pagemask)
|
||||
* @oob_buf: out of band data buffer
|
||||
* @oobsel: out of band selecttion structre
|
||||
* @cached: 1 = enable cached programming if supported by chip
|
||||
* @param[in] mtd: MTD device structure
|
||||
* @param[in] this: NAND chip structure
|
||||
* @param[in] page: startpage inside the chip, must be called with (page & this->pagemask)
|
||||
* @param[in] oob_buf: out of band data buffer
|
||||
* @param[in] oobsel: out of band selecttion structre
|
||||
* @param[in] cached: 1 = enable cached programming if supported by chip
|
||||
*
|
||||
* Nand_page_program function is used for write and writev !
|
||||
* This function will always program a full page of data
|
||||
|
@ -967,14 +967,14 @@ static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int pa
|
|||
#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
|
||||
/**
|
||||
* nand_verify_pages - [GENERIC] verify the chip contents after a write
|
||||
* @mtd: MTD device structure
|
||||
* @this: NAND chip structure
|
||||
* @page: startpage inside the chip, must be called with (page & this->pagemask)
|
||||
* @numpages: number of pages to verify
|
||||
* @oob_buf: out of band data buffer
|
||||
* @oobsel: out of band selecttion structre
|
||||
* @chipnr: number of the current chip
|
||||
* @oobmode: 1 = full buffer verify, 0 = ecc only
|
||||
* @param[in] mtd: MTD device structure
|
||||
* @param[in] this: NAND chip structure
|
||||
* @param[in] page: startpage inside the chip, must be called with (page & this->pagemask)
|
||||
* @param[in] numpages: number of pages to verify
|
||||
* @param[in] oob_buf: out of band data buffer
|
||||
* @param[in] oobsel: out of band selecttion structre
|
||||
* @param[in] chipnr: number of the current chip
|
||||
* @param[in] oobmode: 1 = full buffer verify, 0 = ecc only
|
||||
*
|
||||
* The NAND device assumes that it is always writing to a cleanly erased page.
|
||||
* Hence, it performs its internal write verification only on bits that
|
||||
|
@ -1078,11 +1078,11 @@ out:
|
|||
|
||||
/**
|
||||
* nand_read - [MTD Interface] MTD compability function for nand_read_ecc
|
||||
* @mtd: MTD device structure
|
||||
* @from: offset to read from
|
||||
* @len: number of bytes to read
|
||||
* @retlen: pointer to variable to store the number of read bytes
|
||||
* @buf: the databuffer to put data
|
||||
* @param[in] mtd: MTD device structure
|
||||
* @param[in] from: offset to read from
|
||||
* @param[in] len: number of bytes to read
|
||||
* @param[in] retlen: pointer to variable to store the number of read bytes
|
||||
* @param[in] buf: the databuffer to put data
|
||||
*
|
||||
* This function simply calls nand_read_ecc with oob buffer and oobsel = NULL
|
||||
*/
|
||||
|
@ -1094,11 +1094,11 @@ static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * re
|
|||
|
||||
/**
|
||||
* nand_read_ecc - [MTD Interface] Read data with ECC
|
||||
* @mtd: MTD device structure
|
||||
* @from: offset to read from
|
||||
* @len: number of bytes to read
|
||||
* @retlen: pointer to variable to store the number of read bytes
|
||||
* @buf: the databuffer to put data
|
||||
* @param[in] mtd: MTD device structure
|
||||
* @param[in] from: offset to read from
|
||||
* @param[in] len: number of bytes to read
|
||||
* @param[in] retlen: pointer to variable to store the number of read bytes
|
||||
* @param[in] buf: the databuffer to put data
|
||||
* @oob_buf: filesystem supplied oob data buffer
|
||||
* @oobsel: oob selection structure
|
||||
*
|
||||
|
@ -2041,7 +2041,7 @@ out:
|
|||
/**
|
||||
* single_erease_cmd - [GENERIC] NAND standard block erase command function
|
||||
* @mtd: MTD device structure
|
||||
* @page: the page address of the block which will be erased
|
||||
* @param[in] page: the page address of the block which will be erased
|
||||
*
|
||||
* Standard erase command for NAND chips
|
||||
*/
|
||||
|
@ -2056,7 +2056,7 @@ static void single_erase_cmd (struct mtd_info *mtd, int page)
|
|||
/**
|
||||
* multi_erease_cmd - [GENERIC] AND specific block erase command function
|
||||
* @mtd: MTD device structure
|
||||
* @page: the page address of the block which will be erased
|
||||
* @param[in] page: the page address of the block which will be erased
|
||||
*
|
||||
* AND multi block erase command function
|
||||
* Erase 4 consecutive blocks
|
||||
|
|
|
@ -108,7 +108,7 @@ static int check_pattern (uint8_t *buf, int len, int paglen, struct nand_bbt_des
|
|||
* read_bbt - [GENERIC] Read the bad block table starting from page
|
||||
* @mtd: MTD device structure
|
||||
* @buf: temporary buffer
|
||||
* @page: the starting page
|
||||
* @param[in] page: the starting page
|
||||
* @num: the number of bbt descriptors to read
|
||||
* @bits: number of bits per block
|
||||
* @offs: offset in the memory table
|
||||
|
|
Loading…
Reference in New Issue