diff --git a/CHANGELOG b/CHANGELOG
index d497bd0b7..3a88aaf22 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,18 @@
 Changes for U-Boot 1.0.2:
 ======================================================================
 
+* Patch by Tolunay Orkun, 5 Mar 2004:
+  Fix early board initialization for Cogent CSB272 board
+
+* Patch by Ed Okerson, 3 Mar 2004:
+  fix CFI flash writes for little endian systems
+
+* Patch by Reinhard Meyer, 01 Mar 2004:
+  generalize USB and IDE support for MPC5200 with according
+  changes to IceCube.h and TOP5200.h
+  add Am29LV256 256 MBit FLASH support for TOP5200 boards
+  add info about USB and IDE to README
+
 * Patch by Yuli Barcohen, 4 Mar 2004:
   Fix problems with GCC 3.3.x which changed handling of global
   variables explicitly initialized to zero (now in .bss instead of
diff --git a/README b/README
index 5bf0ead24..1df1ef063 100644
--- a/README
+++ b/README
@@ -660,10 +660,13 @@ The following options need to be configured:
 		one partition type as well.
 
 - IDE Reset method:
-		CONFIG_IDE_RESET_ROUTINE
+		CONFIG_IDE_RESET_ROUTINE - this is defined in several
+		board configurations files but used nowhere!
 
-		Set this to define that instead of a reset Pin, the
-		routine ide_set_reset(int idereset) will be used.
+		CONFIG_IDE_RESET - is this is defined, IDE Reset will
+		be performed by calling the function
+			ide_set_reset(int reset)
+		which has to be defined in a board specific file
 
 - ATAPI Support:
 		CONFIG_ATAPI
@@ -728,7 +731,7 @@ The following options need to be configured:
 
 - USB Support:
 		At the moment only the UHCI host controller is
-		supported (PIP405, MIP405); define
+		supported (PIP405, MIP405, MPC5200); define
 		CONFIG_USB_UHCI to enable it.
 		define CONFIG_USB_KEYBOARD to enable the USB Keyboard
 		end define CONFIG_USB_STORAGE to enable the USB
@@ -736,6 +739,13 @@ The following options need to be configured:
 		Note:
 		Supported are USB Keyboards and USB Floppy drives
 		(TEAC FD-05PUB).
+		MPC5200 USB requires additional defines:
+			CONFIG_USB_CLOCK
+				for 528 MHz Clock: 0x0001bbbb
+			CONFIG_USB_CONFIG
+				for differential drivers: 0x00001000
+				for single ended drivers: 0x00005000
+
 
 - MMC Support:
 		The MMC controller on the Intel PXA is supported. To
diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c
index 0604189be..120cde7ce 100644
--- a/board/csb272/csb272.c
+++ b/board/csb272/csb272.c
@@ -21,9 +21,8 @@
  * MA 02111-1307 USA
  */
 
-#include <asm/u-boot.h>
-#include <asm/processor.h>
 #include <common.h>
+#include <asm/processor.h>
 #include <i2c.h>
 #include <miiphy.h>
 #include <405gp_enet.h>
@@ -57,10 +56,10 @@ int pll_init(void)
 }
 
 /*
- * board_pre_init: do any preliminary board initialization
+ * board_early_init_f: do early board initialization
  *
  */
-int board_pre_init(void)
+int board_early_init_f(void)
 {
 	/* initialize PLL so UART, LCD, Ethernet clocked at correctly */
 	(void) get_clocks();
@@ -172,3 +171,4 @@ int last_stage_init(void)
 
 	return 0; /* success */
 }
+
diff --git a/board/emk/common/flash.c b/board/emk/common/flash.c
index adfa9a0fb..966bb5c64 100644
--- a/board/emk/common/flash.c
+++ b/board/emk/common/flash.c
@@ -40,9 +40,11 @@ flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
   #define FLASH_CYCLE2	0x02aa
   #define FLASH_ID1		0
   #define FLASH_ID2		1
+  #define FLASH_ID3		0x0e
+  #define FLASH_ID4		0x0F
 #endif
 
-#if defined (CONFIG_TOP5200)
+#if defined (CONFIG_TOP5200) && !defined (CONFIG_LITE5200)
   typedef unsigned char FLASH_PORT_WIDTH;
   typedef volatile unsigned char FLASH_PORT_WIDTHV;
   #define	FLASH_ID_MASK	0xFF
@@ -54,6 +56,24 @@ flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
   #define FLASH_CYCLE2	0x0555
   #define FLASH_ID1		0
   #define FLASH_ID2		2
+  #define FLASH_ID3		0x1c
+  #define FLASH_ID4		0x1E
+#endif
+
+#if defined (CONFIG_TOP5200) && defined (CONFIG_LITE5200)
+  typedef unsigned char FLASH_PORT_WIDTH;
+  typedef volatile unsigned char FLASH_PORT_WIDTHV;
+  #define	FLASH_ID_MASK	0xFF
+
+  #define FPW	FLASH_PORT_WIDTH
+  #define FPWV	FLASH_PORT_WIDTHV
+
+  #define FLASH_CYCLE1	0x0555
+  #define FLASH_CYCLE2	0x02aa
+  #define FLASH_ID1		0
+  #define FLASH_ID2		1
+  #define FLASH_ID3		0x0E
+  #define FLASH_ID4		0x0F
 #endif
 
 /*-----------------------------------------------------------------------
@@ -183,6 +203,15 @@ void flash_print_info (flash_info_t *info)
 	case FLASH_AM160B:
 		fmt = "29LV160%s (16 Mbit, %s)\n";
 		break;
+	case FLASH_AMLV640U:
+		fmt = "29LV640M (64 Mbit)\n";
+		break;
+	case FLASH_AMDLV065D:
+		fmt = "29LV065D (64 Mbit)\n";
+		break;
+	case FLASH_AMLV256U:
+		fmt = "29LV256M (256 Mbit)\n";
+		break;
 	default:
 		fmt = "Unknown Chip Type\n";
 		break;
@@ -239,7 +268,6 @@ void flash_print_info (flash_info_t *info)
 ulong flash_get_size (FPWV *addr, flash_info_t *info)
 {
 	int		i;
-	ulong	offset;
 
 	/* Write auto select command: read Manufacturer ID */
 	/* Write auto select command sequence and test FLASH answer */
@@ -278,27 +306,64 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info)
 		info->flash_id += FLASH_AM160B;
 		info->sector_count = 35;
 		info->size = 0x00200000;
-#ifdef CFG_LOWBOOT
-		offset = 0;
-#else
-		offset = 0x00e00000;
-#endif
-		info->start[0] = (ulong)addr + offset;
-		info->start[1] = (ulong)addr + offset + 0x4000;
-		info->start[2] = (ulong)addr + offset + 0x6000;
-		info->start[3] = (ulong)addr + offset + 0x8000;
+		info->start[0] = (ulong)addr;
+		info->start[1] = (ulong)addr + 0x4000;
+		info->start[2] = (ulong)addr + 0x6000;
+		info->start[3] = (ulong)addr + 0x8000;
 		for (i = 4; i < info->sector_count; i++)
 		{
-			info->start[i] = (ulong)addr + offset + 0x10000 * (i-3);
+			info->start[i] = (ulong)addr + 0x10000 * (i-3);
 		}
 		break;
 
+	case (FPW)AMD_ID_LV065D:
+		info->flash_id += FLASH_AMDLV065D;
+		info->sector_count = 128;
+		info->size = 0x00800000;
+		for (i = 0; i < info->sector_count; i++)
+		{
+			info->start[i] = (ulong)addr + 0x10000 * i;
+		}
+		break;
+
+	case (FPW)AMD_ID_MIRROR:
+		/* MIRROR BIT FLASH, read more ID bytes */
+		if ((FPW)addr[FLASH_ID3] == (FPW)AMD_ID_LV640U_2 &&
+			(FPW)addr[FLASH_ID4] == (FPW)AMD_ID_LV640U_3)
+		{
+			info->flash_id += FLASH_AMLV640U;
+			info->sector_count = 128;
+			info->size = 0x00800000;
+			for (i = 0; i < info->sector_count; i++)
+			{
+				info->start[i] = (ulong)addr + 0x10000 * i;
+			}
+			break;
+		}
+		if ((FPW)addr[FLASH_ID3] == (FPW)AMD_ID_LV256U_2 &&
+			(FPW)addr[FLASH_ID4] == (FPW)AMD_ID_LV256U_3)
+		{
+			/* attention: only the first 16 MB will be used in u-boot */
+			info->flash_id += FLASH_AMLV256U;
+			info->sector_count = 256;
+			info->size = 0x01000000;
+			for (i = 0; i < info->sector_count; i++)
+			{
+				info->start[i] = (ulong)addr + 0x10000 * i;
+			}
+			break;
+		}
+		
+		/* fall thru to here ! */
 	default:
-		printf ("unknown AMD device=%x ", (FPW)addr[FLASH_ID2]);
+		printf ("unknown AMD device=%x %x %x",
+			(FPW)addr[FLASH_ID2],
+			(FPW)addr[FLASH_ID3],
+			(FPW)addr[FLASH_ID4]);
 		info->flash_id = FLASH_UNKNOWN;
 		info->sector_count = 0;
-		info->size = 0;
-		return (0);			/* => no or unknown flash */
+		info->size = 0x800000;
+		break;
 	}
 
 	/* Put FLASH back in read mode */
@@ -329,6 +394,7 @@ int	flash_erase (flash_info_t *info, int s_first, int s_last)
 
 	switch (info->flash_id & FLASH_TYPEMASK) {
 	case FLASH_AM160B:
+	case FLASH_AMLV640U:
 		break;
 	case FLASH_UNKNOWN:
 	default:
diff --git a/board/emk/top5200/top5200.c b/board/emk/top5200/top5200.c
index b65d2d0d0..94ba2b4ed 100644
--- a/board/emk/top5200/top5200.c
+++ b/board/emk/top5200/top5200.c
@@ -113,11 +113,15 @@ int checkboard (void)
 #if defined (CONFIG_EVAL5200)
 	puts ("Board: EMK TOP5200 on EVAL5200\n");
 #else
+#if defined (CONFIG_LITE5200)
+	puts ("Board: LITE5200\n");
+#else
 #if defined (CONFIG_MINI5200)
 	puts ("Board: EMK TOP5200 on MINI5200\n");
 #else
 	puts ("Board: EMK TOP5200\n");
 #endif
+#endif
 #endif
 	return 0;
 }
@@ -155,10 +159,11 @@ void flash_afterinit(uint bank, ulong start, ulong size)
  *****************************************************************************/
 int misc_init_r (void)
 {
+#if !defined (CONFIG_LITE5200)
 	/* read 'factory' part of EEPROM */
 	extern void read_factory_r (void);
 	read_factory_r ();
-
+#endif
 	return (0);
 }
 
@@ -175,3 +180,23 @@ void pci_init_board(void)
 	pci_mpc5xxx_init(&hose);
 }
 #endif
+
+/*****************************************************************************
+ * provide the PCI Reset Function
+ *****************************************************************************/
+#ifdef CFG_CMD_IDE
+#define GPIO_PSC1_4	0x01000000ul
+void ide_set_reset (int idereset)
+{
+	if (idereset) {
+		*(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
+	} else {
+		*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
+	}
+
+	/* Configure PSC1_4 as GPIO output for ATA reset */
+	/* (it does not matter we do this every time) */
+	*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
+	*(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
+}
+#endif
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index 0a4bed49c..d2fda90c9 100644
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -210,25 +210,25 @@ void pci_init_board(void)
 
 #if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
 
-#define GPIO_PSC1_4	0x01000000ul
+#define GPIO_PSC1_4	0x01000000UL
 
 void init_ide_reset (void)
 {
-    printf ("init_ide_reset\n");
+	debug ("init_ide_reset\n");
     
     	/* Configure PSC1_4 as GPIO output for ATA reset */
-	*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
 	*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC1_4;
-	*(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC1_4;
+	*(vu_long *) MPC5XXX_WU_GPIO_DIR    |= GPIO_PSC1_4;
 }
 
 void ide_set_reset (int idereset)
 {
-    printf ("ide_reset(%d)\n", idereset);
+	debug ("ide_reset(%d)\n", idereset);
+
 	if (idereset) {
 		*(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC1_4;
 	} else {
-		*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC1_4;
+		*(vu_long *) MPC5XXX_WU_GPIO_DATA |=  GPIO_PSC1_4;
 	}
 }
 #endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index e96a5f59a..f7b28caea 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -503,6 +503,7 @@ void ide_init (void)
 #endif	/* CONFIG_IDE_8xx_PCCARD */
 
 #ifdef CONFIG_IDE_PREINIT
+	extern int ide_preinit (void);
 	WATCHDOG_RESET();
 
 	if (ide_preinit ()) {
diff --git a/cpu/mpc5xxx/usb_ohci.c b/cpu/mpc5xxx/usb_ohci.c
index 97ecb9121..55f6d35e5 100644
--- a/cpu/mpc5xxx/usb_ohci.c
+++ b/cpu/mpc5xxx/usb_ohci.c
@@ -1532,12 +1532,13 @@ int usb_lowlevel_init(void)
 {
 
 	/* Set the USB Clock						     */
-	*(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CDMFDC5xxx;
+	*(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
 
 	/* remove all USB bits first before ORing in ours */
 	*(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00807000;
+
 	/* Activate USB port						     */
-	*(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_GPSCFG5xxx;
+	*(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_CONFIG;
 
 	memset (&gohci, 0, sizeof (ohci_t));
 	memset (&urb_priv, 0, sizeof (urb_priv_t));
diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c
index d31b38f1b..7a7575b26 100644
--- a/drivers/cfi_flash.c
+++ b/drivers/cfi_flash.c
@@ -724,18 +724,42 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
  */
 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 {
+#if defined(__LITTLE_ENDIAN)
+	unsigned short	w;
+	unsigned int	l;
+	unsigned long long ll;
+#endif
+
 	switch (info->portwidth) {
 	case FLASH_CFI_8BIT:
 		cword->c = c;
 		break;
 	case FLASH_CFI_16BIT:
+#if defined(__LITTLE_ENDIAN)
+		w = c;
+		w <<= 8;
+		cword->w = (cword->w >> 8) | w;
+#else
 		cword->w = (cword->w << 8) | c;
+#endif
 		break;
 	case FLASH_CFI_32BIT:
+#if defined(__LITTLE_ENDIAN)
+		l = c;
+		l <<= 24;
+		cword->l = (cword->l >> 8) | l;
+#else
 		cword->l = (cword->l << 8) | c;
+#endif
 		break;
 	case FLASH_CFI_64BIT:
+#if defined(__LITTLE_ENDIAN)
+		ll = c;
+		ll <<= 56;
+		cword->ll = (cword->ll >> 8) | ll;
+#else
 		cword->ll = (cword->ll << 8) | c;
+#endif
 		break;
 	}
 }
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index 3538e1c2b..39a91424a 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -305,8 +305,8 @@
  * USB stuff
  *-----------------------------------------------------------------------
  */
-#define CONFIG_USB_CDMFDC5xxx   0x0001BBBB
-#define CONFIG_USB_GPSCFG5xxx   0x00001000
+#define CONFIG_USB_CLOCK	0x0001BBBB
+#define CONFIG_USB_CONFIG	0x00001000
 
 /*-----------------------------------------------------------------------
  * IDE/ATA stuff Supports IDE harddisk
diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h
index ae4677d6a..930ed2722 100644
--- a/include/configs/TOP5200.h
+++ b/include/configs/TOP5200.h
@@ -63,7 +63,7 @@
 #define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
 
 
-#ifdef CONFIG_EVAL5200		/* PCI is supported with Evaluation board only */
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
 /*
  * PCI Mapping:
  * 0x40000000 - 0x4fffffff - PCI Memory
@@ -89,11 +89,41 @@
 
 #endif
 
+/* USB */
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
+
+#  define CONFIG_USB_OHCI
+#  define CONFIG_USB_CLOCK	0x0001bbbb
+#  define CONFIG_USB_CONFIG	0x00005000
+#  define ADD_USB_CMD             CFG_CMD_USB | CFG_CMD_FAT
+#  define CONFIG_DOS_PARTITION
+#  define CONFIG_USB_STORAGE
+
+#else
+
+#  define ADD_USB_CMD		0
+
+#endif
+
+/* IDE */
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
+
+#  define ADD_IDE_CMD             CFG_CMD_IDE | CFG_CMD_FAT
+#  define CONFIG_DOS_PARTITION
+
+#else
+
+#  define ADD_IDE_CMD		0
+
+#endif
+
 /*
  * Supported commands
  */
 #define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \
 				ADD_PCI_CMD	| \
+				ADD_USB_CMD	| \
+				ADD_IDE_CMD | \
 				CFG_CMD_ASKENV	| \
 				CFG_CMD_DATE	| \
 				CFG_CMD_DHCP	| \
@@ -110,11 +140,13 @@
 #include <cmd_confdefs.h>
 
 /*
- * low boot
+ * MUST be low boot - HIGHBOOT is not supported anymore
  */
 #if (TEXT_BASE == 0xFF000000)		/* Boot low with 16 MB Flash */
 #   define CFG_LOWBOOT		1
 #   define CFG_LOWBOOT16	1
+#else
+#   error "TEXT_BASE must be 0xff000000"
 #endif
 
 /*
@@ -168,7 +200,7 @@
 #define CONFIG_MISC_INIT_R
 
 #undef	CONFIG_HARD_I2C			/* I2C with hardware support */
-#define	CONFIG_SOFT_I2C		1
+#define	CONFIG_SOFT_I2C		1	/* I2C with softwate support */
 
 #if defined (CONFIG_SOFT_I2C)
 #  define SDA0			0x40
@@ -187,12 +219,16 @@
 #  define I2C_TRISTATE	{DDR0&=~SDA0;}
 #  define CFG_I2C_SPEED		100000
 #  define CFG_I2C_SLAVE		0x7F
+#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_FACT_ADDR	0x57
 #endif
 
 #if defined (CONFIG_HARD_I2C)
 #  define CFG_I2C_MODULE	2		/* Select I2C module #1 or #2 */
 #  define CFG_I2C_SPEED		100000	/* 100 kHz */
 #  define CFG_I2C_SLAVE		0x7F
+#define CFG_I2C_EEPROM_ADDR 0x54
+#define CFG_I2C_FACT_ADDR	0x54
 #endif
 
 /*
@@ -242,14 +278,12 @@
 #define CFG_ENV_IS_IN_EEPROM	1	/* turn on EEPROM env feature */
 #define CFG_ENV_OFFSET		0x1000
 #define CFG_ENV_SIZE		0x0700
-#define CFG_I2C_EEPROM_ADDR 0x57
 
 /*
  * VPD settings
  */
 #define CFG_FACT_OFFSET		0x1800
 #define CFG_FACT_SIZE		0x0800
-#define CFG_I2C_FACT_ADDR	0x57
 
 /*
  * Memory map
@@ -310,7 +344,7 @@
 #define CFG_MEMTEST_START	0x00100000	/* memtest works on */
 #define CFG_MEMTEST_END		0x01f00000	/* 1 ... 31 MB in DRAM	*/
 
-#define CFG_LOAD_ADDR		0x100000	/* default load address */
+#define CFG_LOAD_ADDR		0x200000	/* default load address */
 
 #define CFG_HZ			1000	/* decrementer freq: 1 ms ticks */
 
@@ -345,4 +379,36 @@
 
 #define CFG_RESET_ADDRESS	0x7f000000
 
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef  CONFIG_IDE_8xx_PCCARD		/* Use IDE with PC Card	Adapter	*/
+
+#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
+#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
+
+#define CONFIG_IDE_RESET	1
+#define CONFIG_IDE_PREINIT
+
+#define CFG_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
+#define CFG_IDE_MAXDEVICE	1	/* max. 1 drive per IDE bus	*/
+
+#define CFG_ATA_IDE0_OFFSET	0x0000
+
+#define CFG_ATA_BASE_ADDR	MPC5XXX_ATA
+
+/* Offset for data I/O			*/
+#define CFG_ATA_DATA_OFFSET	(0x0060)
+
+/* Offset for normal register accesses	*/
+#define CFG_ATA_REG_OFFSET	(CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers	*/
+#define CFG_ATA_ALT_OFFSET	(0x005c)
+
+/* Interval between registers                                                */
+#define CFG_ATA_STRIDE          4
+
 #endif /* __CONFIG_H */
diff --git a/include/configs/csb272.h b/include/configs/csb272.h
index 74577609e..edec868d5 100644
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@@ -36,7 +36,7 @@
 #define CONFIG_405GP		1	/* This is a PPC405GP CPU     	*/
 #define CONFIG_4xx		1	/* ...member of PPC4xx family   */
 #define CONFIG_CSB272		1	/* on a Cogent CSB272 board     */
-#define CONFIG_BOARD_PRE_INIT	1	/* Call board_pre_init()	*/
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f()    */
 #define CONFIG_LAST_STAGE_INIT	1	/* Call last_stage_init()	*/
 #define CONFIG_SYS_CLK_FREQ     33000000 /* external frequency to pll   */
 
diff --git a/include/flash.h b/include/flash.h
index bda11d51e..ce140b3b9 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -183,6 +183,8 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
 #define AMD_ID_LV640U_3	0x22012201	/* 3d ID word for AM29LV640M  at 0x3c */
 #define AMD_ID_LV128U_2 0x22122212	/* 2d ID word for AM29LV128M  at 0x38 */
 #define AMD_ID_LV128U_3 0x22002200	/* 3d ID word for AM29LV128M  at 0x3c */
+#define AMD_ID_LV256U_2 0x22122212	/* 2d ID word for AM29LV256M  at 0x38 */
+#define AMD_ID_LV256U_3 0x22012201	/* 3d ID word for AM29LV256M  at 0x3c */
 
 #define AMD_ID_LV320B_2	0x221A221A	/* 2d ID word for AM29LV320MB at 0x38 */
 #define AMD_ID_LV320B_3 0x22002200	/* 3d ID word for AM29LV320MB at 0x3c */
@@ -345,6 +347,7 @@ extern void flash_read_factory_serial(flash_info_t * info, void * buffer, int of
 #define FLASH_AMLV128U	0x00A6		/* AMD 29LV128M	   ( 128M = 8M x 16 )	*/
 #define FLASH_AMLV320B  0x00A7		/* AMD 29LV320MB   ( 32M = 2M x 16 )	*/
 #define FLASH_AMLV320T	0x00A8		/* AMD 29LV320MT   ( 32M = 2M x 16 )	*/
+#define FLASH_AMLV256U	0x00AA		/* AMD 29LV256M	   ( 256M = 16M x 16 )	*/
 /* Intel 28F256L18T 256M = 128K x 255 + 32k x 4	*/
 #define FLASH_28F256L18T 0x00B0
 #define FLASH_AMDL163T	0x00B2		/* AMD AM29DL163T (2M x 16 )			*/