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Merge branch 'for-next/mxs-reset' 

Conflicts:
	arch/arm/mach-mxs/Makefile
This commit is contained in:
Sascha Hauer 2012-07-02 11:02:10 +02:00
parent 1422cd1878 af76fae0fe
commit 4d499188bf
4 changed files with 77 additions and 64 deletions
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6
arch/arm/mach-mxs/Makefile
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@ -1,5 +1,5 @@
obj-y += imx.o iomux-imx.o reset-imx.o power.o
obj-y += imx.o iomux-imx.o power.o
obj-$(CONFIG_DRIVER_VIDEO_STM) += imx_lcd_clk.o
obj-$(CONFIG_ARCH_IMX23) += speed-imx23.o clocksource-imx23.o usb.o
obj-$(CONFIG_ARCH_IMX28) += speed-imx28.o clocksource-imx28.o
obj-$(CONFIG_ARCH_IMX23) += speed-imx23.o clocksource-imx23.o usb.o soc-imx23.o
obj-$(CONFIG_ARCH_IMX28) += speed-imx28.o clocksource-imx28.o soc-imx28.o
obj-$(CONFIG_MXS_OCOTP) += ocotp.o

61
arch/arm/mach-mxs/reset-imx.c
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@ -1,61 +0,0 @@
/*
* (C) Copyright 2010 Juergen Beisert - Pengutronix
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <init.h>
#include <notifier.h>
#include <mach/imx-regs.h>
#include <io.h>
#define HW_RTC_CTRL 0x000
# define BM_RTC_CTRL_WATCHDOGEN (1 << 4)
#define HW_RTC_CTRL_SET 0x004
#define HW_RTC_CTRL_CLR 0x008
#define HW_RTC_CTRL_TOG 0x00C
#define HW_RTC_WATCHDOG 0x050
#define HW_RTC_WATCHDOG_SET 0x054
#define HW_RTC_WATCHDOG_CLR 0x058
#define HW_RTC_WATCHDOG_TOG 0x05C
#define WDOG_COUNTER_RATE 1000 /* 1 kHz clock */
#define HW_RTC_PERSISTENT1 0x070
# define BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER 0x80000000
#define HW_RTC_PERSISTENT1_SET 0x074
#define HW_RTC_PERSISTENT1_CLR 0x078
#define HW_RTC_PERSISTENT1_TOG 0x07C
/*
* Reset the cpu by setting up the watchdog timer and let it time out
*
* TODO There is a much easier way to reset the CPU: Refer bit 2 in
* the HW_CLKCTRL_RESET register, data sheet page 106/4-30
*/
void __noreturn reset_cpu (unsigned long addr)
{
writel(WDOG_COUNTER_RATE, IMX_WDT_BASE + HW_RTC_WATCHDOG);
writel(BM_RTC_CTRL_WATCHDOGEN, IMX_WDT_BASE + HW_RTC_CTRL_SET);
writel(BV_RTC_PERSISTENT1_GENERAL__RTC_FORCE_UPDATER, IMX_WDT_BASE + HW_RTC_PERSISTENT1);
while (1)
;
/*NOTREACHED*/
}
EXPORT_SYMBOL(reset_cpu);

37
arch/arm/mach-mxs/soc-imx23.c Normal file
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@ -0,0 +1,37 @@
/*
* (c) 2012 Juergen Beisert <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Collection of some SoC specific functions
*/
#include <common.h>
#include <init.h>
#include <mach/imx-regs.h>
#include <io.h>
#define HW_CLKCTRL_RESET 0x120
# define HW_CLKCTRL_RESET_CHIP (1 << 1)
/* Reset the full i.MX23 SoC via a chipset feature */
void __noreturn reset_cpu(unsigned long addr)
{
u32 reg;
reg = readl(IMX_CCM_BASE + HW_CLKCTRL_RESET);
writel(reg | HW_CLKCTRL_RESET_CHIP, IMX_CCM_BASE + HW_CLKCTRL_RESET);
while (1)
;
/*NOTREACHED*/
}
EXPORT_SYMBOL(reset_cpu);

37
arch/arm/mach-mxs/soc-imx28.c Normal file
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@ -0,0 +1,37 @@
/*
* (c) 2012 Juergen Beisert <kernel@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Collection of some SoC specific functions
*/
#include <common.h>
#include <init.h>
#include <mach/imx-regs.h>
#include <io.h>
#define HW_CLKCTRL_RESET 0x1e0
# define HW_CLKCTRL_RESET_CHIP (1 << 1)
/* Reset the full i.MX28 SoC via a chipset feature */
void __noreturn reset_cpu(unsigned long addr)
{
u32 reg;
reg = readl(IMX_CCM_BASE + HW_CLKCTRL_RESET);
writel(reg | HW_CLKCTRL_RESET_CHIP, IMX_CCM_BASE + HW_CLKCTRL_RESET);
while (1)
;
/*NOTREACHED*/
}
EXPORT_SYMBOL(reset_cpu);