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ARM: mvebu: move lowlevel code to lowlevel.c 

mach-mvebu has two files containing lowlevel code. Consolidate both into
mach-mvebu/lowlevel.c. Also put the now empty mach-mvebu/common.c into
non-lowlevel obj-y as it will be used for common non-lowlevel code later.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This commit is contained in:
Sebastian Hesselbarth 2014-04-10 15:12:14 +02:00 committed by Sascha Hauer
parent 6656115566
commit 524bb1a287
3 changed files with 38 additions and 41 deletions
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2
arch/arm/mach-mvebu/Makefile
View File

@ -1,5 +1,5 @@
lwl-y += lowlevel.o
lwl-y += common.o
obj-y += common.o
obj-$(CONFIG_ARCH_ARMADA_370) += armada-370-xp.o
obj-$(CONFIG_ARCH_ARMADA_XP) += armada-370-xp.o
obj-$(CONFIG_ARCH_DOVE) += dove.o

40
arch/arm/mach-mvebu/common.c
View File

@ -15,43 +15,3 @@
*
*/
#include <common.h>
#include <io.h>
#include <sizes.h>
#include <asm/barebox-arm.h>
#include <mach/common.h>
/*
* All MVEBU SoCs start with internal registers at 0xd0000000.
* To get more contiguous address space and as Linux expects them
* there, we remap them early to 0xf1000000.
*
* There is no way to determine internal registers base address
* safely later on, as the remap register itself is within the
* internal registers.
*/
#define MVEBU_BOOTUP_INT_REG_BASE 0xd0000000
#define MVEBU_BRIDGE_REG_BASE 0x20000
#define DEVICE_INTERNAL_BASE_ADDR (MVEBU_BRIDGE_REG_BASE + 0x80)
static void mvebu_remap_registers(void)
{
writel(MVEBU_REMAP_INT_REG_BASE,
IOMEM(MVEBU_BOOTUP_INT_REG_BASE) + DEVICE_INTERNAL_BASE_ADDR);
}
/*
* Determining the actual memory size is highly SoC dependent,
* but for all SoCs RAM starts at 0x00000000. Therefore, we start
* with a minimal memory setup of 64M and probe correct memory size
* later.
*/
#define MVEBU_BOOTUP_MEMORY_BASE 0x00000000
#define MVEBU_BOOTUP_MEMORY_SIZE SZ_64M
void __naked __noreturn mvebu_barebox_entry(void *boarddata)
{
mvebu_remap_registers();
barebox_arm_entry(MVEBU_BOOTUP_MEMORY_BASE,
MVEBU_BOOTUP_MEMORY_SIZE, boarddata);
}

37
arch/arm/mach-mvebu/lowlevel.c
View File

@ -16,9 +16,11 @@
*/
#include <common.h>
#include <io.h>
#include <sizes.h>
#include <asm/barebox-arm.h>
#include <asm/barebox-arm-head.h>
#include <mach/common.h>
#include <mach/lowlevel.h>
void __naked barebox_arm_reset_vector(void)
@ -26,3 +28,38 @@ void __naked barebox_arm_reset_vector(void)
arm_cpu_lowlevel_init();
mvebu_barebox_entry(NULL);
}
/*
* All MVEBU SoCs start with internal registers at 0xd0000000.
* To get more contiguous address space and as Linux expects them
* there, we remap them early to 0xf1000000.
*
* There is no way to determine internal registers base address
* safely later on, as the remap register itself is within the
* internal registers.
*/
#define MVEBU_BOOTUP_INT_REG_BASE 0xd0000000
#define MVEBU_BRIDGE_REG_BASE 0x20000
#define DEVICE_INTERNAL_BASE_ADDR (MVEBU_BRIDGE_REG_BASE + 0x80)
static void mvebu_remap_registers(void)
{
writel(MVEBU_REMAP_INT_REG_BASE,
IOMEM(MVEBU_BOOTUP_INT_REG_BASE) + DEVICE_INTERNAL_BASE_ADDR);
}
/*
* Determining the actual memory size is highly SoC dependent,
* but for all SoCs RAM starts at 0x00000000. Therefore, we start
* with a minimal memory setup of 64M and probe correct memory size
* later.
*/
#define MVEBU_BOOTUP_MEMORY_BASE 0x00000000
#define MVEBU_BOOTUP_MEMORY_SIZE SZ_64M
void __naked __noreturn mvebu_barebox_entry(void *boarddata)
{
mvebu_remap_registers();
barebox_arm_entry(MVEBU_BOOTUP_MEMORY_BASE,
MVEBU_BOOTUP_MEMORY_SIZE, boarddata);
}