mci mxs: make the mci_host a member of mxs_mci_host
This allows for more type safety. passing a struct device_d internally in the driver is not a good idea. Also, this patch adds a void __iomem *regs to mxs_mci_host. dev->map_base should not be used for register accesses. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer
parent
353d1ffa3d
commit
5259adf5c9
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@ -166,6 +166,8 @@
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#endif
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struct mxs_mci_host {
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struct mci_host host;
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void __iomem *regs;
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unsigned clock; /* current clock speed in Hz ("0" if disabled) */
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unsigned index;
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#ifdef CONFIG_MCI_INFO
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@ -175,16 +177,16 @@ struct mxs_mci_host {
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int bus_width:2; /* 0 = 1 bit, 1 = 4 bit, 2 = 8 bit */
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};
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#define to_mxs_mci(mxs) container_of(mxs, struct mxs_mci_host, host)
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/**
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* Get the SSP clock rate
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* @param hw_dev Host interface device instance
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* @return Unit's clock in [Hz]
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*/
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static unsigned mxs_mci_get_unit_clock(struct device_d *hw_dev)
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static unsigned mxs_mci_get_unit_clock(struct mxs_mci_host *mxs_mci)
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{
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struct mxs_mci_host *host_data = GET_HOST_DATA(hw_dev);
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return imx_get_sspclk(host_data->index);
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return imx_get_sspclk(mxs_mci->index);
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}
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/**
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@ -193,7 +195,7 @@ static unsigned mxs_mci_get_unit_clock(struct device_d *hw_dev)
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* @param cmd Command description
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* @return Response bytes count, -EINVAL for unsupported response types
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*/
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static int mxs_mci_get_cards_response(struct device_d *hw_dev, struct mci_cmd *cmd)
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static int mxs_mci_get_cards_response(struct mxs_mci_host *mxs_mci, struct mci_cmd *cmd)
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{
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switch (cmd->resp_type) {
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case MMC_RSP_NONE:
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@ -202,14 +204,14 @@ static int mxs_mci_get_cards_response(struct device_d *hw_dev, struct mci_cmd *c
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case MMC_RSP_R1:
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case MMC_RSP_R1b:
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case MMC_RSP_R3:
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cmd->response[0] = readl(hw_dev->map_base + HW_SSP_SDRESP0);
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cmd->response[0] = readl(mxs_mci->regs + HW_SSP_SDRESP0);
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return 1;
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case MMC_RSP_R2:
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cmd->response[3] = readl(hw_dev->map_base + HW_SSP_SDRESP0);
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cmd->response[2] = readl(hw_dev->map_base + HW_SSP_SDRESP1);
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cmd->response[1] = readl(hw_dev->map_base + HW_SSP_SDRESP2);
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cmd->response[0] = readl(hw_dev->map_base + HW_SSP_SDRESP3);
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cmd->response[3] = readl(mxs_mci->regs + HW_SSP_SDRESP0);
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cmd->response[2] = readl(mxs_mci->regs + HW_SSP_SDRESP1);
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cmd->response[1] = readl(mxs_mci->regs + HW_SSP_SDRESP2);
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cmd->response[0] = readl(mxs_mci->regs + HW_SSP_SDRESP3);
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return 4;
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}
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@ -222,10 +224,10 @@ static int mxs_mci_get_cards_response(struct device_d *hw_dev, struct mci_cmd *c
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*
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* Can also stop the clock to save power
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*/
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static void mxs_mci_finish_request(struct device_d *hw_dev)
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static void mxs_mci_finish_request(struct mxs_mci_host *mxs_mci)
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{
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/* stop the engines (normaly already done) */
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writel(SSP_CTRL0_RUN, hw_dev->map_base + HW_SSP_CTRL0 + 8);
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writel(SSP_CTRL0_RUN, mxs_mci->regs + HW_SSP_CTRL0 + 8);
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}
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/**
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@ -260,13 +262,13 @@ static int mxs_mci_get_cmd_error(unsigned status)
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* @param hw_dev Host interface device instance
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* @param to Timeout value in MCI card's bus clocks
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*/
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static void mxs_mci_setup_timeout(struct device_d *hw_dev, unsigned to)
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static void mxs_mci_setup_timeout(struct mxs_mci_host *mxs_mci, unsigned to)
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{
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uint32_t reg;
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reg = readl(hw_dev->map_base + HW_SSP_TIMING) & ~SSP_TIMING_TIMEOUT_MASK;
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reg = readl(mxs_mci->regs + HW_SSP_TIMING) & ~SSP_TIMING_TIMEOUT_MASK;
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reg |= SSP_TIMING_TIMEOUT(to);
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writel(reg, hw_dev->map_base + HW_SSP_TIMING);
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writel(reg, mxs_mci->regs + HW_SSP_TIMING);
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}
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/**
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@ -280,7 +282,7 @@ static void mxs_mci_setup_timeout(struct device_d *hw_dev, unsigned to)
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* may fail whith high clock speeds. If you receive -EIO errors you can try
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* again with reduced clock speeds.
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*/
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static int mxs_mci_read_data(struct device_d *hw_dev, void *buffer, unsigned length)
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static int mxs_mci_read_data(struct mxs_mci_host *mxs_mci, void *buffer, unsigned length)
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{
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uint32_t *p = buffer;
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@ -291,10 +293,10 @@ static int mxs_mci_read_data(struct device_d *hw_dev, void *buffer, unsigned len
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}
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while ((length != 0) &&
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((readl(hw_dev->map_base + HW_SSP_STATUS) & SSP_STATUS_ERROR) == 0)) {
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((readl(mxs_mci->regs + HW_SSP_STATUS) & SSP_STATUS_ERROR) == 0)) {
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/* TODO sort out FIFO overflows and emit -EOI for this case */
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if ((readl(hw_dev->map_base + HW_SSP_STATUS) & SSP_STATUS_FIFO_EMPTY) == 0) {
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*p = readl(hw_dev->map_base + HW_SSP_DATA);
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if ((readl(mxs_mci->regs + HW_SSP_STATUS) & SSP_STATUS_FIFO_EMPTY) == 0) {
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*p = readl(mxs_mci->regs + HW_SSP_DATA);
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p++;
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length -= 4;
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}
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@ -318,7 +320,7 @@ static int mxs_mci_read_data(struct device_d *hw_dev, void *buffer, unsigned len
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* may fail with high clock speeds. If you receive -EIO errors you can try
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* again with reduced clock speeds.
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*/
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static int mxs_mci_write_data(struct device_d *hw_dev, const void *buffer, unsigned length)
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static int mxs_mci_write_data(struct mxs_mci_host *mxs_mci, const void *buffer, unsigned length)
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{
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const uint32_t *p = buffer;
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@ -329,10 +331,10 @@ static int mxs_mci_write_data(struct device_d *hw_dev, const void *buffer, unsig
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}
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while ((length != 0) &&
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((readl(hw_dev->map_base + HW_SSP_STATUS) & SSP_STATUS_ERROR) == 0)) {
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((readl(mxs_mci->regs + HW_SSP_STATUS) & SSP_STATUS_ERROR) == 0)) {
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/* TODO sort out FIFO overflows and emit -EOI for this case */
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if ((readl(hw_dev->map_base + HW_SSP_STATUS) & SSP_STATUS_FIFO_FULL) == 0) {
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writel(*p, hw_dev->map_base + HW_SSP_DATA);
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if ((readl(mxs_mci->regs + HW_SSP_STATUS) & SSP_STATUS_FIFO_FULL) == 0) {
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writel(*p, mxs_mci->regs + HW_SSP_DATA);
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p++;
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length -= 4;
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}
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@ -349,7 +351,7 @@ static int mxs_mci_write_data(struct device_d *hw_dev, const void *buffer, unsig
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* @param data Data transfer description (might be NULL)
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* @return 0 on success
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*/
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static int mxs_mci_transfer_data(struct device_d *hw_dev, struct mci_data *data)
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static int mxs_mci_transfer_data(struct mxs_mci_host *mxs_mci, struct mci_data *data)
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{
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/*
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* Everything is ready for the transaction now:
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@ -358,15 +360,15 @@ static int mxs_mci_transfer_data(struct device_d *hw_dev, struct mci_data *data)
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*
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* Start the transaction right now
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*/
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writel(SSP_CTRL0_RUN, hw_dev->map_base + HW_SSP_CTRL0 + 4);
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writel(SSP_CTRL0_RUN, mxs_mci->regs + HW_SSP_CTRL0 + 4);
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if (data != NULL) {
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unsigned length = data->blocks * data->blocksize;
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if (data->flags & MMC_DATA_READ)
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return mxs_mci_read_data(hw_dev, data->dest, length);
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return mxs_mci_read_data(mxs_mci, data->dest, length);
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else
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return mxs_mci_write_data(hw_dev, data->src, length);
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return mxs_mci_write_data(mxs_mci, data->src, length);
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}
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return 0;
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@ -411,33 +413,33 @@ static uint32_t mxs_mci_prepare_transfer_setup(unsigned cmd_flags, unsigned data
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* - "broadcast commands with response (BCR)"
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* - "addressed command (AC)" with response, but without data
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*/
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static int mxs_mci_std_cmds(struct device_d *hw_dev, struct mci_cmd *cmd)
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static int mxs_mci_std_cmds(struct mxs_mci_host *mxs_mci, struct mci_cmd *cmd)
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{
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/* setup command and transfer parameters */
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writel(mxs_mci_prepare_transfer_setup(cmd->resp_type, 0) |
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SSP_CTRL0_ENABLE, hw_dev->map_base + HW_SSP_CTRL0);
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SSP_CTRL0_ENABLE, mxs_mci->regs + HW_SSP_CTRL0);
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/* prepare the command, when no response is expected add a few trailing clocks */
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writel(SSP_CMD0_CMD(cmd->cmdidx) |
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(cmd->resp_type & MMC_RSP_PRESENT ? 0 : SSP_CMD0_APPEND_8CYC),
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hw_dev->map_base + HW_SSP_CMD0);
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mxs_mci->regs + HW_SSP_CMD0);
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/* prepare command's arguments */
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writel(cmd->cmdarg, hw_dev->map_base + HW_SSP_CMD1);
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writel(cmd->cmdarg, mxs_mci->regs + HW_SSP_CMD1);
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mxs_mci_setup_timeout(hw_dev, 0xffff);
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mxs_mci_setup_timeout(mxs_mci, 0xffff);
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/* start the transfer */
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writel(SSP_CTRL0_RUN, hw_dev->map_base + HW_SSP_CTRL0 + 4);
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writel(SSP_CTRL0_RUN, mxs_mci->regs + HW_SSP_CTRL0 + 4);
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/* wait until finished */
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while (readl(hw_dev->map_base + HW_SSP_CTRL0) & SSP_CTRL0_RUN)
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while (readl(mxs_mci->regs + HW_SSP_CTRL0) & SSP_CTRL0_RUN)
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;
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if (cmd->resp_type & MMC_RSP_PRESENT)
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mxs_mci_get_cards_response(hw_dev, cmd);
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mxs_mci_get_cards_response(mxs_mci, cmd);
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return mxs_mci_get_cmd_error(readl(hw_dev->map_base + HW_SSP_STATUS));
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return mxs_mci_get_cmd_error(readl(mxs_mci->regs + HW_SSP_STATUS));
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}
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/**
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@ -447,10 +449,9 @@ static int mxs_mci_std_cmds(struct device_d *hw_dev, struct mci_cmd *cmd)
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* @param data The data information (buffer, direction aso.) May be NULL
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* @return 0 on success
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*/
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static int mxs_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
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static int mxs_mci_adtc(struct mxs_mci_host *mxs_mci, struct mci_cmd *cmd,
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struct mci_data *data)
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{
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struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
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uint32_t xfer_cnt, log2blocksize, block_cnt;
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int err;
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@ -466,52 +467,52 @@ static int mxs_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
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/* setup command and transfer parameters */
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#ifdef CONFIG_ARCH_IMX23
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writel(mxs_mci_prepare_transfer_setup(cmd->resp_type, data != NULL ? data->flags : 0) |
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SSP_CTRL0_BUS_WIDTH(host_data->bus_width) |
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SSP_CTRL0_BUS_WIDTH(mxs_mci->bus_width) |
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(xfer_cnt != 0 ? SSP_CTRL0_DATA_XFER : 0) | /* command plus data */
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SSP_CTRL0_ENABLE |
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SSP_CTRL0_XFER_COUNT(xfer_cnt), /* byte count to be transfered */
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hw_dev->map_base + HW_SSP_CTRL0);
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mxs_mci->regs + HW_SSP_CTRL0);
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/* prepare the command and the transfered data count */
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writel(SSP_CMD0_CMD(cmd->cmdidx) |
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SSP_CMD0_BLOCK_SIZE(log2blocksize) |
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SSP_CMD0_BLOCK_COUNT(block_cnt) |
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(cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION ? SSP_CMD0_APPEND_8CYC : 0),
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hw_dev->map_base + HW_SSP_CMD0);
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mxs_mci->regs + HW_SSP_CMD0);
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#endif
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#ifdef CONFIG_ARCH_IMX28
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writel(mxs_mci_prepare_transfer_setup(cmd->resp_type, data != NULL ? data->flags : 0) |
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SSP_CTRL0_BUS_WIDTH(host_data->bus_width) |
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SSP_CTRL0_BUS_WIDTH(mxs_mci->bus_width) |
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(xfer_cnt != 0 ? SSP_CTRL0_DATA_XFER : 0) | /* command plus data */
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SSP_CTRL0_ENABLE,
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hw_dev->map_base + HW_SSP_CTRL0);
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writel(xfer_cnt, hw_dev->map_base + HW_SSP_XFER_COUNT);
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mxs_mci->regs + HW_SSP_CTRL0);
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writel(xfer_cnt, mxs_mci->regs + HW_SSP_XFER_COUNT);
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/* prepare the command and the transfered data count */
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writel(SSP_CMD0_CMD(cmd->cmdidx) |
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(cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION ? SSP_CMD0_APPEND_8CYC : 0),
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hw_dev->map_base + HW_SSP_CMD0);
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mxs_mci->regs + HW_SSP_CMD0);
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writel(SSP_BLOCK_SIZE(log2blocksize) |
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SSP_BLOCK_COUNT(block_cnt),
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hw_dev->map_base + HW_SSP_BLOCK_SIZE);
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mxs_mci->regs + HW_SSP_BLOCK_SIZE);
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#endif
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/* prepare command's arguments */
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writel(cmd->cmdarg, hw_dev->map_base + HW_SSP_CMD1);
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writel(cmd->cmdarg, mxs_mci->regs + HW_SSP_CMD1);
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mxs_mci_setup_timeout(hw_dev, 0xffff);
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mxs_mci_setup_timeout(mxs_mci, 0xffff);
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err = mxs_mci_transfer_data(hw_dev, data);
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err = mxs_mci_transfer_data(mxs_mci, data);
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if (err != 0) {
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pr_debug(" Transfering data failed\n");
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return err;
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}
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/* wait until finished */
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while (readl(hw_dev->map_base + HW_SSP_CTRL0) & SSP_CTRL0_RUN)
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while (readl(mxs_mci->regs + HW_SSP_CTRL0) & SSP_CTRL0_RUN)
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;
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mxs_mci_get_cards_response(hw_dev, cmd);
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mxs_mci_get_cards_response(mxs_mci, cmd);
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return 0;
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}
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@ -537,7 +538,7 @@ static int mxs_mci_adtc(struct device_d *hw_dev, struct mci_cmd *cmd,
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* @note Up to "SSP unit DIV" the outer world must care. This routine only
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* handles the "SSP DIV".
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*/
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static unsigned mxs_mci_setup_clock_speed(struct device_d *hw_dev, unsigned nc)
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static unsigned mxs_mci_setup_clock_speed(struct mxs_mci_host *mxs_mci, unsigned nc)
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{
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unsigned ssp, div, rate, reg;
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@ -546,7 +547,7 @@ static unsigned mxs_mci_setup_clock_speed(struct device_d *hw_dev, unsigned nc)
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return 0;
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}
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ssp = mxs_mci_get_unit_clock(hw_dev);
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ssp = mxs_mci_get_unit_clock(mxs_mci);
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for (div = 2; div < 255; div += 2) {
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rate = DIV_ROUND_CLOSEST(DIV_ROUND_CLOSEST(ssp, nc), div);
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@ -558,9 +559,9 @@ static unsigned mxs_mci_setup_clock_speed(struct device_d *hw_dev, unsigned nc)
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return 0;
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}
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reg = readl(hw_dev->map_base + HW_SSP_TIMING) & SSP_TIMING_TIMEOUT_MASK;
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reg = readl(mxs_mci->regs + HW_SSP_TIMING) & SSP_TIMING_TIMEOUT_MASK;
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reg |= SSP_TIMING_CLOCK_DIVIDE(div) | SSP_TIMING_CLOCK_RATE(rate - 1);
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writel(reg, hw_dev->map_base + HW_SSP_TIMING);
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writel(reg, mxs_mci->regs + HW_SSP_TIMING);
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return ssp / div / rate;
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}
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@ -571,10 +572,10 @@ static unsigned mxs_mci_setup_clock_speed(struct device_d *hw_dev, unsigned nc)
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*
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* This will reset everything in all registers of this unit! (FIXME)
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*/
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static void mxs_mci_reset(struct device_d *hw_dev)
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static void mxs_mci_reset(struct mxs_mci_host *mxs_mci)
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{
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writel(SSP_CTRL0_SFTRST, hw_dev->map_base + HW_SSP_CTRL0 + 8);
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while (readl(hw_dev->map_base + HW_SSP_CTRL0) & SSP_CTRL0_SFTRST)
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writel(SSP_CTRL0_SFTRST, mxs_mci->regs + HW_SSP_CTRL0 + 8);
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while (readl(mxs_mci->regs + HW_SSP_CTRL0) & SSP_CTRL0_SFTRST)
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;
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}
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@ -588,24 +589,23 @@ static void mxs_mci_reset(struct device_d *hw_dev)
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*/
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static int mxs_mci_initialize(struct mci_host *host, struct device_d *mci_dev)
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{
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struct device_d *hw_dev = host->hw_dev;
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struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
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struct mxs_mci_host *mxs_mci = to_mxs_mci(host);
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/* enable the clock to this unit to be able to reset it */
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writel(SSP_CTRL0_CLKGATE, hw_dev->map_base + HW_SSP_CTRL0 + 8);
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writel(SSP_CTRL0_CLKGATE, mxs_mci->regs + HW_SSP_CTRL0 + 8);
|
||||
|
||||
/* reset the unit */
|
||||
mxs_mci_reset(hw_dev);
|
||||
mxs_mci_reset(mxs_mci);
|
||||
|
||||
/* restore the last settings */
|
||||
host->clock = host_data->clock = mxs_mci_setup_clock_speed(hw_dev, host->clock);
|
||||
mxs_mci_setup_timeout(hw_dev, 0xffff);
|
||||
host->clock = mxs_mci->clock = mxs_mci_setup_clock_speed(mxs_mci, host->clock);
|
||||
mxs_mci_setup_timeout(mxs_mci, 0xffff);
|
||||
writel(SSP_CTRL0_IGNORE_CRC |
|
||||
SSP_CTRL0_BUS_WIDTH(host_data->bus_width),
|
||||
hw_dev->map_base + HW_SSP_CTRL0);
|
||||
SSP_CTRL0_BUS_WIDTH(mxs_mci->bus_width),
|
||||
mxs_mci->regs + HW_SSP_CTRL0);
|
||||
writel(SSP_CTRL1_POLARITY |
|
||||
SSP_CTRL1_SSP_MODE(3) |
|
||||
SSP_CTRL1_WORD_LENGTH(7), hw_dev->map_base + HW_SSP_CTRL1);
|
||||
SSP_CTRL1_WORD_LENGTH(7), mxs_mci->regs + HW_SSP_CTRL1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -620,15 +620,15 @@ static int mxs_mci_initialize(struct mci_host *host, struct device_d *mci_dev)
|
|||
static int mxs_mci_request(struct mci_host *host, struct mci_cmd *cmd,
|
||||
struct mci_data *data)
|
||||
{
|
||||
struct device_d *hw_dev = host->hw_dev;
|
||||
struct mxs_mci_host *mxs_mci = to_mxs_mci(host);
|
||||
int rc;
|
||||
|
||||
if ((cmd->resp_type == 0) || (data == NULL))
|
||||
rc = mxs_mci_std_cmds(hw_dev, cmd);
|
||||
rc = mxs_mci_std_cmds(mxs_mci, cmd);
|
||||
else
|
||||
rc = mxs_mci_adtc(hw_dev, cmd, data); /* with response and data */
|
||||
rc = mxs_mci_adtc(mxs_mci, cmd, data); /* with response and data */
|
||||
|
||||
mxs_mci_finish_request(hw_dev); /* TODO */
|
||||
mxs_mci_finish_request(mxs_mci); /* TODO */
|
||||
return rc;
|
||||
}
|
||||
|
||||
|
|
@ -644,25 +644,24 @@ static int mxs_mci_request(struct mci_host *host, struct mci_cmd *cmd,
|
|||
static void mxs_mci_set_ios(struct mci_host *host, struct device_d *mci_dev,
|
||||
unsigned bus_width, unsigned clock)
|
||||
{
|
||||
struct device_d *hw_dev = host->hw_dev;
|
||||
struct mxs_mci_host *host_data = (struct mxs_mci_host*)GET_HOST_DATA(hw_dev);
|
||||
struct mxs_mci_host *mxs_mci = to_mxs_mci(host);
|
||||
|
||||
switch (bus_width) {
|
||||
case 8:
|
||||
host_data->bus_width = 2;
|
||||
mxs_mci->bus_width = 2;
|
||||
host->bus_width = 8; /* 8 bit is possible */
|
||||
break;
|
||||
case 4:
|
||||
host_data->bus_width = 1;
|
||||
mxs_mci->bus_width = 1;
|
||||
host->bus_width = 4; /* 4 bit is possible */
|
||||
break;
|
||||
default:
|
||||
host_data->bus_width = 0;
|
||||
mxs_mci->bus_width = 0;
|
||||
host->bus_width = 1; /* 1 bit is possible */
|
||||
break;
|
||||
}
|
||||
|
||||
host->clock = host_data->clock = mxs_mci_setup_clock_speed(hw_dev, clock);
|
||||
host->clock = mxs_mci->clock = mxs_mci_setup_clock_speed(mxs_mci, clock);
|
||||
pr_debug("IO settings: bus width=%d, frequency=%u Hz\n", host->bus_width,
|
||||
host->clock);
|
||||
}
|
||||
|
|
@ -674,13 +673,13 @@ const unsigned char bus_width[3] = { 1, 4, 8 };
|
|||
|
||||
static void mxs_mci_info(struct device_d *hw_dev)
|
||||
{
|
||||
struct mxs_mci_host *host_data = GET_HOST_DATA(hw_dev);
|
||||
struct mxs_mci_host *mxs_mci = GET_HOST_DATA(hw_dev);
|
||||
|
||||
printf(" Interface\n");
|
||||
printf(" Min. bus clock: %u Hz\n", host_data->f_min);
|
||||
printf(" Max. bus clock: %u Hz\n", host_data->f_max);
|
||||
printf(" Current bus clock: %u Hz\n", host_data->clock);
|
||||
printf(" Bus width: %u bit\n", bus_width[host_data->bus_width]);
|
||||
printf(" Min. bus clock: %u Hz\n", mxs_mci->f_min);
|
||||
printf(" Max. bus clock: %u Hz\n", mxs_mci->f_max);
|
||||
printf(" Current bus clock: %u Hz\n", mxs_mci->clock);
|
||||
printf(" Bus width: %u bit\n", bus_width[mxs_mci->bus_width]);
|
||||
printf("\n");
|
||||
}
|
||||
#endif
|
||||
|
|
@ -688,7 +687,7 @@ static void mxs_mci_info(struct device_d *hw_dev)
|
|||
static int mxs_mci_probe(struct device_d *hw_dev)
|
||||
{
|
||||
struct mxs_mci_platform_data *pd = hw_dev->platform_data;
|
||||
struct mxs_mci_host *host_data;
|
||||
struct mxs_mci_host *mxs_mci;
|
||||
struct mci_host *host;
|
||||
|
||||
if (hw_dev->platform_data == NULL) {
|
||||
|
|
@ -696,62 +695,63 @@ static int mxs_mci_probe(struct device_d *hw_dev)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
host = xzalloc(sizeof(struct mxs_mci_host) + sizeof(struct mci_host));
|
||||
host_data = (struct mxs_mci_host*)&host[1];
|
||||
mxs_mci = xzalloc(sizeof(*mxs_mci));
|
||||
host = &mxs_mci->host;
|
||||
|
||||
hw_dev->priv = host_data;
|
||||
hw_dev->priv = mxs_mci;
|
||||
host->hw_dev = hw_dev;
|
||||
host->send_cmd = mxs_mci_request,
|
||||
host->set_ios = mxs_mci_set_ios,
|
||||
host->init = mxs_mci_initialize,
|
||||
mxs_mci->regs = (void *)hw_dev->map_base;
|
||||
|
||||
/* feed forward the platform specific values */
|
||||
host->voltages = pd->voltages;
|
||||
host->host_caps = pd->caps;
|
||||
|
||||
#ifdef CONFIG_ARCH_IMX23
|
||||
host_data->index = 0; /* there is only one clock for all */
|
||||
mxs_mci->index = 0; /* there is only one clock for all */
|
||||
#endif
|
||||
#ifdef CONFIG_ARCH_IMX28
|
||||
/* one dedicated clock per unit */
|
||||
switch (hw_dev->map_base) {
|
||||
case IMX_SSP0_BASE:
|
||||
host_data->index = 0;
|
||||
mxs_mci->index = 0;
|
||||
break;
|
||||
case IMX_SSP1_BASE:
|
||||
host_data->index = 1;
|
||||
mxs_mci->index = 1;
|
||||
break;
|
||||
case IMX_SSP2_BASE:
|
||||
host_data->index = 2;
|
||||
mxs_mci->index = 2;
|
||||
break;
|
||||
case IMX_SSP3_BASE:
|
||||
host_data->index = 3;
|
||||
mxs_mci->index = 3;
|
||||
break;
|
||||
default:
|
||||
pr_debug("Unknown SSP unit at address 0x%08x\n", hw_dev->map_base);
|
||||
pr_debug("Unknown SSP unit at address 0x%08x\n", mxs_mci->regs);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
if (pd->f_min == 0) {
|
||||
host->f_min = mxs_mci_get_unit_clock(hw_dev) / 254 / 256;
|
||||
host->f_min = mxs_mci_get_unit_clock(mxs_mci) / 254 / 256;
|
||||
pr_debug("Min. frequency is %u Hz\n", host->f_min);
|
||||
} else {
|
||||
host->f_min = pd->f_min;
|
||||
pr_debug("Min. frequency is %u Hz, could be %u Hz\n",
|
||||
host->f_min, mxs_mci_get_unit_clock(hw_dev) / 254 / 256);
|
||||
host->f_min, mxs_mci_get_unit_clock(mxs_mci) / 254 / 256);
|
||||
}
|
||||
if (pd->f_max == 0) {
|
||||
host->f_max = mxs_mci_get_unit_clock(hw_dev) / 2 / 1;
|
||||
host->f_max = mxs_mci_get_unit_clock(mxs_mci) / 2 / 1;
|
||||
pr_debug("Max. frequency is %u Hz\n", host->f_max);
|
||||
} else {
|
||||
host->f_max = pd->f_max;
|
||||
pr_debug("Max. frequency is %u Hz, could be %u Hz\n",
|
||||
host->f_max, mxs_mci_get_unit_clock(hw_dev) / 2 / 1);
|
||||
host->f_max, mxs_mci_get_unit_clock(mxs_mci) / 2 / 1);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MCI_INFO
|
||||
host_data->f_min = host->f_min;
|
||||
host_data->f_max = host->f_max;
|
||||
mxs_mci->f_min = host->f_min;
|
||||
mxs_mci->f_max = host->f_max;
|
||||
#endif
|
||||
|
||||
return mci_register(host);
|
||||
|
|
|
|||
Loading…
Reference in New Issue