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Merge branch 'for-next/phycore-imx6'

This commit is contained in:
Sascha Hauer 2014-10-02 08:54:42 +02:00
parent 6209c24274 c5b4f09cff
commit 52a0febb3d
31 changed files with 353 additions and 273 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boards/phytec-phycard-imx6/Makefile
View File

@ -1,2 +1,3 @@
obj-y += board.o
lwl-y += lowlevel.o
bbenv-y += defaultenv-phycard-imx6

3
arch/arm/boards/phytec-phycard-imx6/board.c
View File

@ -17,6 +17,7 @@
*
*/
#include <envfs.h>
#include <environment.h>
#include <bootsource.h>
#include <common.h>
@ -44,6 +45,8 @@ static int phytec_pcaaxl3_init(void)
imx6_bbu_nand_register_handler("nand", BBU_HANDLER_FLAG_DEFAULT);
defaultenv_append_directory(defaultenv_phycard_imx6);
return 0;
}
device_initcall(phytec_pcaaxl3_init);

7
arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/boot/nand Normal file
View File

@ -0,0 +1,7 @@
#!/bin/sh
global.bootm.image="/dev/nand0.kernel.bb"
global.bootm.oftree="/dev/nand0.oftree.bb"
bootargs-ip
global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rootfstype=ubifs rw"

6
arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/boot/sd-ext3 Normal file
View File

@ -0,0 +1,6 @@
#!/bin/sh
global.bootm.image="/mnt/mmc/linuximage"
global.bootm.oftree="/mnt/mmc/oftree"
bootargs-ip
global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rootwait rw"

2
arch/arm/boards/phytec-phycard-imx6/env/config-board → arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/config-board
View File

@ -3,5 +3,7 @@
# board defaults, do not change in running system. Change /env/config
# instead
global.boot.default=nand
global.hostname=phyCARD-i.MX6
global.linux.bootargs.base="console=ttymxc2,115200"

14
arch/arm/boards/phytec-phycard-imx6/defaultenv-phycard-imx6/init/automount Normal file
View File

@ -0,0 +1,14 @@
#!/bin/sh
if [ "$1" = menu ]; then
init-menu-add-entry "$0" "Automountpoints"
exit
fi
# automount tftp server based on $eth0.serverip
mkdir -p /mnt/tftp
automount /mnt/tftp 'ifup eth0 && mount -t tftp $eth0.serverip /mnt/tftp'
mkdir -p /mnt/mmc
automount -d /mnt/mmc 'mmc2.probe=1 && [ -e /dev/mmc2.0 ] && mount /dev/mmc2.0 /mnt/mmc'

7
arch/arm/boards/phytec-phycard-imx6/env/boot/nand vendored
View File

@ -1,7 +0,0 @@
#!/bin/sh
global.bootm.image="/dev/nand0.kernel.bb"
#global.bootm.oftree="/env/oftree"
bootargs-ip
global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=nand0.root rootfstype=ubifs"

6
arch/arm/boards/phytec-phycard-imx6/env/boot/sd-ext3 vendored
View File

@ -1,6 +0,0 @@
#!/bin/sh
global.bootm.image="/mnt/kernel/linuximage"
#global.bootm.oftree="/boot/oftree"
bootargs-ip
global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rootwait"

1
arch/arm/boards/phytec-phyflex-imx6/Makefile
View File

@ -1,2 +1,3 @@
obj-y += board.o
lwl-y += lowlevel.o
bbenv-y += defaultenv-phyflex-imx6

41
arch/arm/boards/phytec-phyflex-imx6/board.c
View File

@ -17,6 +17,9 @@
*
*/
#include <envfs.h>
#include <environment.h>
#include <bootsource.h>
#include <common.h>
#include <gpio.h>
#include <init.h>
@ -29,8 +32,6 @@
#include <mach/iomux-mx6.h>
#include <mach/imx6.h>
#define ETH_PHY_RST IMX_GPIO_NR(3, 23)
#define GPIO_2_11_PD_CTL MX6_PAD_CTL_PUS_100K_DOWN | MX6_PAD_CTL_PUE | MX6_PAD_CTL_PKE | \
MX6_PAD_CTL_SPEED_MED | MX6_PAD_CTL_DSE_40ohm | MX6_PAD_CTL_HYS
@ -62,27 +63,9 @@ static void phyflex_err006282_workaround(void)
gpio_direction_input(MX6_PHYFLEX_ERR006282);
}
static int eth_phy_reset(void)
{
gpio_request(ETH_PHY_RST, "phy reset");
gpio_direction_output(ETH_PHY_RST, 0);
mdelay(1);
gpio_set_value(ETH_PHY_RST, 1);
return 0;
}
static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val)
{
phy_write(dev, 0x0d, device);
phy_write(dev, 0x0e, reg);
phy_write(dev, 0x0d, (1 << 14) | device);
phy_write(dev, 0x0e, val);
}
static int ksz9031rn_phy_fixup(struct phy_device *dev)
{
mmd_write_reg(dev, 2, 8, 0x039F);
phy_write_mmd_indirect(dev, 8, 2, 0x039F);
return 0;
}
@ -96,12 +79,26 @@ static int phytec_pfla02_init(void)
phyflex_err006282_workaround();
eth_phy_reset();
phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK,
ksz9031rn_phy_fixup);
imx6_bbu_nand_register_handler("nand", BBU_HANDLER_FLAG_DEFAULT);
switch (bootsource_get()) {
case BOOTSOURCE_MMC:
of_device_enable_path("/chosen/environment-sd");
break;
case BOOTSOURCE_NAND:
of_device_enable_path("/chosen/environment-nand");
break;
default:
case BOOTSOURCE_SPI:
of_device_enable_path("/chosen/environment-spinor");
break;
}
defaultenv_append_directory(defaultenv_phyflex_imx6);
return 0;
}
device_initcall(phytec_pfla02_init);

6
arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/boot/nand Normal file
View File

@ -0,0 +1,6 @@
#!/bin/sh
global.bootm.image="/dev/nand0.kernel.bb"
global.bootm.oftree="/dev/nand0.oftree.bb"
bootargs-ip
global.linux.bootargs.dyn.root="root=ubi0:root ubi.mtd=root rootfstype=ubifs rw"

6
arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/boot/sd-ext3 Normal file
View File

@ -0,0 +1,6 @@
#!/bin/sh
global.bootm.image="/mnt/mmc/linuximage"
global.bootm.oftree="/mnt/mmc/oftree"
bootargs-ip
global.linux.bootargs.dyn.root="root=/dev/mmcblk0p2 rootfstype=ext3 rootwait rw"

9
arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/config-board Normal file
View File

@ -0,0 +1,9 @@
#!/bin/sh
# board defaults, do not change in running system. Change /env/config
# instead
global.boot.default=nand
global.hostname=phyFLEX-i.MX6
global.linux.bootargs.base="console=ttymxc3,115200"

14
arch/arm/boards/phytec-phyflex-imx6/defaultenv-phyflex-imx6/init/automount Normal file
View File

@ -0,0 +1,14 @@
#!/bin/sh
if [ "$1" = menu ]; then
init-menu-add-entry "$0" "Automountpoints"
exit
fi
# automount tftp server based on $eth0.serverip
mkdir -p /mnt/tftp
automount /mnt/tftp 'ifup eth0 && mount -t tftp $eth0.serverip /mnt/tftp'
mkdir -p /mnt/mmc
automount -d /mnt/mmc 'mmc2.probe=1 && [ -e /dev/mmc2.0 ] && mount /dev/mmc2.0 /mnt/mmc'

2
arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-1gib.imxcfg
View File

@ -1,3 +1,5 @@
#define SETUP_MDCFG0 \
wm 32 0x021b000c 0x3c409b85
#define SETUP_1GIB_2GIB_4GIB \
wm 32 0x021b0040 0x00000017; \

2
arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-2gib.imxcfg
View File

@ -1,3 +1,5 @@
#define SETUP_MDCFG0 \
wm 32 0x021b000c 0x565c9b85
#define SETUP_1GIB_2GIB_4GIB \
wm 32 0x021b0040 0x00000027; \

6
arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02-4gib.imxcfg
View File

@ -1,6 +1,8 @@
#define SETUP_MDCFG0 \
wm 32 0x021b000c 0x8c929b85
#define SETUP_1GIB_2GIB_4GIB \
wm 32 0x021b0040 0x00000047; \
wm 32 0x021b0000 0xC41A0000
wm 32 0x021b0040 0x00000047; \
wm 32 0x021b0000 0xC41A0000
#include "flash-header-phytec-pfla02.h"

141
arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02.h
View File

@ -2,46 +2,60 @@ soc imx6
loadaddr 0x20000000
dcdofs 0x400
wm 32 0x020e05a8 0x00000030
wm 32 0x020e05b0 0x00000030
wm 32 0x020e0524 0x00000030
wm 32 0x020e051c 0x00000030
wm 32 0x020e0518 0x00000030
wm 32 0x020e050c 0x00000030
wm 32 0x020e05b8 0x00000030
wm 32 0x020e05c0 0x00000030
wm 32 0x020e05ac 0x00020030
wm 32 0x020e05b4 0x00020030
wm 32 0x020e0528 0x00020030
wm 32 0x020e0520 0x00020030
wm 32 0x020e0514 0x00020030
wm 32 0x020e0510 0x00020030
wm 32 0x020e05bc 0x00020030
wm 32 0x020e05c4 0x00020030
wm 32 0x020e056c 0x00020030
wm 32 0x020e0578 0x00020030
wm 32 0x020e0588 0x00020030
wm 32 0x020e0594 0x00020030
wm 32 0x020e057c 0x00020030
wm 32 0x020e0798 0x000C0000
wm 32 0x020e0758 0x00000000
wm 32 0x020e0588 0x00000030
wm 32 0x020e0594 0x00000030
wm 32 0x020e056c 0x00000030
wm 32 0x020e0578 0x00000030
wm 32 0x020e074c 0x00000030
wm 32 0x020e057c 0x00000030
wm 32 0x020e058c 0x00000000
wm 32 0x020e059c 0x00000030
wm 32 0x020e05a0 0x00000030
wm 32 0x020e0590 0x00003000
wm 32 0x020e0598 0x00003000
wm 32 0x020e058c 0x00000000
wm 32 0x020e059c 0x00003030
wm 32 0x020e05a0 0x00003030
wm 32 0x020e0784 0x00000030
wm 32 0x020e0788 0x00000030
wm 32 0x020e0794 0x00000030
wm 32 0x020e079c 0x00000030
wm 32 0x020e07a0 0x00000030
wm 32 0x020e07a4 0x00000030
wm 32 0x020e07a8 0x00000030
wm 32 0x020e0748 0x00000030
wm 32 0x020e074c 0x00000030
wm 32 0x020e0750 0x00020000
wm 32 0x020e0758 0x00000000
wm 32 0x020e0774 0x00020000
wm 32 0x020e078c 0x00000030
wm 32 0x020e0798 0x000c0000
wm 32 0x020e0750 0x00020000
wm 32 0x020e05a8 0x00000028
wm 32 0x020e05b0 0x00000028
wm 32 0x020e0524 0x00000028
wm 32 0x020e051c 0x00000028
wm 32 0x020e0518 0x00000028
wm 32 0x020e050c 0x00000028
wm 32 0x020e05b8 0x00000028
wm 32 0x020e05c0 0x00000028
wm 32 0x020e0774 0x00020000
wm 32 0x020e0784 0x00000028
wm 32 0x020e0788 0x00000028
wm 32 0x020e0794 0x00000028
wm 32 0x020e079c 0x00000028
wm 32 0x020e07a0 0x00000028
wm 32 0x020e07a4 0x00000028
wm 32 0x020e07a8 0x00000028
wm 32 0x020e0748 0x00000028
wm 32 0x020e05ac 0x00000028
wm 32 0x020e05b4 0x00000028
wm 32 0x020e0528 0x00000028
wm 32 0x020e0520 0x00000028
wm 32 0x020e0514 0x00000028
wm 32 0x020e0510 0x00000028
wm 32 0x020e05bc 0x00000028
wm 32 0x020e05c4 0x00000028
wm 32 0x021b0800 0xa1390003
wm 32 0x021b4800 0xa1380003
wm 32 0x021b080c 0x00110011
wm 32 0x021b0810 0x00240024
wm 32 0x021b480c 0x00260038
wm 32 0x021b4810 0x002C0038
wm 32 0x021b083c 0x03400350
wm 32 0x021b0840 0x03440340
wm 32 0x021b483c 0x034C0354
wm 32 0x021b4840 0x035C033C
wm 32 0x021b0848 0x322A2A2A
wm 32 0x021b4848 0x302C2834
wm 32 0x021b0850 0x34303834
wm 32 0x021b4850 0x422A3E36
wm 32 0x021b081c 0x33333333
wm 32 0x021b0820 0x33333333
wm 32 0x021b0824 0x33333333
@ -50,15 +64,19 @@ wm 32 0x021b481c 0x33333333
wm 32 0x021b4820 0x33333333
wm 32 0x021b4824 0x33333333
wm 32 0x021b4828 0x33333333
wm 32 0x021b0018 0x00081740
wm 32 0x021b001c 0x00008000
wm 32 0x021b000c 0x555a7975
wm 32 0x021b0010 0xff538e64
wm 32 0x021b0014 0x01ff00db
wm 32 0x021b002c 0x000026d2
wm 32 0x021b0030 0x005b0e21
wm 32 0x021b0008 0x09444040
wm 32 0x021b08b8 0x00000800
wm 32 0x021b48b8 0x00000800
wm 32 0x021b0004 0x00025576
wm 32 0x021b0008 0x09444040
SETUP_MDCFG0
wm 32 0x021b0010 0xff538f64
wm 32 0x021b0014 0x01ff0124
wm 32 0x021b0018 0x00091740
wm 32 0x021b001c 0x00008000
wm 32 0x021b002c 0x000026d2
wm 32 0x021b0030 0x003F1023
SETUP_1GIB_2GIB_4GIB
@ -66,34 +84,19 @@ wm 32 0x021b001c 0x04088032
wm 32 0x021b001c 0x0408803a
wm 32 0x021b001c 0x00008033
wm 32 0x021b001c 0x0000803b
wm 32 0x021b001c 0x00428031
wm 32 0x021b001c 0x00428039
wm 32 0x021b001c 0x00048031
wm 32 0x021b001c 0x00048039
wm 32 0x021b001c 0x09408030
wm 32 0x021b001c 0x09408038
wm 32 0x021b001c 0x04008040
wm 32 0x021b001c 0x04008048
wm 32 0x021b0800 0xa1380003
wm 32 0x021b4800 0xa1380003
wm 32 0x021b0020 0x00005800
wm 32 0x021b0818 0x00022227
wm 32 0x021b4818 0x00022227
wm 32 0x021b083c 0x433c033f
wm 32 0x021b0840 0x033e033d
wm 32 0x021b483c 0x43490351
wm 32 0x021b4840 0x0344032f
wm 32 0x021b0848 0x4a434146
wm 32 0x021b4848 0x4745434b
wm 32 0x021b0850 0x3d3d433a
wm 32 0x021b4850 0x48334b3e
wm 32 0x021b080c 0x000f0011
wm 32 0x021b0810 0x00200022
wm 32 0x021b480c 0x0033002e
wm 32 0x021b4810 0x003e003b
wm 32 0x021b08b8 0x00000800
wm 32 0x021b48b8 0x00000800
wm 32 0x021b001c 0x00000000
wm 32 0x021b0020 0x00007800
wm 32 0x021b0818 0x00011117
wm 32 0x021b4818 0x00011117
wm 32 0x021b0004 0x00025576
wm 32 0x021b0404 0x00011006
wm 32 0x021b001c 0x00000000
wm 32 0x020e0010 0xf00000ff
wm 32 0x020e0018 0x007f007f
wm 32 0x020e001c 0x007f007f
wm 32 0x020e0018 0x007F007F
wm 32 0x020e001c 0x007F007F
wm 32 0x020c8000 0x80002021

2
arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg
View File

@ -1,3 +1,5 @@
#define SETUP_MDCFG0 \
wm 32 0x021b000c 0x8c929b85
#define SETUP_S_DL_512MB_1GB \
wm 32 0x021b0040 0x00000017; \

129
arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02dl.h
View File

@ -2,46 +2,60 @@ soc imx6
loadaddr 0x20000000
dcdofs 0x400
wm 32 0x020e04bc 0x00000030
wm 32 0x020e04c0 0x00000030
wm 32 0x020e04c4 0x00000030
wm 32 0x020e04c8 0x00000030
wm 32 0x020e04cc 0x00000030
wm 32 0x020e04d0 0x00000030
wm 32 0x020e04d4 0x00000030
wm 32 0x020e04d8 0x00000030
wm 32 0x020e0470 0x00020030
wm 32 0x020e0474 0x00020030
wm 32 0x020e0478 0x00020030
wm 32 0x020e047c 0x00020030
wm 32 0x020e0480 0x00020030
wm 32 0x020e0484 0x00020030
wm 32 0x020e0488 0x00020030
wm 32 0x020e048c 0x00020030
wm 32 0x020e0464 0x00020030
wm 32 0x020e0490 0x00020030
wm 32 0x020e04ac 0x00020030
wm 32 0x020e04b0 0x00020030
wm 32 0x020e0494 0x00020030
wm 32 0x020e0774 0x000C0000
wm 32 0x020e0754 0x00000000
wm 32 0x020e04ac 0x00000030
wm 32 0x020e04b0 0x00000030
wm 32 0x020e0464 0x00000030
wm 32 0x020e0490 0x00000030
wm 32 0x020e074c 0x00000030
wm 32 0x020e0494 0x00000030
wm 32 0x020e04a0 0x00000000
wm 32 0x020e04b4 0x00000030
wm 32 0x020e04b8 0x00000030
wm 32 0x020e04a4 0x00003000
wm 32 0x020e04a8 0x00003000
wm 32 0x020e04a0 0x00000000
wm 32 0x020e04b4 0x00003030
wm 32 0x020e04b8 0x00003030
wm 32 0x020e0764 0x00000030
wm 32 0x020e0770 0x00000030
wm 32 0x020e0778 0x00000030
wm 32 0x020e077c 0x00000030
wm 32 0x020e0780 0x00000030
wm 32 0x020e0784 0x00000030
wm 32 0x020e078c 0x00000030
wm 32 0x020e0748 0x00000030
wm 32 0x020e074c 0x00000030
wm 32 0x020e0750 0x00020000
wm 32 0x020e0754 0x00000000
wm 32 0x020e0760 0x00020000
wm 32 0x020e076c 0x00000030
wm 32 0x020e0774 0x000c0000
wm 32 0x020e0750 0x00020000
wm 32 0x020e04bc 0x00000028
wm 32 0x020e04c0 0x00000028
wm 32 0x020e04c4 0x00000028
wm 32 0x020e04c8 0x00000028
wm 32 0x020e04cc 0x00000028
wm 32 0x020e04d0 0x00000028
wm 32 0x020e04d4 0x00000028
wm 32 0x020e04d8 0x00000028
wm 32 0x020e0760 0x00020000
wm 32 0x020e0764 0x00000028
wm 32 0x020e0770 0x00000028
wm 32 0x020e0778 0x00000028
wm 32 0x020e077c 0x00000028
wm 32 0x020e0780 0x00000028
wm 32 0x020e0784 0x00000028
wm 32 0x020e078c 0x00000028
wm 32 0x020e0748 0x00000028
wm 32 0x020e0470 0x00000028
wm 32 0x020e0474 0x00000028
wm 32 0x020e0478 0x00000028
wm 32 0x020e047c 0x00000028
wm 32 0x020e0480 0x00000028
wm 32 0x020e0484 0x00000028
wm 32 0x020e0488 0x00000028
wm 32 0x020e048c 0x00000028
wm 32 0x021b0800 0xa1390003
wm 32 0x021b4800 0xa1380003
wm 32 0x021b080c 0x00110011
wm 32 0x021b0810 0x00240024
wm 32 0x021b480c 0x00260038
wm 32 0x021b4810 0x002C0038
wm 32 0x021b083c 0x02480248
wm 32 0x021b0840 0x022f022d
wm 32 0x021b483c 0x02540258
wm 32 0x021b4840 0x0236021e
wm 32 0x021b0848 0x332f3033
wm 32 0x021b4848 0x302d2c35
wm 32 0x021b0850 0x3030362a
wm 32 0x021b4850 0x3423372d
wm 32 0x021b081c 0x33333333
wm 32 0x021b0820 0x33333333
wm 32 0x021b0824 0x33333333
@ -50,15 +64,19 @@ wm 32 0x021b481c 0x33333333
wm 32 0x021b4820 0x33333333
wm 32 0x021b4824 0x33333333
wm 32 0x021b4828 0x33333333
wm 32 0x021b0018 0x00081740
wm 32 0x021b001c 0x00008000
wm 32 0x021b000c 0x555a7975
wm 32 0x021b0010 0xff538e64
wm 32 0x021b0014 0x01ff00db
wm 32 0x021b002c 0x000026d2
wm 32 0x021b0030 0x005b0e21
wm 32 0x021b0008 0x09444040
wm 32 0x021b08b8 0x00000800
wm 32 0x021b48b8 0x00000800
wm 32 0x021b0004 0x00025576
wm 32 0x021b0008 0x09444040
SETUP_MDCFG0
wm 32 0x021b0010 0xff538f64
wm 32 0x021b0014 0x01ff0124
wm 32 0x021b0018 0x00091740
wm 32 0x021b001c 0x00008000
wm 32 0x021b002c 0x000026d2
wm 32 0x021b0030 0x003F1023
SETUP_S_DL_512MB_1GB
@ -72,24 +90,9 @@ wm 32 0x021b001c 0x09408030
wm 32 0x021b001c 0x09408038
wm 32 0x021b001c 0x04008040
wm 32 0x021b001c 0x04008048
wm 32 0x021b0800 0xa1380003
wm 32 0x021b4800 0xa1380003
wm 32 0x021b0020 0x00005800
wm 32 0x021b0020 0x00007800
wm 32 0x021b0818 0x00011117
wm 32 0x021b4818 0x00011117
wm 32 0x021b083c 0x422D0230
wm 32 0x021b0840 0x022F022E
wm 32 0x021b483c 0x4237023D
wm 32 0x021b4840 0x02340224
wm 32 0x021b0848 0x38333135
wm 32 0x021b4848 0x36353338
wm 32 0x021b0850 0x2E2E332C
wm 32 0x021b4850 0x3727382F
wm 32 0x021b080c 0x000C000D
wm 32 0x021b0810 0x0018001A
wm 32 0x021b480c 0x00270023
wm 32 0x021b4810 0x002F002D
wm 32 0x021b08b8 0x00000800
wm 32 0x021b48b8 0x00000800
wm 32 0x021b001c 0x00000000
wm 32 0x021b0004 0x00025576
wm 32 0x021b0404 0x00011006
wm 32 0x021b001c 0x00000000

2
arch/arm/boards/phytec-phyflex-imx6/flash-header-phytec-pfla02s-512mb.imxcfg
View File

@ -1,3 +1,5 @@
#define SETUP_MDCFG0 \
wm 32 0x021b000c 0x565c9b85
#define SETUP_S_DL_512MB_1GB \
wm 32 0x021b0040 0x00000017; \

60
arch/arm/boards/phytec-phyflex-imx6/lowlevel.c
View File

@ -63,7 +63,7 @@ BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_1G, IMD_TYPE_PARAMETER, "memsize=1024
BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0);
BAREBOX_IMD_TAG_STRING(phyflex_mx6_memsize_4G, IMD_TYPE_PARAMETER, "memsize=4096", 0);
ENTRY_FUNCTION(start_phytec_pbab01_1gib, r0, r1, r2)
static void __noreturn start_imx6q_phytec_pbab01_common(uint32_t size)
{
void *fdt;
@ -71,62 +71,54 @@ ENTRY_FUNCTION(start_phytec_pbab01_1gib, r0, r1, r2)
arm_setup_stack(0x00920000 - 8);
IMD_USED(phyflex_mx6_memsize_1G);
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = __dtb_imx6q_phytec_pbab01_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_1G, fdt);
barebox_arm_entry(0x10000000, size, fdt);
}
static void __noreturn start_imx6dl_phytec_pbab01_common(uint32_t size)
{
void *fdt;
imx6_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
fdt = __dtb_imx6dl_phytec_pbab01_start - get_runtime_offset();
barebox_arm_entry(0x10000000, size, fdt);
}
ENTRY_FUNCTION(start_phytec_pbab01_1gib, r0, r1, r2)
{
IMD_USED(phyflex_mx6_memsize_1G);
start_imx6q_phytec_pbab01_common(SZ_1G);
}
ENTRY_FUNCTION(start_phytec_pbab01_2gib, r0, r1, r2)
{
void *fdt;
imx6_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
IMD_USED(phyflex_mx6_memsize_2G);
if (IS_ENABLED(CONFIG_DEBUG_LL))
setup_uart();
fdt = __dtb_imx6q_phytec_pbab01_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_2G, fdt);
start_imx6q_phytec_pbab01_common(SZ_2G);
}
ENTRY_FUNCTION(start_phytec_pbab01_4gib, r0, r1, r2)
{
void *fdt;
imx6_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
IMD_USED(phyflex_mx6_memsize_4G);
fdt = __dtb_imx6q_phytec_pbab01_start - get_runtime_offset();
barebox_arm_entry(0x10000000, 0xEFFFFFF8, fdt);
start_imx6q_phytec_pbab01_common(0xEFFFFFF8);
}
ENTRY_FUNCTION(start_phytec_pbab01dl_1gib, r0, r1, r2)
{
void *fdt;
imx6_cpu_lowlevel_init();
arm_setup_stack(0x00920000 - 8);
IMD_USED(phyflex_mx6_memsize_1G);
fdt = __dtb_imx6dl_phytec_pbab01_start - get_runtime_offset();
barebox_arm_entry(0x10000000, SZ_1G, fdt);
start_imx6dl_phytec_pbab01_common(SZ_1G);
}
ENTRY_FUNCTION(start_phytec_pbab01s_512mb, r0, r1, r2)

5
arch/arm/dts/imx6dl-phytec-pbab01.dts
View File

@ -20,10 +20,5 @@
chosen {
linux,stdout-path = &uart4;
environment@0 {
compatible = "barebox,environment";
device-path = &flash, "partname:barebox-environment";
};
};
};

19
arch/arm/dts/imx6dl-phytec-pfla02.dtsi
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@ -15,27 +15,8 @@
/ {
model = "Phytec phyFLEX-i.MX6 Dual Lite";
compatible = "phytec,imx6dl-pfla02", "fsl,imx6dl";
memory {
reg = <0x10000000 0x40000000>;
};
};
&ecspi3 {
status = "okay";
};
&flash {
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "barebox";
reg = <0x0 0x80000>;
};
partition@1 {
label = "barebox-environment";
reg = <0x80000 0x10000>;
};
};

5
arch/arm/dts/imx6q-phytec-pbab01.dts
View File

@ -19,10 +19,5 @@
chosen {
linux,stdout-path = &uart4;
environment@0 {
compatible = "barebox,environment";
device-path = &flash, "partname:barebox-environment";
};
};
};

11
arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi
View File

@ -144,13 +144,18 @@
};
partition@2 {
label = "kernel";
reg = <0x420000 0x800000>;
label = "oftree";
reg = <0x420000 0x20000>;
};
partition@3 {
label = "kernel";
reg = <0x440000 0x800000>;
};
partition@4 {
label = "root";
reg = <0xC20000 0x0>;
reg = <0xC40000 0x0>;
};
};

19
arch/arm/dts/imx6q-phytec-pfla02.dtsi
View File

@ -15,27 +15,8 @@
/ {
model = "Phytec phyFLEX-i.MX6 Quad";
compatible = "phytec,imx6q-pfla02", "fsl,imx6q";
memory {
reg = <0x10000000 0x40000000>;
};
};
&ecspi3 {
status = "okay";
};
&flash {
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "barebox";
reg = <0x0 0x80000>;
};
partition@1 {
label = "barebox-environment";
reg = <0x80000 0x10000>;
};
};

13
arch/arm/dts/imx6qdl-phytec-pbab01.dtsi
View File

@ -9,23 +9,10 @@
* http://www.gnu.org/copyleft/gpl.html
*/
/ {
chosen {
environment@0 {
compatible = "barebox,environment";
device-path = &flash, "partname:barebox-environment";
};
};
};
&fec {
status = "okay";
};
&ocotp {
barebox,provide-mac-address = <&fec 0x620>;
};
&uart1 {
status = "okay";
};

79
arch/arm/dts/imx6qdl-phytec-pfla02.dtsi
View File

@ -9,6 +9,28 @@
* http://www.gnu.org/copyleft/gpl.html
*/
/ {
chosen {
environment-nand {
compatible = "barebox,environment";
device-path = &gpmi, "partname:barebox-environment";
status = "disabled";
};
environment-spinor {
compatible = "barebox,environment";
device-path = &flash, "partname:barebox-environment";
status = "disabled";
};
environment-sd {
compatible = "barebox,environment";
device-path = &usdhc3, "partname:barebox-environment";
status = "disabled";
};
};
};
&ecspi3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3>;
@ -20,6 +42,20 @@
compatible = "m25p80";
spi-max-frequency = <20000000>;
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "barebox";
reg = <0x0 0x80000>;
};
partition@1 {
label = "barebox-environment";
reg = <0x80000 0x10000>;
};
};
};
@ -36,6 +72,33 @@
pinctrl-0 = <&pinctrl_gpmi_nand>;
nand-on-flash-bbt;
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "barebox";
reg = <0x0 0x400000>;
};
partition@1 {
label = "barebox-environment";
reg = <0x400000 0x20000>;
};
partition@2 {
label = "oftree";
reg = <0x420000 0x20000>;
};
partition@3 {
label = "kernel";
reg = <0x440000 0x800000>;
};
partition@4 {
label = "root";
reg = <0xC40000 0x0>;
};
};
&iomuxc {
@ -149,6 +212,10 @@
};
};
&ocotp {
barebox,provide-mac-address = <&fec 0x620>;
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
@ -169,4 +236,16 @@
cd-gpios = <&gpio1 27 0>;
wp-gpios = <&gpio1 29 0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "barebox";
reg = <0x0 0x80000>;
};
partition@1 {
label = "barebox-environment";
reg = <0x80000 0x80000>;
};
};

4
arch/arm/dts/imx6s-phytec-pfla02.dtsi
View File

@ -15,8 +15,4 @@
/ {
model = "Phytec phyFLEX-i.MX6 Single";
compatible = "phytec,imx6s-pfla02", "fsl,imx6dl";
memory {
reg = <0x10000000 0x20000000>;
};
};

4
drivers/net/phy/micrel.c
View File

@ -254,11 +254,11 @@ static struct phy_driver ksphy_driver[] = {
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,
}, {
/* I saw the same issue like PHY_ID_KSZ9021 for Asym_Pause */
.phy_id = PHY_ID_KSZ9031,
.phy_id_mask = 0x00fffff0,
.drv.name = "Micrel KSZ9031 Gigabit PHY",
.features = (PHY_GBIT_FEATURES | SUPPORTED_Pause
| SUPPORTED_Asym_Pause),
.features = (PHY_GBIT_FEATURES | SUPPORTED_Pause),
.config_init = kszphy_config_init,
.config_aneg = genphy_config_aneg,
.read_status = genphy_read_status,