svn_rev_351
This commit is contained in:
Sascha Hauer
Sascha Hauer
parent
cc43d146a8
commit
52f6ce11a9
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#include <cfi_flash.h>
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static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
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{
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flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
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flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
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}
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/*-----------------------------------------------------------------------
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* read jedec ids from device and set corresponding fields in info struct
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*
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* Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
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*
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*/
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static void amd_read_jedec_ids (flash_info_t * info)
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{
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info->manufacturer_id = 0;
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info->device_id = 0;
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info->device_id2 = 0;
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flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
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flash_unlock_seq(info, 0);
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flash_write_cmd(info, 0, AMD_ADDR_START, FLASH_CMD_READ_ID);
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udelay(1000); /* some flash are slow to respond */
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info->manufacturer_id = flash_read_uchar (info,
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FLASH_OFFSET_MANUFACTURER_ID);
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info->device_id = flash_read_uchar (info,
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FLASH_OFFSET_DEVICE_ID);
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if (info->device_id == 0x7E) {
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/* AMD 3-byte (expanded) device ids */
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info->device_id2 = flash_read_uchar (info,
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FLASH_OFFSET_DEVICE_ID2);
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info->device_id2 <<= 8;
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info->device_id2 |= flash_read_uchar (info,
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FLASH_OFFSET_DEVICE_ID3);
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}
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flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
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}
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static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
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{
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cfiptr_t cptr;
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cfiword_t cword;
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int retval;
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cptr.cp = flash_make_addr (info, sect, offset);
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flash_make_cmd (info, cmd, &cword);
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
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break;
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case FLASH_CFI_16BIT:
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retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
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break;
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case FLASH_CFI_32BIT:
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retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
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break;
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case FLASH_CFI_64BIT:
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retval = ((cptr.llp[0] & cword.ll) !=
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(cptr.llp[0] & cword.ll));
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break;
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default:
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retval = 0;
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break;
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}
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return retval;
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}
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/*
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* flash_is_busy - check to see if the flash is busy
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* This routine checks the status of the chip and returns true if the chip is busy
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*/
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static int amd_flash_is_busy (flash_info_t * info, flash_sect_t sect)
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{
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return flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
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}
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static int amd_flash_erase_one (flash_info_t * info, long sect)
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{
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int rcode = 0;
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flash_unlock_seq (info, sect);
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flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
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AMD_CMD_ERASE_START);
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flash_unlock_seq (info, sect);
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flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
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if (flash_status_check
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(info, sect, info->erase_blk_tout, "erase")) {
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rcode = 1;
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} else
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putc ('.');
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return rcode;
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}
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static void amd_flash_prepare_write(flash_info_t * info)
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{
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flash_unlock_seq (info, 0);
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flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
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}
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#ifdef CONFIG_CFI_BUFFER_WRITE
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static int amd_flash_write_cfibuffer (flash_info_t * info, ulong dest, const uchar * cp,
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int len)
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{
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flash_sect_t sector;
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int cnt;
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int retcode;
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volatile cfiptr_t src;
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volatile cfiptr_t dst;
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src.cp = (uchar *)cp;
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dst.cp = (uchar *) dest;
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sector = find_sector (info, dest);
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flash_unlock_seq(info,0);
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flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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cnt = len;
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) *dst.cp++ = *src.cp++;
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break;
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case FLASH_CFI_16BIT:
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cnt = len >> 1;
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) *dst.wp++ = *src.wp++;
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break;
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case FLASH_CFI_32BIT:
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cnt = len >> 2;
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) *dst.lp++ = *src.lp++;
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break;
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case FLASH_CFI_64BIT:
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cnt = len >> 3;
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) *dst.llp++ = *src.llp++;
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break;
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default:
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return ERR_INVAL;
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}
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flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
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retcode = flash_status_check (info, sector, info->buffer_write_tout,
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"buffer write");
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return retcode;
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}
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#endif /* CONFIG_CFI_BUFFER_WRITE */
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struct cfi_cmd_set cfi_cmd_set_amd = {
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.flash_write_cfibuffer = amd_flash_write_cfibuffer,
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.flash_erase_one = amd_flash_erase_one,
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.flash_is_busy = amd_flash_is_busy,
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.flash_read_jedec_ids = amd_read_jedec_ids,
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.flash_prepare_write = amd_flash_prepare_write,
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};
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@ -0,0 +1,164 @@
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#include <cfi_flash.h>
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/*-----------------------------------------------------------------------
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* read jedec ids from device and set corresponding fields in info struct
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*
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* Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
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*
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*/
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static void intel_read_jedec_ids (flash_info_t * info)
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{
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info->manufacturer_id = 0;
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info->device_id = 0;
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info->device_id2 = 0;
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flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
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flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
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udelay(1000); /* some flash are slow to respond */
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info->manufacturer_id = flash_read_uchar (info,
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FLASH_OFFSET_MANUFACTURER_ID);
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info->device_id = flash_read_uchar (info,
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FLASH_OFFSET_DEVICE_ID);
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flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
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}
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/*-----------------------------------------------------------------------
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* Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
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* This routine sets the flash to read-array mode.
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*/
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static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
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uint64_t tout, char *prompt)
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{
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int retcode;
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retcode = flash_status_check (info, sector, tout, prompt);
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if ((retcode == ERR_OK)
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&& !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
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retcode = ERR_INVAL;
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printf ("Flash %s error at address %lx\n", prompt,
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info->start[sector]);
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if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
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puts ("Command Sequence Error.\n");
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} else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
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puts ("Block Erase Error.\n");
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retcode = ERR_NOT_ERASED;
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} else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
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puts ("Locking Error\n");
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}
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if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
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puts ("Block locked.\n");
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retcode = ERR_PROTECTED;
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}
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if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
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puts ("Vpp Low Error.\n");
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}
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flash_write_cmd (info, sector, 0, info->cmd_reset);
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return retcode;
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}
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/*
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* flash_is_busy - check to see if the flash is busy
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* This routine checks the status of the chip and returns true if the chip is busy
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*/
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static int intel_flash_is_busy (flash_info_t * info, flash_sect_t sect)
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{
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return !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
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}
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static int intel_flash_erase_one (flash_info_t * info, long sect)
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{
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int rcode = 0;
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flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
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flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
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flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
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if (flash_full_status_check
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(info, sect, info->erase_blk_tout, "erase")) {
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rcode = 1;
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} else
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putc ('.');
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return rcode;
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}
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static void intel_flash_prepare_write(flash_info_t * info)
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{
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flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
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flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
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}
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#ifdef CONFIG_CFI_BUFFER_WRITE
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static int intel_flash_write_cfibuffer (flash_info_t * info, ulong dest, const uchar * cp,
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int len)
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{
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flash_sect_t sector;
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int cnt;
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int retcode;
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volatile cfiptr_t src;
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volatile cfiptr_t dst;
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src.cp = (uchar *)cp;
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dst.cp = (uchar *) dest;
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sector = find_sector (info, dest);
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flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
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flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
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if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
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"write to buffer")) == ERR_OK) {
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/* reduce the number of loops by the width of the port */
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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cnt = len;
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break;
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case FLASH_CFI_16BIT:
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cnt = len >> 1;
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break;
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case FLASH_CFI_32BIT:
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cnt = len >> 2;
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break;
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case FLASH_CFI_64BIT:
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cnt = len >> 3;
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break;
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default:
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return ERR_INVAL;
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break;
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}
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flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
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while (cnt-- > 0) {
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switch (info->portwidth) {
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case FLASH_CFI_8BIT:
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*dst.cp++ = *src.cp++;
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break;
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case FLASH_CFI_16BIT:
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*dst.wp++ = *src.wp++;
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break;
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case FLASH_CFI_32BIT:
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*dst.lp++ = *src.lp++;
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break;
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case FLASH_CFI_64BIT:
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*dst.llp++ = *src.llp++;
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break;
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default:
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return ERR_INVAL;
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break;
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}
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}
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flash_write_cmd (info, sector, 0,
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FLASH_CMD_WRITE_BUFFER_CONFIRM);
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retcode = flash_full_status_check (info, sector,
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info->buffer_write_tout,
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"buffer write");
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}
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return retcode;
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}
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#endif /* CONFIG_CFI_BUFFER_WRITE */
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struct cfi_cmd_set cfi_cmd_set_intel = {
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.flash_write_cfibuffer = intel_flash_write_cfibuffer,
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.flash_erase_one = intel_flash_erase_one,
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.flash_is_busy = intel_flash_is_busy,
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.flash_read_jedec_ids = intel_read_jedec_ids,
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.flash_prepare_write = intel_flash_prepare_write,
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};
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