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at91: 9260 and 9g20 add support of join SRAM Memory Mapping 

on 9269 and 9g20 the sram are mirrored at then of the bank so we can join them

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD 2012-01-05 14:30:34 +01:00 committed by Sascha Hauer
parent 3fc38b0c5b
commit 543bd82619
2 changed files with 8 additions and 8 deletions
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12
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -26,15 +26,11 @@ void at91_add_device_sdram(u32 size)
{
arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size);
if (cpu_is_at91sam9g20()) {
add_mem_device("sram0", AT91SAM9G20_SRAM0_BASE,
AT91SAM9G20_SRAM0_SIZE, IORESOURCE_MEM_WRITEABLE);
add_mem_device("sram1", AT91SAM9G20_SRAM1_BASE,
AT91SAM9G20_SRAM1_SIZE, IORESOURCE_MEM_WRITEABLE);
add_mem_device("sram0", AT91SAM9G20_SRAM_BASE,
AT91SAM9G20_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE);
} else {
add_mem_device("sram0", AT91SAM9260_SRAM0_BASE,
AT91SAM9260_SRAM0_SIZE, IORESOURCE_MEM_WRITEABLE);
add_mem_device("sram1", AT91SAM9260_SRAM1_BASE,
AT91SAM9260_SRAM1_SIZE, IORESOURCE_MEM_WRITEABLE);
add_mem_device("sram0", AT91SAM9260_SRAM_BASE,
AT91SAM9260_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE);
}
}

4
arch/arm/mach-at91/include/mach/at91sam9260.h
View File

@ -121,6 +121,8 @@
#define AT91SAM9260_SRAM0_SIZE SZ_4K /* Internal SRAM 0 size (4Kb) */
#define AT91SAM9260_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */
#define AT91SAM9260_SRAM1_SIZE SZ_4K /* Internal SRAM 1 size (4Kb) */
#define AT91SAM9260_SRAM_BASE 0x002FF000 /* Internal SRAM base address */
#define AT91SAM9260_SRAM_SIZE SZ_8K /* Internal SRAM size (8Kb) */
#define AT91SAM9260_UHP_BASE 0x00500000 /* USB Host controller */
@ -134,6 +136,8 @@
#define AT91SAM9G20_SRAM0_SIZE SZ_16K /* Internal SRAM 0 size (16Kb) */
#define AT91SAM9G20_SRAM1_BASE 0x00300000 /* Internal SRAM 1 base address */
#define AT91SAM9G20_SRAM1_SIZE SZ_16K /* Internal SRAM 1 size (16Kb) */
#define AT91SAM9G20_SRAM_BASE 0x002FC000 /* Internal SRAM base address */
#define AT91SAM9G20_SRAM_SIZE SZ_32K /* Internal SRAM size (32Kb) */
#define AT91SAM9G20_UHP_BASE 0x00500000 /* USB Host controller */