ARM i.MX5: Allow to pass cpu clock to lowlevel init
Some variants of the i.MX53 do not allow to run at 1GHz, so pass a cpu frequency parameter to the lowlevel init function. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -155,7 +155,7 @@ static int loco_console_init(void)
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{
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mxc_iomux_v3_setup_multiple_pads(loco_pads, ARRAY_SIZE(loco_pads));
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imx53_init_lowlevel();
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imx53_init_lowlevel(1000);
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imx53_add_uart0();
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return 0;
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@ -160,7 +160,7 @@ static int smd_console_init(void)
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{
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mxc_iomux_v3_setup_multiple_pads(smd_pads, ARRAY_SIZE(smd_pads));
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imx53_init_lowlevel();
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imx53_init_lowlevel(1000);
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imx53_add_uart0();
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imx53_add_uart1();
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@ -47,11 +47,12 @@ static int imx53_init(void)
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coredevice_initcall(imx53_init);
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#define setup_pll_1000(base) imx5_setup_pll((base), 1000, ((10 << 4) + ((1 - 1) << 0)), (12 - 1), 5)
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#define setup_pll_800(base) imx5_setup_pll((base), 800, ((8 << 4) + ((1 - 1) << 0)), (3 - 1), 1)
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#define setup_pll_400(base) imx5_setup_pll((base), 400, ((8 << 4) + ((2 - 1) << 0)), (3 - 1), 1)
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#define setup_pll_455(base) imx5_setup_pll((base), 455, ((9 << 4) + ((2 - 1) << 0)), (48 - 1), 23)
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#define setup_pll_216(base) imx5_setup_pll((base), 216, ((8 << 4) + ((2 - 1) << 0)), (1 - 1), 1)
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void imx53_init_lowlevel(void)
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void imx53_init_lowlevel(unsigned int cpufreq_mhz)
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{
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void __iomem *ccm = (void __iomem *)MX53_CCM_BASE_ADDR;
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u32 r;
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@ -82,7 +83,11 @@ void imx53_init_lowlevel(void)
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/* Switch ARM to step clock */
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writel(0x4, ccm + MX5_CCM_CCSR);
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setup_pll_1000((void __iomem *)MX53_PLL1_BASE_ADDR);
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if (cpufreq_mhz == 1000)
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setup_pll_1000((void __iomem *)MX53_PLL1_BASE_ADDR);
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else
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setup_pll_800((void __iomem *)MX53_PLL1_BASE_ADDR);
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setup_pll_400((void __iomem *)MX53_PLL3_BASE_ADDR);
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/* Switch peripheral to PLL3 */
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@ -1,7 +1,7 @@
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#ifndef __MACH_MX5_H
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#define __MACH_MX5_H
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void imx53_init_lowlevel(void);
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void imx53_init_lowlevel(unsigned int cpufreq_mhz);
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void imx51_init_lowlevel(void);
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void imx5_setup_pll(void __iomem *base, int freq, u32 op, u32 mfd, u32 mfn);
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void imx5_init_lowlevel(void);
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