omap3: Add DPLL tables for silicon rev 1 and 2
This patch adds DPLL tables for OMAP34xx ES1.0 and ES2.0. When more than one table is added, the get_xxx_dpll_param() was updated to use the tables corresponding to ES2.0 to ensure that current functionality doesn't break. In addition, the tables have been reformatted for better readability. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sanjeev Premi
Sascha Hauer
parent
0bb8b98624
commit
580dd18d0e
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@ -205,106 +205,86 @@ pll_div_val5:
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/* the literal pools origin */
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.ltorg
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/* DPLL(1-4) PARAM TABLES */
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/* Each of the tables has M, N, FREQSEL, M2 values defined for nominal
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* OPP (1.2V). The fields are defined according to dpll_param
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* struct(omap3_clock.c). MAX index is as per omap3_clock.h
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/* MPU DPLL Parameter table
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*
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* This table defines the DPLL parameter table for the MPU as defined by
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* "struct dpll_param defined" in "omap3-clock.h"
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*
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* The tables are defined for separately each silicon revision.
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*/
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.globl mpu_dpll_param_es1
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mpu_dpll_param_es1:
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/* M N FREQSEL M2 */
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.word 0x0FE, 0x07, 0x05, 0x01 /* 12 MHz */
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.word 0x17D, 0x0C, 0x03, 0x01 /* 13 MHz */
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.word 0x179, 0x12, 0x04, 0x01 /* 19.2 MHz */
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.word 0x17D, 0x19, 0x03, 0x01 /* 26 MHz */
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.word 0x1FA, 0x32, 0x03, 0x01 /* 38.4 MHz */
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mpu_dpll_param:
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/* 12MHz */
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/* ES2 */
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.word 0x0FA,0x05,0x07,0x01
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/* 13MHz */
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/* ES2 */
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.word 0x1F4,0x0C,0x03,0x01
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/* 19.2MHz */
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/* ES2 */
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.word 0x271,0x17,0x03,0x01
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/* 26MHz */
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/* ES2 */
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.word 0x0FA,0x0C,0x07,0x01
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/* 38.4MHz */
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/* ES2 */
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.word 0x271,0x2F,0x03,0x01
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.globl mpu_dpll_param_es2
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mpu_dpll_param_es2:
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/* M N FREQSEL M2 */
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.word 0x0FA, 0x05, 0x07, 0x01 /* 12 MHz */
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.word 0x1F4, 0x0C, 0x03, 0x01 /* 13 MHz */
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.word 0x271, 0x17, 0x03, 0x01 /* 19.2 MHz */
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.word 0x0FA, 0x0C, 0x07, 0x01 /* 26 MHz */
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.word 0x271, 0x2F, 0x03, 0x01 /* 38.4 MHz */
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.globl get_mpu_dpll_param
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get_mpu_dpll_param:
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adr r0, mpu_dpll_param
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adr r0, mpu_dpll_param_es2
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mov pc, lr
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iva_dpll_param:
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/* 12MHz */
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/* ES2 */
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.word 0x0B4,0x05,0x07,0x01
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iva_dpll_param_es1:
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/* M N FREQSEL M2 */
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.word 0x07D, 0x05, 0x07, 0x01 /* 12 MHz */
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.word 0x0FA, 0x0C, 0x03, 0x01 /* 13 MHz */
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.word 0x082, 0x09, 0x07, 0x01 /* 19.2 MHz */
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.word 0x07D, 0x0C, 0x07, 0x01 /* 26 MHz */
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.word 0x13F, 0x30, 0x03, 0x01 /* 38.4 MHz */
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/* 13MHz */
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/* ES2 */
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.word 0x168,0x0C,0x03,0x01
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/* 19.2MHz */
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/* ES2 */
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.word 0x0E1,0x0B,0x06,0x01
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/* 26MHz */
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/* ES2 */
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.word 0x0B4,0x0C,0x07,0x01
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/* 38.4MHz */
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/* ES2 */
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.word 0x0E1,0x17,0x06,0x01
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iva_dpll_param_es2:
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/* M N FREQSEL M2 */
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.word 0x0B4, 0x05, 0x07, 0x01 /* 12 MHz */
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.word 0x168, 0x0C, 0x03, 0x01 /* 13 MHz */
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.word 0x0E1, 0x0B, 0x06, 0x01 /* 19.2 MHz */
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.word 0x0B4, 0x0C, 0x07, 0x01 /* 26 MHz */
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.word 0x0E1, 0x17, 0x06, 0x01 /* 38.4 MHz */
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.globl get_iva_dpll_param
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get_iva_dpll_param:
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adr r0, iva_dpll_param
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adr r0, iva_dpll_param_es2
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mov pc, lr
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core_dpll_param:
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/* 12MHz */
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/* ES2 */
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.word 0x0A6,0x05,0x07,0x01
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core_dpll_param_es1:
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/* M N FREQSEL M2 */
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.word 0x19F, 0x0E, 0x03, 0x01 /* 12 MHz */
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.word 0x1B2, 0x10, 0x03, 0x01 /* 13 MHz */
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.word 0x19F, 0x17, 0x03, 0x01 /* 19.2 MHz */
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.word 0x1B2, 0x21, 0x03, 0x01 /* 26 MHz */
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.word 0x19F, 0x2F, 0x03, 0x01 /* 38.4 MHz */
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/* 13MHz */
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/* ES2 */
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.word 0x14C,0x0C,0x03,0x01
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/* 19.2MHz */
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/* ES2 */
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.word 0x19F,0x17,0x03,0x01
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/* 26MHz */
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/* ES2 */
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.word 0x0A6,0x0C,0x07,0x01
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/* 38.4MHz */
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/* ES2 */
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.word 0x19F,0x2F,0x03,0x01
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core_dpll_param_es2:
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/* M N FREQSEL M2 */
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.word 0x0A6, 0x05, 0x07, 0x01 /* 12 MHz */
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.word 0x14C, 0x0C, 0x03, 0x01 /* 13 MHz */
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.word 0x19F, 0x17, 0x03, 0x01 /* 19.2 MHz */
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.word 0x0A6, 0x0C, 0x07, 0x01 /* 26 MHz */
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.word 0x19F, 0x2F, 0x03, 0x01 /* 38.4 MHz */
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.globl get_core_dpll_param
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get_core_dpll_param:
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adr r0, core_dpll_param
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adr r0, core_dpll_param_es2
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mov pc, lr
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/* PER DPLL values are same for both ES1 and ES2 */
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per_dpll_param:
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/* 12MHz */
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.word 0xD8,0x05,0x07,0x09
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/* 13MHz */
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.word 0x1B0,0x0C,0x03,0x09
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/* 19.2MHz */
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.word 0xE1,0x09,0x07,0x09
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/* 26MHz */
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.word 0xD8,0x0C,0x07,0x09
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/* 38.4MHz */
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.word 0xE1,0x13,0x07,0x09
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/* M N FREQSEL M2 */
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.word 0x0D8, 0x05, 0x07, 0x09 /* 12 MHz */
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.word 0x1B0, 0x0C, 0x03, 0x09 /* 13 MHz */
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.word 0x0E1, 0x09, 0x07, 0x09 /* 19.2 MHz */
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.word 0x0D8, 0x0C, 0x07, 0x09 /* 26 MHz */
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.word 0x0E1, 0x13, 0x07, 0x09 /* 38.4 MHz */
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.globl get_per_dpll_param
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get_per_dpll_param:
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