ARM: i.MX: karo-tx6: Setup other PMICs
The TX6 boards come with 3 different PMIC variants from which we currently only support the ltc3673. Detect the other two by i2c address and set them up correctly. The code is based on the karo U-Boot port. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
c46988f380
commit
5f1b877591
6 changed files with 521 additions and 142 deletions
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@ -1,2 +1,3 @@
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obj-y += board.o
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obj-y += board.o
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lwl-y += lowlevel.o
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lwl-y += lowlevel.o
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obj-y += pmic-ltc3676.o pmic-rn5t567.o pmic-rn5t618.o
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@ -26,152 +26,11 @@
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#include <mach/bbu.h>
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#include <mach/bbu.h>
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#include <mach/imx6.h>
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#include <mach/imx6.h>
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#include <mfd/imx6q-iomuxc-gpr.h>
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#include <mfd/imx6q-iomuxc-gpr.h>
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#include "pmic.h"
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#define ETH_PHY_RST IMX_GPIO_NR(7, 6)
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#define ETH_PHY_RST IMX_GPIO_NR(7, 6)
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#define ETH_PHY_PWR IMX_GPIO_NR(3, 20)
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#define ETH_PHY_PWR IMX_GPIO_NR(3, 20)
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#define ETH_PHY_INT IMX_GPIO_NR(7, 1)
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#define ETH_PHY_INT IMX_GPIO_NR(7, 1)
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#define DIV_ROUND(n,d) (((n) + ((d)/2)) / (d))
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#define LTC3676_BUCK1 0x01
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#define LTC3676_BUCK2 0x02
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#define LTC3676_BUCK3 0x03
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#define LTC3676_BUCK4 0x04
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#define LTC3676_DVB1A 0x0A
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#define LTC3676_DVB1B 0x0B
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#define LTC3676_DVB2A 0x0C
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#define LTC3676_DVB2B 0x0D
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#define LTC3676_DVB3A 0x0E
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#define LTC3676_DVB3B 0x0F
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#define LTC3676_DVB4A 0x10
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#define LTC3676_DVB4B 0x11
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#define LTC3676_MSKPG 0x13
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#define LTC3676_CLIRQ 0x1f
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#define LTC3676_BUCK_DVDT_FAST (1 << 0)
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#define LTC3676_BUCK_KEEP_ALIVE (1 << 1)
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#define LTC3676_BUCK_CLK_RATE_LOW (1 << 2)
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#define LTC3676_BUCK_PHASE_SEL (1 << 3)
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#define LTC3676_BUCK_ENABLE_300 (1 << 4)
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#define LTC3676_BUCK_PULSE_SKIP (0 << 5)
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#define LTC3676_BUCK_BURST_MODE (1 << 5)
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#define LTC3676_BUCK_CONTINUOUS (2 << 5)
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#define LTC3676_BUCK_ENABLE (1 << 7)
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#define LTC3676_PGOOD_MASK (1 << 5)
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#define LTC3676_MSKPG_BUCK1 (1 << 0)
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#define LTC3676_MSKPG_BUCK2 (1 << 1)
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#define LTC3676_MSKPG_BUCK3 (1 << 2)
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#define LTC3676_MSKPG_BUCK4 (1 << 3)
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#define LTC3676_MSKPG_LDO2 (1 << 5)
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#define LTC3676_MSKPG_LDO3 (1 << 6)
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#define LTC3676_MSKPG_LDO4 (1 << 7)
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#define VDD_IO_VAL mV_to_regval(vout_to_vref(3300 * 10, 5))
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#define VDD_IO_VAL_LP mV_to_regval(vout_to_vref(3100 * 10, 5))
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#define VDD_IO_VAL_2 mV_to_regval(vout_to_vref(3300 * 10, 5_2))
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#define VDD_IO_VAL_2_LP mV_to_regval(vout_to_vref(3100 * 10, 5_2))
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#define VDD_SOC_VAL mV_to_regval(vout_to_vref(1425 * 10, 6))
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#define VDD_SOC_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 6))
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#define VDD_DDR_VAL mV_to_regval(vout_to_vref(1500 * 10, 7))
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#define VDD_DDR_VAL_LP mV_to_regval(vout_to_vref(1500 * 10, 7))
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#define VDD_CORE_VAL mV_to_regval(vout_to_vref(1425 * 10, 8))
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#define VDD_CORE_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 8))
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/* LDO1 */
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#define R1_1 470
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#define R2_1 150
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/* LDO4 */
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#define R1_4 470
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#define R2_4 150
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/* Buck1 */
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#define R1_5 390
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#define R2_5 110
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#define R1_5_2 470
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#define R2_5_2 150
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/* Buck2 (SOC) */
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#define R1_6 150
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#define R2_6 180
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/* Buck3 (DDR) */
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#define R1_7 150
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#define R2_7 140
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/* Buck4 (CORE) */
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#define R1_8 150
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#define R2_8 180
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/* calculate voltages in 10mV */
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#define R1(idx) R1_##idx
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#define R2(idx) R2_##idx
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#define vout_to_vref(vout, idx) ((vout) * R2(idx) / (R1(idx) + R2(idx)))
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#define vref_to_vout(vref, idx) DIV_ROUND_UP((vref) * (R1(idx) + R2(idx)), R2(idx))
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#define mV_to_regval(mV) DIV_ROUND(((((mV) < 4125) ? 4125 : (mV)) - 4125), 125)
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#define regval_to_mV(v) (((v) * 125 + 4125))
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static struct ltc3673_regs {
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u8 addr;
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u8 val;
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u8 mask;
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} ltc3676_regs[] = {
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{ LTC3676_MSKPG, ~LTC3676_MSKPG_BUCK1, },
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{ LTC3676_DVB2B, VDD_SOC_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
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{ LTC3676_DVB3B, VDD_DDR_VAL_LP, ~0x3f, },
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{ LTC3676_DVB4B, VDD_CORE_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
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{ LTC3676_DVB2A, VDD_SOC_VAL, ~0x3f, },
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{ LTC3676_DVB3A, VDD_DDR_VAL, ~0x3f, },
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{ LTC3676_DVB4A, VDD_CORE_VAL, ~0x3f, },
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{ LTC3676_BUCK1, LTC3676_BUCK_BURST_MODE | LTC3676_BUCK_CLK_RATE_LOW, },
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{ LTC3676_BUCK2, LTC3676_BUCK_BURST_MODE, },
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{ LTC3676_BUCK3, LTC3676_BUCK_BURST_MODE, },
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{ LTC3676_BUCK4, LTC3676_BUCK_BURST_MODE, },
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{ LTC3676_CLIRQ, 0, }, /* clear interrupt status */
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};
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static struct ltc3673_regs ltc3676_regs_2[] = {
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{ LTC3676_DVB1B, VDD_IO_VAL_2_LP | LTC3676_PGOOD_MASK, ~0x3f, },
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{ LTC3676_DVB1A, VDD_IO_VAL_2, ~0x3f, },
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};
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static int setup_pmic_voltages(void)
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{
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struct i2c_adapter *adapter = NULL;
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struct i2c_client client;
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int addr = 0x3c;
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int bus = 0;
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int i;
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struct ltc3673_regs *r;
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adapter = i2c_get_adapter(bus);
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if (!adapter) {
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pr_err("i2c bus %d not found\n", bus);
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return -ENODEV;
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}
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client.adapter = adapter;
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client.addr = addr;
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r = ltc3676_regs;
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for (i = 0; i < ARRAY_SIZE(ltc3676_regs); i++, r++) {
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if (i2c_write_reg(&client, r->addr, &r->val, 1) != 1) {
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pr_err("i2c write error\n");
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return -EIO;
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}
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}
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r = ltc3676_regs_2;
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for (i = 0; i < ARRAY_SIZE(ltc3676_regs_2); i++, r++) {
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if (i2c_write_reg(&client, r->addr, &r->val, 1) != 1) {
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pr_err("i2c write error\n");
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return -EIO;
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}
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}
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return 0;
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}
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static void eth_init(void)
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static void eth_init(void)
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{
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{
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writel(val, iomux + IOMUXC_GPR1);
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writel(val, iomux + IOMUXC_GPR1);
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}
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}
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static struct {
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unsigned char addr;
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int (*init)(struct i2c_client *client);
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const char *name;
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} i2c_addrs[] = {
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{ 0x3c, ltc3676_pmic_setup, "ltc3676" },
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{ 0x32, rn5t618_pmic_setup, "rn5t618" },
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{ 0x33, rn5t567_pmic_setup, "rn5t567" },
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};
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int setup_pmic_voltages(void)
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{
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struct i2c_adapter *adapter;
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struct i2c_client client;
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int ret = -ENODEV;
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int i;
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int bus = 0;
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uint8_t reg;
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adapter = i2c_get_adapter(bus);
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if (!adapter) {
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pr_err("i2c bus %d not found\n", bus);
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return -ENODEV;
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}
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client.adapter = adapter;
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for (i = 0; i < ARRAY_SIZE(i2c_addrs); i++) {
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client.addr = i2c_addrs[i].addr;
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pr_debug("Probing for I2C dev 0x%02x\n", client.addr);
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ret = i2c_write_reg(&client, 0x00, ®, 0);
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if (ret == 0) {
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pr_info("Detected %s PMIC\n", i2c_addrs[i].name);
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ret = i2c_addrs[i].init(&client);
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goto out;
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}
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}
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pr_err("No PMIC found\n");
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out:
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if (ret)
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pr_err("PMIC setup failed with %s\n", strerror(-ret));
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return ret;
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}
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#define IMX6_SRC_SBMR1 0x04
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#define IMX6_SRC_SBMR1 0x04
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static int tx6x_devices_init(void)
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static int tx6x_devices_init(void)
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149
arch/arm/boards/karo-tx6x/pmic-ltc3676.c
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149
arch/arm/boards/karo-tx6x/pmic-ltc3676.c
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/*
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* Copyright (C) 2014 Lothar Waßmann <LW@KARO-electronics.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <i2c/i2c.h>
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#include "pmic.h"
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#define LTC3676_BUCK1 0x01
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#define LTC3676_BUCK2 0x02
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#define LTC3676_BUCK3 0x03
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#define LTC3676_BUCK4 0x04
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#define LTC3676_DVB1A 0x0A
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#define LTC3676_DVB1B 0x0B
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#define LTC3676_DVB2A 0x0C
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#define LTC3676_DVB2B 0x0D
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#define LTC3676_DVB3A 0x0E
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#define LTC3676_DVB3B 0x0F
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#define LTC3676_DVB4A 0x10
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#define LTC3676_DVB4B 0x11
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#define LTC3676_MSKPG 0x13
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#define LTC3676_CLIRQ 0x1f
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#define LTC3676_BUCK_DVDT_FAST (1 << 0)
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#define LTC3676_BUCK_KEEP_ALIVE (1 << 1)
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#define LTC3676_BUCK_CLK_RATE_LOW (1 << 2)
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#define LTC3676_BUCK_PHASE_SEL (1 << 3)
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#define LTC3676_BUCK_ENABLE_300 (1 << 4)
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#define LTC3676_BUCK_PULSE_SKIP (0 << 5)
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#define LTC3676_BUCK_BURST_MODE (1 << 5)
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#define LTC3676_BUCK_CONTINUOUS (2 << 5)
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#define LTC3676_BUCK_ENABLE (1 << 7)
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#define LTC3676_PGOOD_MASK (1 << 5)
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#define LTC3676_MSKPG_BUCK1 (1 << 0)
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#define LTC3676_MSKPG_BUCK2 (1 << 1)
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#define LTC3676_MSKPG_BUCK3 (1 << 2)
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#define LTC3676_MSKPG_BUCK4 (1 << 3)
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#define LTC3676_MSKPG_LDO2 (1 << 5)
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#define LTC3676_MSKPG_LDO3 (1 << 6)
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#define LTC3676_MSKPG_LDO4 (1 << 7)
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#define VDD_IO_VAL mV_to_regval(vout_to_vref(3300 * 10, 5))
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#define VDD_IO_VAL_LP mV_to_regval(vout_to_vref(3100 * 10, 5))
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#define VDD_IO_VAL_2 mV_to_regval(vout_to_vref(3300 * 10, 5_2))
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#define VDD_IO_VAL_2_LP mV_to_regval(vout_to_vref(3100 * 10, 5_2))
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#define VDD_SOC_VAL mV_to_regval(vout_to_vref(1425 * 10, 6))
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#define VDD_SOC_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 6))
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#define VDD_DDR_VAL mV_to_regval(vout_to_vref(1500 * 10, 7))
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#define VDD_DDR_VAL_LP mV_to_regval(vout_to_vref(1500 * 10, 7))
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#define VDD_CORE_VAL mV_to_regval(vout_to_vref(1425 * 10, 8))
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#define VDD_CORE_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 8))
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/* LDO1 */
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#define R1_1 470
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#define R2_1 150
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/* LDO4 */
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#define R1_4 470
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#define R2_4 150
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/* Buck1 */
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#define R1_5 390
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#define R2_5 110
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#define R1_5_2 470
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#define R2_5_2 150
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/* Buck2 (SOC) */
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#define R1_6 150
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#define R2_6 180
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/* Buck3 (DDR) */
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#define R1_7 150
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#define R2_7 140
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/* Buck4 (CORE) */
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#define R1_8 150
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#define R2_8 180
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/* calculate voltages in 10mV */
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#define R1(idx) R1_##idx
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#define R2(idx) R2_##idx
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#define vout_to_vref(vout, idx) ((vout) * R2(idx) / (R1(idx) + R2(idx)))
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#define vref_to_vout(vref, idx) DIV_ROUND_UP((vref) * (R1(idx) + R2(idx)), R2(idx))
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#define mV_to_regval(mV) DIV_ROUND(((((mV) < 4125) ? 4125 : (mV)) - 4125), 125)
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#define regval_to_mV(v) (((v) * 125 + 4125))
|
||||||
|
|
||||||
|
static struct ltc3673_regs {
|
||||||
|
u8 addr;
|
||||||
|
u8 val;
|
||||||
|
u8 mask;
|
||||||
|
} ltc3676_regs[] = {
|
||||||
|
{ LTC3676_MSKPG, ~LTC3676_MSKPG_BUCK1, },
|
||||||
|
{ LTC3676_DVB2B, VDD_SOC_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
|
||||||
|
{ LTC3676_DVB3B, VDD_DDR_VAL_LP, ~0x3f, },
|
||||||
|
{ LTC3676_DVB4B, VDD_CORE_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
|
||||||
|
{ LTC3676_DVB2A, VDD_SOC_VAL, ~0x3f, },
|
||||||
|
{ LTC3676_DVB3A, VDD_DDR_VAL, ~0x3f, },
|
||||||
|
{ LTC3676_DVB4A, VDD_CORE_VAL, ~0x3f, },
|
||||||
|
{ LTC3676_BUCK1, LTC3676_BUCK_BURST_MODE | LTC3676_BUCK_CLK_RATE_LOW, },
|
||||||
|
{ LTC3676_BUCK2, LTC3676_BUCK_BURST_MODE, },
|
||||||
|
{ LTC3676_BUCK3, LTC3676_BUCK_BURST_MODE, },
|
||||||
|
{ LTC3676_BUCK4, LTC3676_BUCK_BURST_MODE, },
|
||||||
|
{ LTC3676_CLIRQ, 0, }, /* clear interrupt status */
|
||||||
|
};
|
||||||
|
|
||||||
|
static struct ltc3673_regs ltc3676_regs_2[] = {
|
||||||
|
{ LTC3676_DVB1B, VDD_IO_VAL_2_LP | LTC3676_PGOOD_MASK, ~0x3f, },
|
||||||
|
{ LTC3676_DVB1A, VDD_IO_VAL_2, ~0x3f, },
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
int ltc3676_pmic_setup(struct i2c_client *client)
|
||||||
|
{
|
||||||
|
int i;
|
||||||
|
struct ltc3673_regs *r;
|
||||||
|
|
||||||
|
r = ltc3676_regs;
|
||||||
|
|
||||||
|
for (i = 0; i < ARRAY_SIZE(ltc3676_regs); i++, r++) {
|
||||||
|
if (i2c_write_reg(client, r->addr, &r->val, 1) != 1) {
|
||||||
|
pr_err("i2c write error\n");
|
||||||
|
return -EIO;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
r = ltc3676_regs_2;
|
||||||
|
|
||||||
|
for (i = 0; i < ARRAY_SIZE(ltc3676_regs_2); i++, r++) {
|
||||||
|
if (i2c_write_reg(client, r->addr, &r->val, 1) != 1) {
|
||||||
|
pr_err("i2c write error\n");
|
||||||
|
return -EIO;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
158
arch/arm/boards/karo-tx6x/pmic-rn5t567.c
Normal file
158
arch/arm/boards/karo-tx6x/pmic-rn5t567.c
Normal file
|
@ -0,0 +1,158 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2014 Lothar Waßmann <LW@KARO-electronics.de>
|
||||||
|
*
|
||||||
|
* See file CREDITS for list of people who contributed to this
|
||||||
|
* project.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* version 2 as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <common.h>
|
||||||
|
#include <i2c/i2c.h>
|
||||||
|
#include "pmic.h"
|
||||||
|
|
||||||
|
#define RN5T567_NOETIMSET 0x11
|
||||||
|
#define RN5T567_LDORTC1_SLOT 0x2a
|
||||||
|
#define RN5T567_DC1CTL 0x2c
|
||||||
|
#define RN5T567_DC1CTL2 0x2d
|
||||||
|
#define RN5T567_DC2CTL 0x2e
|
||||||
|
#define RN5T567_DC2CTL2 0x2f
|
||||||
|
#define RN5T567_DC3CTL 0x30
|
||||||
|
#define RN5T567_DC3CTL2 0x31
|
||||||
|
#define RN5T567_DC1DAC 0x36 /* CORE */
|
||||||
|
#define RN5T567_DC2DAC 0x37 /* SOC */
|
||||||
|
#define RN5T567_DC3DAC 0x38 /* DDR */
|
||||||
|
#define RN5T567_DC1DAC_SLP 0x3b
|
||||||
|
#define RN5T567_DC2DAC_SLP 0x3c
|
||||||
|
#define RN5T567_DC3DAC_SLP 0x3d
|
||||||
|
#define RN5T567_LDOEN1 0x44
|
||||||
|
#define RN5T567_LDODIS 0x46
|
||||||
|
#define RN5T567_LDOEN2 0x48
|
||||||
|
#define RN5T567_LDO3DAC 0x4e /* IO */
|
||||||
|
#define RN5T567_LDORTC1DAC 0x56 /* VBACKUP */
|
||||||
|
|
||||||
|
#define NOETIMSET_DIS_OFF_NOE_TIM (1 << 3)
|
||||||
|
|
||||||
|
#define VDD_RTC_VAL mV_to_regval_rtc(3000)
|
||||||
|
#define VDD_HIGH_VAL mV_to_regval3(3000)
|
||||||
|
#define VDD_HIGH_VAL_LP mV_to_regval3(3000)
|
||||||
|
#define VDD_CORE_VAL mV_to_regval(1350) /* DCDC1 */
|
||||||
|
#define VDD_CORE_VAL_LP mV_to_regval(900)
|
||||||
|
#define VDD_SOC_VAL mV_to_regval(1350) /* DCDC2 */
|
||||||
|
#define VDD_SOC_VAL_LP mV_to_regval(900)
|
||||||
|
#define VDD_DDR_VAL mV_to_regval(1350) /* DCDC3 */
|
||||||
|
#define VDD_DDR_VAL_LP mV_to_regval(1350)
|
||||||
|
|
||||||
|
/* calculate voltages in 10mV */
|
||||||
|
#define v2r(v,n,m) DIV_ROUND(((((v) < (n)) ? (n) : (v)) - (n)), (m))
|
||||||
|
#define r2v(r,n,m) (((r) * (m) + (n)) / 10)
|
||||||
|
|
||||||
|
/* DCDC1-3 */
|
||||||
|
#define mV_to_regval(mV) v2r((mV) * 10, 6000, 125)
|
||||||
|
#define regval_to_mV(r) r2v(r, 6000, 125)
|
||||||
|
|
||||||
|
/* LDO1-2 */
|
||||||
|
#define mV_to_regval2(mV) v2r((mV) * 10, 9000, 250)
|
||||||
|
#define regval2_to_mV(r) r2v(r, 9000, 250)
|
||||||
|
|
||||||
|
/* LDO3 */
|
||||||
|
#define mV_to_regval3(mV) v2r((mV) * 10, 6000, 250)
|
||||||
|
#define regval3_to_mV(r) r2v(r, 6000, 250)
|
||||||
|
|
||||||
|
/* LDORTC */
|
||||||
|
#define mV_to_regval_rtc(mV) v2r((mV) * 10, 17000, 250)
|
||||||
|
#define regval_rtc_to_mV(r) r2v(r, 17000, 250)
|
||||||
|
|
||||||
|
static struct rn5t567_regs {
|
||||||
|
u8 addr;
|
||||||
|
u8 val;
|
||||||
|
u8 mask;
|
||||||
|
} rn5t567_regs[] = {
|
||||||
|
{ RN5T567_NOETIMSET, NOETIMSET_DIS_OFF_NOE_TIM | 0x5, },
|
||||||
|
{ RN5T567_DC1DAC, VDD_CORE_VAL, },
|
||||||
|
{ RN5T567_DC2DAC, VDD_SOC_VAL, },
|
||||||
|
{ RN5T567_DC3DAC, VDD_DDR_VAL, },
|
||||||
|
{ RN5T567_DC1DAC_SLP, VDD_CORE_VAL_LP, },
|
||||||
|
{ RN5T567_DC2DAC_SLP, VDD_SOC_VAL_LP, },
|
||||||
|
{ RN5T567_DC3DAC_SLP, VDD_DDR_VAL_LP, },
|
||||||
|
{ RN5T567_LDOEN1, 0x01f, ~0x1f, },
|
||||||
|
{ RN5T567_LDOEN2, 0x10, ~0x30, },
|
||||||
|
{ RN5T567_LDODIS, 0x00, },
|
||||||
|
{ RN5T567_LDO3DAC, VDD_HIGH_VAL, },
|
||||||
|
{ RN5T567_LDORTC1DAC, VDD_RTC_VAL, },
|
||||||
|
{ RN5T567_LDORTC1_SLOT, 0x0f, ~0x3f, },
|
||||||
|
};
|
||||||
|
|
||||||
|
static int rn5t567_setup_regs(struct i2c_client *client, struct rn5t567_regs *r,
|
||||||
|
size_t count)
|
||||||
|
{
|
||||||
|
int ret;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for (i = 0; i < count; i++, r++) {
|
||||||
|
#ifdef DEBUG
|
||||||
|
unsigned char value;
|
||||||
|
|
||||||
|
ret = i2c_read_reg(client, r->addr, &value, 1);
|
||||||
|
if ((value & ~r->mask) != r->val) {
|
||||||
|
pr_debug("Changing PMIC reg %02x from %02x to %02x\n",
|
||||||
|
r->addr, value, r->val);
|
||||||
|
}
|
||||||
|
if (ret != 1) {
|
||||||
|
pr_debug("%s: failed to read PMIC register %02x: %d\n",
|
||||||
|
__func__, r->addr, ret);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
ret = i2c_write_reg(client, r->addr, &r->val, 1);
|
||||||
|
if (ret != 1) {
|
||||||
|
pr_err("%s: failed to write PMIC register %02x: %d\n",
|
||||||
|
__func__, r->addr, ret);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int rn5t567_pmic_setup(struct i2c_client *client)
|
||||||
|
{
|
||||||
|
int ret;
|
||||||
|
unsigned char value;
|
||||||
|
|
||||||
|
ret = i2c_read_reg(client, 0x11, &value, 1);
|
||||||
|
if (ret != 1) {
|
||||||
|
pr_err("i2c read error\n");
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = rn5t567_setup_regs(client, rn5t567_regs,
|
||||||
|
ARRAY_SIZE(rn5t567_regs));
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = i2c_read_reg(client, RN5T567_DC1DAC, &value, 1);
|
||||||
|
if (ret == 1) {
|
||||||
|
pr_debug("VDDCORE set to %umV\n", regval_to_mV(value));
|
||||||
|
} else {
|
||||||
|
pr_err("i2c read error\n");
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = i2c_read_reg(client, RN5T567_DC2DAC, &value, 1);
|
||||||
|
if (ret == 1) {
|
||||||
|
pr_debug("VDDSOC set to %umV\n", regval_to_mV(value));
|
||||||
|
} else {
|
||||||
|
pr_err("i2c read error\n");
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
156
arch/arm/boards/karo-tx6x/pmic-rn5t618.c
Normal file
156
arch/arm/boards/karo-tx6x/pmic-rn5t618.c
Normal file
|
@ -0,0 +1,156 @@
|
||||||
|
/*
|
||||||
|
* Copyright (C) 2014 Lothar Waßmann <LW@KARO-electronics.de>
|
||||||
|
*
|
||||||
|
* See file CREDITS for list of people who contributed to this
|
||||||
|
* project.
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or
|
||||||
|
* modify it under the terms of the GNU General Public License
|
||||||
|
* version 2 as published by the Free Software Foundation.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <common.h>
|
||||||
|
#include <i2c/i2c.h>
|
||||||
|
#include "pmic.h"
|
||||||
|
|
||||||
|
#define RN5T618_NOETIMSET 0x11
|
||||||
|
#define RN5T618_LDORTC1_SLOT 0x2a
|
||||||
|
#define RN5T618_DC1CTL 0x2c
|
||||||
|
#define RN5T618_DC1CTL2 0x2d
|
||||||
|
#define RN5T618_DC2CTL 0x2e
|
||||||
|
#define RN5T618_DC2CTL2 0x2f
|
||||||
|
#define RN5T618_DC3CTL 0x30
|
||||||
|
#define RN5T618_DC3CTL2 0x31
|
||||||
|
#define RN5T618_DC1DAC 0x36 /* CORE */
|
||||||
|
#define RN5T618_DC2DAC 0x37 /* SOC */
|
||||||
|
#define RN5T618_DC3DAC 0x38 /* DDR */
|
||||||
|
#define RN5T618_DC1DAC_SLP 0x3b
|
||||||
|
#define RN5T618_DC2DAC_SLP 0x3c
|
||||||
|
#define RN5T618_DC3DAC_SLP 0x3d
|
||||||
|
#define RN5T618_LDOEN1 0x44
|
||||||
|
#define RN5T618_LDODIS 0x46
|
||||||
|
#define RN5T618_LDOEN2 0x48
|
||||||
|
#define RN5T618_LDO3DAC 0x4e /* IO */
|
||||||
|
#define RN5T618_LDORTCDAC 0x56 /* VBACKUP */
|
||||||
|
|
||||||
|
#define VDD_RTC_VAL mV_to_regval_rtc(3000)
|
||||||
|
#define VDD_HIGH_VAL mV_to_regval3(3000)
|
||||||
|
#define VDD_HIGH_VAL_LP mV_to_regval3(3000)
|
||||||
|
#define VDD_CORE_VAL mV_to_regval(1425) /* DCDC1 */
|
||||||
|
#define VDD_CORE_VAL_LP mV_to_regval(900)
|
||||||
|
#define VDD_SOC_VAL mV_to_regval(1425) /* DCDC2 */
|
||||||
|
#define VDD_SOC_VAL_LP mV_to_regval(900)
|
||||||
|
#define VDD_DDR_VAL mV_to_regval(1500) /* DCDC3 */
|
||||||
|
#define VDD_DDR_VAL_LP mV_to_regval(1500)
|
||||||
|
|
||||||
|
/* calculate voltages in 10mV */
|
||||||
|
#define v2r(v,n,m) DIV_ROUND(((((v) < (n)) ? (n) : (v)) - (n)), (m))
|
||||||
|
#define r2v(r,n,m) (((r) * (m) + (n)) / 10)
|
||||||
|
|
||||||
|
/* DCDC1-3 */
|
||||||
|
#define mV_to_regval(mV) v2r((mV) * 10, 6000, 125)
|
||||||
|
#define regval_to_mV(r) r2v(r, 6000, 125)
|
||||||
|
|
||||||
|
/* LDO1-2 */
|
||||||
|
#define mV_to_regval2(mV) v2r((mV) * 10, 9000, 250)
|
||||||
|
#define regval2_to_mV(r) r2v(r, 9000, 250)
|
||||||
|
|
||||||
|
/* LDO3 */
|
||||||
|
#define mV_to_regval3(mV) v2r((mV) * 10, 6000, 250)
|
||||||
|
#define regval3_to_mV(r) r2v(r, 6000, 250)
|
||||||
|
|
||||||
|
/* LDORTC */
|
||||||
|
#define mV_to_regval_rtc(mV) v2r((mV) * 10, 17000, 250)
|
||||||
|
#define regval_rtc_to_mV(r) r2v(r, 17000, 250)
|
||||||
|
|
||||||
|
static struct rn5t618_regs {
|
||||||
|
u8 addr;
|
||||||
|
u8 val;
|
||||||
|
u8 mask;
|
||||||
|
} rn5t618_regs[] = {
|
||||||
|
{ RN5T618_NOETIMSET, 0, },
|
||||||
|
{ RN5T618_DC1DAC, VDD_CORE_VAL, },
|
||||||
|
{ RN5T618_DC2DAC, VDD_SOC_VAL, },
|
||||||
|
{ RN5T618_DC3DAC, VDD_DDR_VAL, },
|
||||||
|
{ RN5T618_DC1DAC_SLP, VDD_CORE_VAL_LP, },
|
||||||
|
{ RN5T618_DC2DAC_SLP, VDD_SOC_VAL_LP, },
|
||||||
|
{ RN5T618_DC3DAC_SLP, VDD_DDR_VAL_LP, },
|
||||||
|
{ RN5T618_LDOEN1, 0x01f, ~0x1f, },
|
||||||
|
{ RN5T618_LDOEN2, 0x10, ~0x30, },
|
||||||
|
{ RN5T618_LDODIS, 0x00, },
|
||||||
|
{ RN5T618_LDO3DAC, VDD_HIGH_VAL, },
|
||||||
|
{ RN5T618_LDORTCDAC, VDD_RTC_VAL, },
|
||||||
|
{ RN5T618_LDORTC1_SLOT, 0x0f, ~0x3f, },
|
||||||
|
};
|
||||||
|
|
||||||
|
static int rn5t618_setup_regs(struct i2c_client *client, struct rn5t618_regs *r,
|
||||||
|
size_t count)
|
||||||
|
{
|
||||||
|
int ret;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for (i = 0; i < count; i++, r++) {
|
||||||
|
#ifdef DEBUG
|
||||||
|
unsigned char value;
|
||||||
|
|
||||||
|
ret = i2c_read_reg(client, r->addr, &value, 1);
|
||||||
|
if ((value & ~r->mask) != r->val) {
|
||||||
|
pr_debug("Changing PMIC reg %02x from %02x to %02x\n",
|
||||||
|
r->addr, value, r->val);
|
||||||
|
}
|
||||||
|
if (ret != 1) {
|
||||||
|
pr_debug("%s: failed to read PMIC register %02x: %d\n",
|
||||||
|
__func__, r->addr, ret);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
ret = i2c_write_reg(client, r->addr, &r->val, 1);
|
||||||
|
if (ret != 1) {
|
||||||
|
pr_err("%s: failed to write PMIC register %02x: %d\n",
|
||||||
|
__func__, r->addr, ret);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
int rn5t618_pmic_setup(struct i2c_client *client)
|
||||||
|
{
|
||||||
|
int ret;
|
||||||
|
unsigned char value;
|
||||||
|
|
||||||
|
ret = i2c_read_reg(client, 0x11, &value, 1);
|
||||||
|
if (ret) {
|
||||||
|
pr_err("i2c read error\n");
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = rn5t618_setup_regs(client, rn5t618_regs,
|
||||||
|
ARRAY_SIZE(rn5t618_regs));
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
ret = i2c_read_reg(client, RN5T618_DC1DAC, &value, 1);
|
||||||
|
if (ret == 1) {
|
||||||
|
pr_debug("VDDCORE set to %umV\n", regval_to_mV(value));
|
||||||
|
} else {
|
||||||
|
pr_err("i2c read error\n");
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
ret = i2c_read_reg(client, RN5T618_DC2DAC, &value, 1);
|
||||||
|
if (ret == 1) {
|
||||||
|
pr_debug("VDDSOC set to %umV\n", regval_to_mV(value));
|
||||||
|
} else {
|
||||||
|
pr_err("i2c read error\n");
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
8
arch/arm/boards/karo-tx6x/pmic.h
Normal file
8
arch/arm/boards/karo-tx6x/pmic.h
Normal file
|
@ -0,0 +1,8 @@
|
||||||
|
|
||||||
|
#include <i2c/i2c.h>
|
||||||
|
|
||||||
|
#define DIV_ROUND(n,d) (((n) + ((d)/2)) / (d))
|
||||||
|
|
||||||
|
int ltc3676_pmic_setup(struct i2c_client *client);
|
||||||
|
int rn5t567_pmic_setup(struct i2c_client *client);
|
||||||
|
int rn5t618_pmic_setup(struct i2c_client *client);
|
Loading…
Reference in a new issue