use U-Boot standard types for variables.
The FEC driver used to typedef it's own variable types. Use standard U-Boot types instead Signed-off-by: Carsten Schlote <schlote@vahanus.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer
parent
50cc8c5412
commit
6020d321e8
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@ -22,10 +22,10 @@
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#define CONFIG_PHY_ADDR 1 /* FIXME */
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typedef struct {
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uint8 data[1500]; /* actual data */
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uint8_t data[1500]; /* actual data */
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int length; /* actual length */
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int used; /* buffer in use or not */
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uint8 head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
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uint8_t head[16]; /* MAC header(6 + 6 + 2) + 2(aligned) */
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} NBUF;
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/*
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@ -37,8 +37,8 @@ static int fec5xxx_miiphy_read(struct miiphy_device *mdev, uint8_t phyAddr,
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struct eth_device *edev = mdev->edev;
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mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)edev->priv;
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uint32 reg; /* convenient holder for the PHY register */
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uint32 phy; /* convenient holder for the PHY */
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uint32_t reg; /* convenient holder for the PHY register */
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uint32_t phy; /* convenient holder for the PHY */
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int timeout = 0xffff;
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/*
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@ -68,7 +68,7 @@ static int fec5xxx_miiphy_read(struct miiphy_device *mdev, uint8_t phyAddr,
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/*
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* it's now safe to read the PHY's register
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*/
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*retVal = (uint16) fec->eth->mii_data;
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*retVal = (uint16_t) fec->eth->mii_data;
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return 0;
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}
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@ -79,8 +79,8 @@ static int fec5xxx_miiphy_write(struct miiphy_device *mdev, uint8_t phyAddr,
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struct eth_device *edev = mdev->edev;
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mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)edev->priv;
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uint32 reg; /* convenient holder for the PHY register */
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uint32 phy; /* convenient holder for the PHY */
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uint32_t reg; /* convenient holder for the PHY register */
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uint32_t phy; /* convenient holder for the PHY */
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int timeout = 0xffff;
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reg = regAddr << FEC_MII_DATA_RA_SHIFT;
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@ -120,7 +120,7 @@ static int mpc5xxx_fec_rbd_init(mpc5xxx_fec_priv *fec)
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printf ("RBD INIT FAILED\n");
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return -1;
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}
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fec->rbdBase[ix].dataPointer = (uint32)data;
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fec->rbdBase[ix].dataPointer = (uint32_t)data;
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}
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fec->rbdBase[ix].status = FEC_RBD_EMPTY;
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fec->rbdBase[ix].dataLength = 0;
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@ -219,10 +219,10 @@ static int mpc5xxx_fec_get_ethaddr(struct eth_device *dev, unsigned char *mac)
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static int mpc5xxx_fec_set_ethaddr(struct eth_device *dev, unsigned char *mac)
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{
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mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
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uint8 currByte; /* byte for which to compute the CRC */
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uint8_t currByte; /* byte for which to compute the CRC */
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int byte; /* loop - counter */
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int bit; /* loop - counter */
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uint32 crc = 0xffffffff; /* initial value */
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uint32_t crc = 0xffffffff; /* initial value */
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/*
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* The algorithm used is the following:
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@ -558,7 +558,7 @@ static int mpc5xxx_fec_send(struct eth_device *dev, void *eth_data,
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*/
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pTbd = &fec->tbdBase[fec->tbdIndex];
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pTbd->dataLength = data_length;
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pTbd->dataPointer = (uint32)eth_data;
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pTbd->dataPointer = (uint32_t)eth_data;
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pTbd->status |= FEC_TBD_LAST | FEC_TBD_TC | FEC_TBD_READY;
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fec->tbdIndex = (fec->tbdIndex + 1) % FEC_TBD_NUM;
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@ -566,7 +566,7 @@ static int mpc5xxx_fec_send(struct eth_device *dev, void *eth_data,
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* Kick the MII i/f
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*/
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if (fec->xcv_type != SEVENWIRE) {
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uint16 phyStatus;
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uint16_t phyStatus;
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fec5xxx_miiphy_read(&fec->miiphy, 0, 0x1, &phyStatus);
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}
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@ -11,192 +11,188 @@
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#ifndef __MPC5XXX_FEC_H
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#define __MPC5XXX_FEC_H
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typedef unsigned long uint32;
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typedef unsigned short uint16;
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typedef unsigned char uint8;
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typedef struct ethernet_register_set {
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/* [10:2]addr = 00 */
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/* Control and status Registers (offset 000-1FF) */
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volatile uint32 fec_id; /* MBAR_ETH + 0x000 */
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volatile uint32 ievent; /* MBAR_ETH + 0x004 */
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volatile uint32 imask; /* MBAR_ETH + 0x008 */
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volatile uint32_t fec_id; /* MBAR_ETH + 0x000 */
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volatile uint32_t ievent; /* MBAR_ETH + 0x004 */
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volatile uint32_t imask; /* MBAR_ETH + 0x008 */
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volatile uint32 RES0[1]; /* MBAR_ETH + 0x00C */
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volatile uint32 r_des_active; /* MBAR_ETH + 0x010 */
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volatile uint32 x_des_active; /* MBAR_ETH + 0x014 */
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volatile uint32 r_des_active_cl; /* MBAR_ETH + 0x018 */
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volatile uint32 x_des_active_cl; /* MBAR_ETH + 0x01C */
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volatile uint32 ivent_set; /* MBAR_ETH + 0x020 */
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volatile uint32 ecntrl; /* MBAR_ETH + 0x024 */
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volatile uint32_t RES0[1]; /* MBAR_ETH + 0x00C */
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volatile uint32_t r_des_active; /* MBAR_ETH + 0x010 */
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volatile uint32_t x_des_active; /* MBAR_ETH + 0x014 */
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volatile uint32_t r_des_active_cl; /* MBAR_ETH + 0x018 */
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volatile uint32_t x_des_active_cl; /* MBAR_ETH + 0x01C */
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volatile uint32_t ivent_set; /* MBAR_ETH + 0x020 */
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volatile uint32_t ecntrl; /* MBAR_ETH + 0x024 */
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volatile uint32 RES1[6]; /* MBAR_ETH + 0x028-03C */
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volatile uint32 mii_data; /* MBAR_ETH + 0x040 */
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volatile uint32 mii_speed; /* MBAR_ETH + 0x044 */
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volatile uint32 mii_status; /* MBAR_ETH + 0x048 */
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volatile uint32_t RES1[6]; /* MBAR_ETH + 0x028-03C */
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volatile uint32_t mii_data; /* MBAR_ETH + 0x040 */
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volatile uint32_t mii_speed; /* MBAR_ETH + 0x044 */
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volatile uint32_t mii_status; /* MBAR_ETH + 0x048 */
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volatile uint32 RES2[5]; /* MBAR_ETH + 0x04C-05C */
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volatile uint32 mib_data; /* MBAR_ETH + 0x060 */
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volatile uint32 mib_control; /* MBAR_ETH + 0x064 */
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volatile uint32_t RES2[5]; /* MBAR_ETH + 0x04C-05C */
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volatile uint32_t mib_data; /* MBAR_ETH + 0x060 */
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volatile uint32_t mib_control; /* MBAR_ETH + 0x064 */
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volatile uint32 RES3[6]; /* MBAR_ETH + 0x068-7C */
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volatile uint32 r_activate; /* MBAR_ETH + 0x080 */
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volatile uint32 r_cntrl; /* MBAR_ETH + 0x084 */
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volatile uint32 r_hash; /* MBAR_ETH + 0x088 */
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volatile uint32 r_data; /* MBAR_ETH + 0x08C */
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volatile uint32 ar_done; /* MBAR_ETH + 0x090 */
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volatile uint32 r_test; /* MBAR_ETH + 0x094 */
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volatile uint32 r_mib; /* MBAR_ETH + 0x098 */
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volatile uint32 r_da_low; /* MBAR_ETH + 0x09C */
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volatile uint32 r_da_high; /* MBAR_ETH + 0x0A0 */
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volatile uint32_t RES3[6]; /* MBAR_ETH + 0x068-7C */
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volatile uint32_t r_activate; /* MBAR_ETH + 0x080 */
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volatile uint32_t r_cntrl; /* MBAR_ETH + 0x084 */
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volatile uint32_t r_hash; /* MBAR_ETH + 0x088 */
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volatile uint32_t r_data; /* MBAR_ETH + 0x08C */
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volatile uint32_t ar_done; /* MBAR_ETH + 0x090 */
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volatile uint32_t r_test; /* MBAR_ETH + 0x094 */
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volatile uint32_t r_mib; /* MBAR_ETH + 0x098 */
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volatile uint32_t r_da_low; /* MBAR_ETH + 0x09C */
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volatile uint32_t r_da_high; /* MBAR_ETH + 0x0A0 */
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volatile uint32 RES4[7]; /* MBAR_ETH + 0x0A4-0BC */
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volatile uint32 x_activate; /* MBAR_ETH + 0x0C0 */
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volatile uint32 x_cntrl; /* MBAR_ETH + 0x0C4 */
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volatile uint32 backoff; /* MBAR_ETH + 0x0C8 */
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volatile uint32 x_data; /* MBAR_ETH + 0x0CC */
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volatile uint32 x_status; /* MBAR_ETH + 0x0D0 */
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volatile uint32 x_mib; /* MBAR_ETH + 0x0D4 */
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volatile uint32 x_test; /* MBAR_ETH + 0x0D8 */
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volatile uint32 fdxfc_da1; /* MBAR_ETH + 0x0DC */
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volatile uint32 fdxfc_da2; /* MBAR_ETH + 0x0E0 */
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volatile uint32 paddr1; /* MBAR_ETH + 0x0E4 */
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volatile uint32 paddr2; /* MBAR_ETH + 0x0E8 */
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volatile uint32 op_pause; /* MBAR_ETH + 0x0EC */
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volatile uint32_t RES4[7]; /* MBAR_ETH + 0x0A4-0BC */
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volatile uint32_t x_activate; /* MBAR_ETH + 0x0C0 */
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volatile uint32_t x_cntrl; /* MBAR_ETH + 0x0C4 */
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volatile uint32_t backoff; /* MBAR_ETH + 0x0C8 */
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volatile uint32_t x_data; /* MBAR_ETH + 0x0CC */
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volatile uint32_t x_status; /* MBAR_ETH + 0x0D0 */
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volatile uint32_t x_mib; /* MBAR_ETH + 0x0D4 */
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volatile uint32_t x_test; /* MBAR_ETH + 0x0D8 */
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volatile uint32_t fdxfc_da1; /* MBAR_ETH + 0x0DC */
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volatile uint32_t fdxfc_da2; /* MBAR_ETH + 0x0E0 */
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volatile uint32_t paddr1; /* MBAR_ETH + 0x0E4 */
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volatile uint32_t paddr2; /* MBAR_ETH + 0x0E8 */
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volatile uint32_t op_pause; /* MBAR_ETH + 0x0EC */
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volatile uint32 RES5[4]; /* MBAR_ETH + 0x0F0-0FC */
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volatile uint32 instr_reg; /* MBAR_ETH + 0x100 */
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volatile uint32 context_reg; /* MBAR_ETH + 0x104 */
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volatile uint32 test_cntrl; /* MBAR_ETH + 0x108 */
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volatile uint32 acc_reg; /* MBAR_ETH + 0x10C */
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volatile uint32 ones; /* MBAR_ETH + 0x110 */
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volatile uint32 zeros; /* MBAR_ETH + 0x114 */
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volatile uint32 iaddr1; /* MBAR_ETH + 0x118 */
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volatile uint32 iaddr2; /* MBAR_ETH + 0x11C */
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volatile uint32 gaddr1; /* MBAR_ETH + 0x120 */
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volatile uint32 gaddr2; /* MBAR_ETH + 0x124 */
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volatile uint32 random; /* MBAR_ETH + 0x128 */
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volatile uint32 rand1; /* MBAR_ETH + 0x12C */
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volatile uint32 tmp; /* MBAR_ETH + 0x130 */
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volatile uint32_t RES5[4]; /* MBAR_ETH + 0x0F0-0FC */
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volatile uint32_t instr_reg; /* MBAR_ETH + 0x100 */
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volatile uint32_t context_reg; /* MBAR_ETH + 0x104 */
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volatile uint32_t test_cntrl; /* MBAR_ETH + 0x108 */
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volatile uint32_t acc_reg; /* MBAR_ETH + 0x10C */
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volatile uint32_t ones; /* MBAR_ETH + 0x110 */
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volatile uint32_t zeros; /* MBAR_ETH + 0x114 */
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volatile uint32_t iaddr1; /* MBAR_ETH + 0x118 */
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volatile uint32_t iaddr2; /* MBAR_ETH + 0x11C */
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volatile uint32_t gaddr1; /* MBAR_ETH + 0x120 */
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volatile uint32_t gaddr2; /* MBAR_ETH + 0x124 */
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volatile uint32_t random; /* MBAR_ETH + 0x128 */
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volatile uint32_t rand1; /* MBAR_ETH + 0x12C */
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volatile uint32_t tmp; /* MBAR_ETH + 0x130 */
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volatile uint32 RES6[3]; /* MBAR_ETH + 0x134-13C */
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volatile uint32 fifo_id; /* MBAR_ETH + 0x140 */
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volatile uint32 x_wmrk; /* MBAR_ETH + 0x144 */
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volatile uint32 fcntrl; /* MBAR_ETH + 0x148 */
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volatile uint32 r_bound; /* MBAR_ETH + 0x14C */
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volatile uint32 r_fstart; /* MBAR_ETH + 0x150 */
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volatile uint32 r_count; /* MBAR_ETH + 0x154 */
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volatile uint32 r_lag; /* MBAR_ETH + 0x158 */
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volatile uint32 r_read; /* MBAR_ETH + 0x15C */
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volatile uint32 r_write; /* MBAR_ETH + 0x160 */
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volatile uint32 x_count; /* MBAR_ETH + 0x164 */
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volatile uint32 x_lag; /* MBAR_ETH + 0x168 */
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volatile uint32 x_retry; /* MBAR_ETH + 0x16C */
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volatile uint32 x_write; /* MBAR_ETH + 0x170 */
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volatile uint32 x_read; /* MBAR_ETH + 0x174 */
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volatile uint32_t RES6[3]; /* MBAR_ETH + 0x134-13C */
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volatile uint32_t fifo_id; /* MBAR_ETH + 0x140 */
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volatile uint32_t x_wmrk; /* MBAR_ETH + 0x144 */
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volatile uint32_t fcntrl; /* MBAR_ETH + 0x148 */
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volatile uint32_t r_bound; /* MBAR_ETH + 0x14C */
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volatile uint32_t r_fstart; /* MBAR_ETH + 0x150 */
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volatile uint32_t r_count; /* MBAR_ETH + 0x154 */
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volatile uint32_t r_lag; /* MBAR_ETH + 0x158 */
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volatile uint32_t r_read; /* MBAR_ETH + 0x15C */
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volatile uint32_t r_write; /* MBAR_ETH + 0x160 */
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volatile uint32_t x_count; /* MBAR_ETH + 0x164 */
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volatile uint32_t x_lag; /* MBAR_ETH + 0x168 */
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volatile uint32_t x_retry; /* MBAR_ETH + 0x16C */
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volatile uint32_t x_write; /* MBAR_ETH + 0x170 */
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volatile uint32_t x_read; /* MBAR_ETH + 0x174 */
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volatile uint32 RES7[2]; /* MBAR_ETH + 0x178-17C */
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volatile uint32 fm_cntrl; /* MBAR_ETH + 0x180 */
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volatile uint32 rfifo_data; /* MBAR_ETH + 0x184 */
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volatile uint32 rfifo_status; /* MBAR_ETH + 0x188 */
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volatile uint32 rfifo_cntrl; /* MBAR_ETH + 0x18C */
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volatile uint32 rfifo_lrf_ptr; /* MBAR_ETH + 0x190 */
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volatile uint32 rfifo_lwf_ptr; /* MBAR_ETH + 0x194 */
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volatile uint32 rfifo_alarm; /* MBAR_ETH + 0x198 */
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volatile uint32 rfifo_rdptr; /* MBAR_ETH + 0x19C */
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volatile uint32 rfifo_wrptr; /* MBAR_ETH + 0x1A0 */
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volatile uint32 tfifo_data; /* MBAR_ETH + 0x1A4 */
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volatile uint32 tfifo_status; /* MBAR_ETH + 0x1A8 */
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volatile uint32 tfifo_cntrl; /* MBAR_ETH + 0x1AC */
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volatile uint32 tfifo_lrf_ptr; /* MBAR_ETH + 0x1B0 */
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volatile uint32 tfifo_lwf_ptr; /* MBAR_ETH + 0x1B4 */
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volatile uint32 tfifo_alarm; /* MBAR_ETH + 0x1B8 */
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volatile uint32 tfifo_rdptr; /* MBAR_ETH + 0x1BC */
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volatile uint32 tfifo_wrptr; /* MBAR_ETH + 0x1C0 */
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volatile uint32_t RES7[2]; /* MBAR_ETH + 0x178-17C */
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volatile uint32_t fm_cntrl; /* MBAR_ETH + 0x180 */
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volatile uint32_t rfifo_data; /* MBAR_ETH + 0x184 */
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volatile uint32_t rfifo_status; /* MBAR_ETH + 0x188 */
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volatile uint32_t rfifo_cntrl; /* MBAR_ETH + 0x18C */
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volatile uint32_t rfifo_lrf_ptr; /* MBAR_ETH + 0x190 */
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volatile uint32_t rfifo_lwf_ptr; /* MBAR_ETH + 0x194 */
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volatile uint32_t rfifo_alarm; /* MBAR_ETH + 0x198 */
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volatile uint32_t rfifo_rdptr; /* MBAR_ETH + 0x19C */
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volatile uint32_t rfifo_wrptr; /* MBAR_ETH + 0x1A0 */
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volatile uint32_t tfifo_data; /* MBAR_ETH + 0x1A4 */
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volatile uint32_t tfifo_status; /* MBAR_ETH + 0x1A8 */
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volatile uint32_t tfifo_cntrl; /* MBAR_ETH + 0x1AC */
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volatile uint32_t tfifo_lrf_ptr; /* MBAR_ETH + 0x1B0 */
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volatile uint32_t tfifo_lwf_ptr; /* MBAR_ETH + 0x1B4 */
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volatile uint32_t tfifo_alarm; /* MBAR_ETH + 0x1B8 */
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volatile uint32_t tfifo_rdptr; /* MBAR_ETH + 0x1BC */
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volatile uint32_t tfifo_wrptr; /* MBAR_ETH + 0x1C0 */
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volatile uint32 reset_cntrl; /* MBAR_ETH + 0x1C4 */
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volatile uint32 xmit_fsm; /* MBAR_ETH + 0x1C8 */
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volatile uint32_t reset_cntrl; /* MBAR_ETH + 0x1C4 */
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volatile uint32_t xmit_fsm; /* MBAR_ETH + 0x1C8 */
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volatile uint32 RES8[3]; /* MBAR_ETH + 0x1CC-1D4 */
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volatile uint32 rdes_data0; /* MBAR_ETH + 0x1D8 */
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volatile uint32 rdes_data1; /* MBAR_ETH + 0x1DC */
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volatile uint32 r_length; /* MBAR_ETH + 0x1E0 */
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volatile uint32 x_length; /* MBAR_ETH + 0x1E4 */
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volatile uint32 x_addr; /* MBAR_ETH + 0x1E8 */
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volatile uint32 cdes_data; /* MBAR_ETH + 0x1EC */
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volatile uint32 status; /* MBAR_ETH + 0x1F0 */
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volatile uint32 dma_control; /* MBAR_ETH + 0x1F4 */
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volatile uint32 des_cmnd; /* MBAR_ETH + 0x1F8 */
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volatile uint32 data; /* MBAR_ETH + 0x1FC */
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volatile uint32_t RES8[3]; /* MBAR_ETH + 0x1CC-1D4 */
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volatile uint32_t rdes_data0; /* MBAR_ETH + 0x1D8 */
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volatile uint32_t rdes_data1; /* MBAR_ETH + 0x1DC */
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volatile uint32_t r_length; /* MBAR_ETH + 0x1E0 */
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volatile uint32_t x_length; /* MBAR_ETH + 0x1E4 */
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volatile uint32_t x_addr; /* MBAR_ETH + 0x1E8 */
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volatile uint32_t cdes_data; /* MBAR_ETH + 0x1EC */
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volatile uint32_t status; /* MBAR_ETH + 0x1F0 */
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volatile uint32_t dma_control; /* MBAR_ETH + 0x1F4 */
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volatile uint32_t des_cmnd; /* MBAR_ETH + 0x1F8 */
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volatile uint32_t data; /* MBAR_ETH + 0x1FC */
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/* MIB COUNTERS (Offset 200-2FF) */
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volatile uint32 rmon_t_drop; /* MBAR_ETH + 0x200 */
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volatile uint32 rmon_t_packets; /* MBAR_ETH + 0x204 */
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volatile uint32 rmon_t_bc_pkt; /* MBAR_ETH + 0x208 */
|
||||
volatile uint32 rmon_t_mc_pkt; /* MBAR_ETH + 0x20C */
|
||||
volatile uint32 rmon_t_crc_align; /* MBAR_ETH + 0x210 */
|
||||
volatile uint32 rmon_t_undersize; /* MBAR_ETH + 0x214 */
|
||||
volatile uint32 rmon_t_oversize; /* MBAR_ETH + 0x218 */
|
||||
volatile uint32 rmon_t_frag; /* MBAR_ETH + 0x21C */
|
||||
volatile uint32 rmon_t_jab; /* MBAR_ETH + 0x220 */
|
||||
volatile uint32 rmon_t_col; /* MBAR_ETH + 0x224 */
|
||||
volatile uint32 rmon_t_p64; /* MBAR_ETH + 0x228 */
|
||||
volatile uint32 rmon_t_p65to127; /* MBAR_ETH + 0x22C */
|
||||
volatile uint32 rmon_t_p128to255; /* MBAR_ETH + 0x230 */
|
||||
volatile uint32 rmon_t_p256to511; /* MBAR_ETH + 0x234 */
|
||||
volatile uint32 rmon_t_p512to1023; /* MBAR_ETH + 0x238 */
|
||||
volatile uint32 rmon_t_p1024to2047; /* MBAR_ETH + 0x23C */
|
||||
volatile uint32 rmon_t_p_gte2048; /* MBAR_ETH + 0x240 */
|
||||
volatile uint32 rmon_t_octets; /* MBAR_ETH + 0x244 */
|
||||
volatile uint32 ieee_t_drop; /* MBAR_ETH + 0x248 */
|
||||
volatile uint32 ieee_t_frame_ok; /* MBAR_ETH + 0x24C */
|
||||
volatile uint32 ieee_t_1col; /* MBAR_ETH + 0x250 */
|
||||
volatile uint32 ieee_t_mcol; /* MBAR_ETH + 0x254 */
|
||||
volatile uint32 ieee_t_def; /* MBAR_ETH + 0x258 */
|
||||
volatile uint32 ieee_t_lcol; /* MBAR_ETH + 0x25C */
|
||||
volatile uint32 ieee_t_excol; /* MBAR_ETH + 0x260 */
|
||||
volatile uint32 ieee_t_macerr; /* MBAR_ETH + 0x264 */
|
||||
volatile uint32 ieee_t_cserr; /* MBAR_ETH + 0x268 */
|
||||
volatile uint32 ieee_t_sqe; /* MBAR_ETH + 0x26C */
|
||||
volatile uint32 t_fdxfc; /* MBAR_ETH + 0x270 */
|
||||
volatile uint32 ieee_t_octets_ok; /* MBAR_ETH + 0x274 */
|
||||
volatile uint32_t rmon_t_drop; /* MBAR_ETH + 0x200 */
|
||||
volatile uint32_t rmon_t_packets; /* MBAR_ETH + 0x204 */
|
||||
volatile uint32_t rmon_t_bc_pkt; /* MBAR_ETH + 0x208 */
|
||||
volatile uint32_t rmon_t_mc_pkt; /* MBAR_ETH + 0x20C */
|
||||
volatile uint32_t rmon_t_crc_align; /* MBAR_ETH + 0x210 */
|
||||
volatile uint32_t rmon_t_undersize; /* MBAR_ETH + 0x214 */
|
||||
volatile uint32_t rmon_t_oversize; /* MBAR_ETH + 0x218 */
|
||||
volatile uint32_t rmon_t_frag; /* MBAR_ETH + 0x21C */
|
||||
volatile uint32_t rmon_t_jab; /* MBAR_ETH + 0x220 */
|
||||
volatile uint32_t rmon_t_col; /* MBAR_ETH + 0x224 */
|
||||
volatile uint32_t rmon_t_p64; /* MBAR_ETH + 0x228 */
|
||||
volatile uint32_t rmon_t_p65to127; /* MBAR_ETH + 0x22C */
|
||||
volatile uint32_t rmon_t_p128to255; /* MBAR_ETH + 0x230 */
|
||||
volatile uint32_t rmon_t_p256to511; /* MBAR_ETH + 0x234 */
|
||||
volatile uint32_t rmon_t_p512to1023; /* MBAR_ETH + 0x238 */
|
||||
volatile uint32_t rmon_t_p1024to2047; /* MBAR_ETH + 0x23C */
|
||||
volatile uint32_t rmon_t_p_gte2048; /* MBAR_ETH + 0x240 */
|
||||
volatile uint32_t rmon_t_octets; /* MBAR_ETH + 0x244 */
|
||||
volatile uint32_t ieee_t_drop; /* MBAR_ETH + 0x248 */
|
||||
volatile uint32_t ieee_t_frame_ok; /* MBAR_ETH + 0x24C */
|
||||
volatile uint32_t ieee_t_1col; /* MBAR_ETH + 0x250 */
|
||||
volatile uint32_t ieee_t_mcol; /* MBAR_ETH + 0x254 */
|
||||
volatile uint32_t ieee_t_def; /* MBAR_ETH + 0x258 */
|
||||
volatile uint32_t ieee_t_lcol; /* MBAR_ETH + 0x25C */
|
||||
volatile uint32_t ieee_t_excol; /* MBAR_ETH + 0x260 */
|
||||
volatile uint32_t ieee_t_macerr; /* MBAR_ETH + 0x264 */
|
||||
volatile uint32_t ieee_t_cserr; /* MBAR_ETH + 0x268 */
|
||||
volatile uint32_t ieee_t_sqe; /* MBAR_ETH + 0x26C */
|
||||
volatile uint32_t t_fdxfc; /* MBAR_ETH + 0x270 */
|
||||
volatile uint32_t ieee_t_octets_ok; /* MBAR_ETH + 0x274 */
|
||||
|
||||
volatile uint32 RES9[2]; /* MBAR_ETH + 0x278-27C */
|
||||
volatile uint32 rmon_r_drop; /* MBAR_ETH + 0x280 */
|
||||
volatile uint32 rmon_r_packets; /* MBAR_ETH + 0x284 */
|
||||
volatile uint32 rmon_r_bc_pkt; /* MBAR_ETH + 0x288 */
|
||||
volatile uint32 rmon_r_mc_pkt; /* MBAR_ETH + 0x28C */
|
||||
volatile uint32 rmon_r_crc_align; /* MBAR_ETH + 0x290 */
|
||||
volatile uint32 rmon_r_undersize; /* MBAR_ETH + 0x294 */
|
||||
volatile uint32 rmon_r_oversize; /* MBAR_ETH + 0x298 */
|
||||
volatile uint32 rmon_r_frag; /* MBAR_ETH + 0x29C */
|
||||
volatile uint32 rmon_r_jab; /* MBAR_ETH + 0x2A0 */
|
||||
volatile uint32_t RES9[2]; /* MBAR_ETH + 0x278-27C */
|
||||
volatile uint32_t rmon_r_drop; /* MBAR_ETH + 0x280 */
|
||||
volatile uint32_t rmon_r_packets; /* MBAR_ETH + 0x284 */
|
||||
volatile uint32_t rmon_r_bc_pkt; /* MBAR_ETH + 0x288 */
|
||||
volatile uint32_t rmon_r_mc_pkt; /* MBAR_ETH + 0x28C */
|
||||
volatile uint32_t rmon_r_crc_align; /* MBAR_ETH + 0x290 */
|
||||
volatile uint32_t rmon_r_undersize; /* MBAR_ETH + 0x294 */
|
||||
volatile uint32_t rmon_r_oversize; /* MBAR_ETH + 0x298 */
|
||||
volatile uint32_t rmon_r_frag; /* MBAR_ETH + 0x29C */
|
||||
volatile uint32_t rmon_r_jab; /* MBAR_ETH + 0x2A0 */
|
||||
|
||||
volatile uint32 rmon_r_resvd_0; /* MBAR_ETH + 0x2A4 */
|
||||
volatile uint32_t rmon_r_resvd_0; /* MBAR_ETH + 0x2A4 */
|
||||
|
||||
volatile uint32 rmon_r_p64; /* MBAR_ETH + 0x2A8 */
|
||||
volatile uint32 rmon_r_p65to127; /* MBAR_ETH + 0x2AC */
|
||||
volatile uint32 rmon_r_p128to255; /* MBAR_ETH + 0x2B0 */
|
||||
volatile uint32 rmon_r_p256to511; /* MBAR_ETH + 0x2B4 */
|
||||
volatile uint32 rmon_r_p512to1023; /* MBAR_ETH + 0x2B8 */
|
||||
volatile uint32 rmon_r_p1024to2047; /* MBAR_ETH + 0x2BC */
|
||||
volatile uint32 rmon_r_p_gte2048; /* MBAR_ETH + 0x2C0 */
|
||||
volatile uint32 rmon_r_octets; /* MBAR_ETH + 0x2C4 */
|
||||
volatile uint32 ieee_r_drop; /* MBAR_ETH + 0x2C8 */
|
||||
volatile uint32 ieee_r_frame_ok; /* MBAR_ETH + 0x2CC */
|
||||
volatile uint32 ieee_r_crc; /* MBAR_ETH + 0x2D0 */
|
||||
volatile uint32 ieee_r_align; /* MBAR_ETH + 0x2D4 */
|
||||
volatile uint32 r_macerr; /* MBAR_ETH + 0x2D8 */
|
||||
volatile uint32 r_fdxfc; /* MBAR_ETH + 0x2DC */
|
||||
volatile uint32 ieee_r_octets_ok; /* MBAR_ETH + 0x2E0 */
|
||||
volatile uint32_t rmon_r_p64; /* MBAR_ETH + 0x2A8 */
|
||||
volatile uint32_t rmon_r_p65to127; /* MBAR_ETH + 0x2AC */
|
||||
volatile uint32_t rmon_r_p128to255; /* MBAR_ETH + 0x2B0 */
|
||||
volatile uint32_t rmon_r_p256to511; /* MBAR_ETH + 0x2B4 */
|
||||
volatile uint32_t rmon_r_p512to1023; /* MBAR_ETH + 0x2B8 */
|
||||
volatile uint32_t rmon_r_p1024to2047; /* MBAR_ETH + 0x2BC */
|
||||
volatile uint32_t rmon_r_p_gte2048; /* MBAR_ETH + 0x2C0 */
|
||||
volatile uint32_t rmon_r_octets; /* MBAR_ETH + 0x2C4 */
|
||||
volatile uint32_t ieee_r_drop; /* MBAR_ETH + 0x2C8 */
|
||||
volatile uint32_t ieee_r_frame_ok; /* MBAR_ETH + 0x2CC */
|
||||
volatile uint32_t ieee_r_crc; /* MBAR_ETH + 0x2D0 */
|
||||
volatile uint32_t ieee_r_align; /* MBAR_ETH + 0x2D4 */
|
||||
volatile uint32_t r_macerr; /* MBAR_ETH + 0x2D8 */
|
||||
volatile uint32_t r_fdxfc; /* MBAR_ETH + 0x2DC */
|
||||
volatile uint32_t ieee_r_octets_ok; /* MBAR_ETH + 0x2E0 */
|
||||
|
||||
volatile uint32 RES10[6]; /* MBAR_ETH + 0x2E4-2FC */
|
||||
volatile uint32_t RES10[6]; /* MBAR_ETH + 0x2E4-2FC */
|
||||
|
||||
volatile uint32 RES11[64]; /* MBAR_ETH + 0x300-3FF */
|
||||
volatile uint32_t RES11[64]; /* MBAR_ETH + 0x300-3FF */
|
||||
} ethernet_regs;
|
||||
|
||||
#define FEC_IEVENT_HBERR 0x80000000
|
||||
|
|
@ -241,15 +237,15 @@ typedef struct ethernet_register_set {
|
|||
|
||||
/* Receive & Transmit Buffer Descriptor definitions */
|
||||
typedef struct BufferDescriptor {
|
||||
uint16 status;
|
||||
uint16 dataLength;
|
||||
uint32 dataPointer;
|
||||
uint16_t status;
|
||||
uint16_t dataLength;
|
||||
uint32_t dataPointer;
|
||||
} FEC_RBD;
|
||||
|
||||
typedef struct {
|
||||
uint16 status;
|
||||
uint16 dataLength;
|
||||
uint32 dataPointer;
|
||||
uint16_t status;
|
||||
uint16_t dataLength;
|
||||
uint32_t dataPointer;
|
||||
} FEC_TBD;
|
||||
|
||||
/* private structure */
|
||||
|
|
@ -259,10 +255,10 @@ typedef struct {
|
|||
xceiver_type xcv_type; /* transceiver type */
|
||||
FEC_RBD *rbdBase; /* RBD ring */
|
||||
FEC_TBD *tbdBase; /* TBD ring */
|
||||
uint16 rbdIndex; /* next receive BD to read */
|
||||
uint16 tbdIndex; /* next transmit BD to send */
|
||||
uint16 usedTbdIndex; /* next transmit BD to clean */
|
||||
uint16 cleanTbdNum; /* the number of available transmit BDs */
|
||||
uint16_t rbdIndex; /* next receive BD to read */
|
||||
uint16_t tbdIndex; /* next transmit BD to send */
|
||||
uint16_t usedTbdIndex; /* next transmit BD to clean */
|
||||
uint16_t cleanTbdNum; /* the number of available transmit BDs */
|
||||
|
||||
struct miiphy_device miiphy;
|
||||
} mpc5xxx_fec_priv;
|
||||
|
|
|
|||
Loading…
Reference in New Issue