Merge branch 'for-next/arm-remove-arch-init-ll'

Conflicts:
	arch/arm/include/asm/barebox-arm.h

arch/arm/cpu/start-reset.c

@@ -43,10 +43,6 @@ void __naked __bare_init reset(void)
 	r |= 0xd3;
 	__asm__ __volatile__("msr cpsr, %0" : : "r"(r));
 
-#ifdef CONFIG_ARCH_HAS_LOWLEVEL_INIT
-	arch_init_lowlevel();
-#endif
-
 	/* disable MMU stuff and caches */
 	r = get_cr();
 	r &= ~(CR_M | CR_C | CR_B | CR_S | CR_R | CR_V);

arch/arm/include/asm/barebox-arm.h

@@ -36,7 +36,6 @@ extern char __exceptions_start[], __exceptions_stop[];
 
 void board_init_lowlevel(void);
 void board_init_lowlevel_return(void);
-void arch_init_lowlevel(void);
 uint32_t get_runtime_offset(void);
 
 #endif	/* _BAREBOX_ARM_H_ */

arch/arm/mach-omap/Kconfig

@@ -33,7 +33,6 @@ config ARCH_OMAP3
 	select CPU_V7
 	select GENERIC_GPIO
 	select OMAP3_LOWLEVEL_INIT
-	select ARCH_HAS_LOWLEVEL_INIT
 	select OMAP_CLOCK_SOURCE_S32K
 	help
 	  Say Y here if you are using Texas Instrument's OMAP343x based platform

arch/arm/mach-omap/include/mach/omap3-silicon.h

@@ -106,8 +106,6 @@
 #define OMAP_SRAM_BASE		0x40200000
 #define OMAP_SRAM_INTVECT	0x4020F800
 #define OMAP_SRAM_INTVECT_COPYSIZE	0x64
-/** Temporary stack for us to use C calls in low_level_init */
-#define OMAP_SRAM_STACK		0x4020FFFC
 
 /** Gives the silicon revision */
 #define OMAP_TAP_BASE		(OMAP_L4_WKUP_BASE + 0xA000)

arch/arm/mach-omap/include/mach/omap4-silicon.h

@@ -143,8 +143,6 @@ struct s32ktimer {
 #define NON_SECURE_SRAM_END	0x4030E000	/* Not inclusive */
 /* base address for indirect vectors (internal boot mode) */
 #define SRAM_ROM_VECT_BASE	0x4030D000
-/* Temporary SRAM stack used while low level init is done */
-#define LOW_LEVEL_SRAM_STACK	NON_SECURE_SRAM_END
 
 /*
  * OMAP4 real hardware:

arch/arm/mach-omap/omap3_core.S

@@ -12,7 +12,6 @@
  * functions.
  * @li Call architecture initialization function a_init
  *
- * arch_init_lowlevel is enabled if CONFIG_ARCH_HAS_LOWLEVEL_INIT is defined
  */
 /*
  * (C) Copyright 2006-2008
@@ -38,8 +37,7 @@
 #include <mach/wdt.h>
 #include <mach/clocks.h>
 
-#ifdef CONFIG_ARCH_HAS_LOWLEVEL_INIT
-ENTRY(arch_init_lowlevel)
+ENTRY(board_init_lowlevel)
 	/* Invalidate all Dcaches */
 #ifndef CONFIG_CPU_V7_DCACHE_SKIP
 	/* If Arch specific ROM code SMI handling does not exist */
@@ -89,8 +87,4 @@ finished_inval:
 #endif /* CONFIG_CPU_V7_DCACHE_SKIP */
 	/* back to arch calling code */
 	mov	pc,	lr
-ENDPROC(arch_init_lowlevel)
-
-SRAM_STACK:
-	.word	OMAP_SRAM_STACK
-#endif /* CONFIG_ARCH_HAS_LOWLEVEL_INIT */
+ENDPROC(board_init_lowlevel)

common/Kconfig

@@ -296,9 +296,6 @@ config MACH_DO_LOWLEVEL_INIT
 	  on many platforms. Disabling this option allows configurations to use
 	  barebox as a second stage boot loader.
 
-config ARCH_HAS_LOWLEVEL_INIT
-	bool
-
 config PROMPT
 	string
 	prompt "barebox command prompt"