MIPS: ath79: add pbl_ar9331_uart_enable macro
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -37,6 +37,17 @@
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.set pop
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.endm
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.macro pbl_reg_set val addr
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.set push
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.set noreorder
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li t9, \addr
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li t8, \val
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lw t7, 0(t9)
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or t7, t8
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sw t7, 0(t9)
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.set pop
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.endm
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.macro pbl_reg_clr clr addr
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.set push
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.set noreorder
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@ -67,6 +67,9 @@
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#define AR71XX_GPIO_REG_INT_PENDING 0x20
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#define AR71XX_GPIO_REG_INT_ENABLE 0x24
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#define AR71XX_GPIO_REG_FUNC 0x28
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/* Warning! GPIO_FUNC[15] must be written with 1 */
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#define AR933X_GPIO_FUNC_RSRV15 BIT(15)
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#define AR933X_GPIO_FUNC_UART_EN BIT(1)
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/*
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* PLL block
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@ -129,4 +129,11 @@
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.set pop
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.endm
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#define GPIO_FUNC ((KSEG1 | AR71XX_GPIO_BASE) | AR71XX_GPIO_REG_FUNC)
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.macro pbl_ar9331_uart_enable
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pbl_reg_set AR933X_GPIO_FUNC_UART_EN \
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| AR933X_GPIO_FUNC_RSRV15, GPIO_FUNC
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.endm
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#endif /* __ASM_MACH_ATH79_PBL_MACROS_H */
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