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sysmobts: Apply cargo cult and apply workaround 

It is not perfectly clear that these apply to our DM6442, it is not
clear we need them but right now I would like to reduce the delta
from U-Boot to Barebox in terms of system initialization.

So apply some form of cargo cult and do the same as U-boot. This has
not been tested on a board and needs to be done. Then it can be put
back into our "master" branch. But it looks writel takes the value
first and then the address.
This commit is contained in:
Holger Hans Peter Freyther 2016-06-28 09:30:34 +02:00
parent 5c5b53555b
commit 68cc53455b
1 changed files with 32 additions and 0 deletions
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32
arch/arm/boards/sysmobts/board.c
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@ -182,6 +182,36 @@ static int sysmobts_coredevices_init(void)
coredevice_initcall(sysmobts_coredevices_init);
/*
* taken from u-boot as cargo cult. It is best to match
* the current behavior instead of trying to be smart and
* see if this applies here or not.
*/
#define PSC_SILVER_BULLET (0x01c41a20)
#define VBPR (0x20000020)
static void davinci_errata_workarounds(void)
{
/*
* Workaround for TMS320DM6446 errata 1.3.22:
* PSC: PTSTAT Register Does Not Clear After Warm/Maximum Reset
* Revision(s) Affected: 1.3 and earlier
*/
writel(0, PSC_SILVER_BULLET);
/*
* Set the PR_OLD_COUNT bits in the Bus Burst Priority Register (PBBPR)
* as suggested in TMS320DM6446 errata 2.1.2:
*
* On DM6446 Silicon Revision 2.1 and earlier, under certain conditions
* low priority modules can occupy the bus and prevent high priority
* modules like the VPSS from getting the required DDR2 throughput.
* A hex value of 0x20 should provide a good ARM (cache enabled)
* performance and still allow good utilization by the VPSS or other
* modules.
*/
writel(0x20, VBPR);
}
#define DAVINCI_PLLM (0x01C40910) /* PLL 1 Multiplier */
#define DAVINCI_AWCCR (0x01E00004) /* EMIF-A async wait cycle config register. */
#define DAVINCI_AWCCR_VAL (0x000000FF) /* EMIF-A async wait cycle config register value. */
@ -208,6 +238,8 @@ static int sysmobts_devices_init(void)
writel(DAVINCI_A2CR_VAL8, DAVINCI_A2CR);
}
davinci_errata_workarounds();
sysmobts_set_ethaddr();
platform_device_register(&dm644x_emac_device);