From 697037fe9b68fdf8cf7ce63f7875912f365270b7 Mon Sep 17 00:00:00 2001
From: wdenk <wdenk>
Date: Wed, 9 Jun 2004 15:29:49 +0000
Subject: [PATCH] * Patch by Martin Krause, 27 May 2004:   Fix a MPC5xxx I2C
 timing issue in i2c_probe().

* Patch by Leif Lindholm, 27 May 2004:
  Fix board_init_f() for dbau1x00 board.
---
 CHANGELOG                 | 6 ++++++
 board/dbau1x00/dbau1x00.c | 4 ++--
 cpu/mpc5xxx/i2c.c         | 1 +
 3 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/CHANGELOG b/CHANGELOG
index 21dddf13b..c0fcb96c1 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,12 @@
 Changes since U-Boot 1.1.1:
 ======================================================================
 
+* Patch by Martin Krause, 27 May 2004:
+  Fix a MPC5xxx I2C timing issue in i2c_probe().
+
+* Patch by Leif Lindholm, 27 May 2004:
+  Fix board_init_f() for dbau1x00 board.
+
 * Patch by Imre Deak, 26 May 2004:
   On OMAP1610 platforms check if booting from RAM(CS0) or flash(CS3).
   Set flash base accordingly, and decide whether to do or skip board
diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c
index 315e41260..df1c15c29 100644
--- a/board/dbau1x00/dbau1x00.c
+++ b/board/dbau1x00/dbau1x00.c
@@ -104,17 +104,17 @@ int checkboard (void)
 		      CFG_PCMCIA_ATTR_BASE, /* Hi */
 		      0x3D000017,           /* Lo0 */
 		      0x3D200017);          /* Lo1 */
-#endif
+#endif	/* 0 */
 	write_one_tlb(22,                   /* index */
 		      0x01ffe000,           /* Pagemask, 16 MB pages */
 		      CFG_PCMCIA_MEM_ADDR,  /* Hi */
 		      0x3E000017,           /* Lo0 */
 		      0x3E200017);          /* Lo1 */
+#endif	/* CONFIG_IDE_PCMCIA */
 
 	/* Release reset of ethernet PHY chips */
 	/* Always do this, because linux does not know about it */
 	*phy = 3;
 
 	return 0;
-#endif
 }
diff --git a/cpu/mpc5xxx/i2c.c b/cpu/mpc5xxx/i2c.c
index 75c7739d6..845f7c05e 100644
--- a/cpu/mpc5xxx/i2c.c
+++ b/cpu/mpc5xxx/i2c.c
@@ -285,6 +285,7 @@ int i2c_probe(uchar chip)
 
 		if (! do_address(chip, 0)) {
 			mpc_reg_out(&regs->mcr, 0, I2C_STA);
+			udelay(500);
 			break;
 		}