Merge branch 'for-next/mxs'
This commit is contained in:
commit
6c68b9caf0
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@ -0,0 +1,6 @@
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#!/bin/sh
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# In OLinuXino board i.MX233 SoC uses LAN9512 (attached to USB) to connect
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# to an Ethernet LAN.
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usb
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@ -9,72 +9,11 @@
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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/* 3322222222221111111111
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* 10987654321098765432109876543210
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* ^^^_ Register Number
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* ^^^^____ Bit offset
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* ^^________ Function
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* ^__________ Drive strength feature present
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* ^___________ Pull up present
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* ^^____________ Drive strength setting
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* ^______________ Pull up / bit keeper setting
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* ^_______________ Voltage select present
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* ^________________ Voltage selection
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* ^____________________ direction if enabled as GPIO (1 = output)
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* ^_____________________ initial output value if enabled as GPIO and configured as output
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* ^______________________ Bit keeper present
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*/
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#ifndef __ASM_MACH_IOMUX_MX23_H
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#define __ASM_MACH_IOMUX_MX23_H
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/* control pad's function */
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#define FBIT_SHIFT (3)
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#define PORTF(bank,bit) (((bit) << FBIT_SHIFT) | (bank))
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#define GET_PORTF(x) ((x) & 0x7)
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#define GET_FBITPOS(x) (((x) >> FBIT_SHIFT) & 0xf)
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#define GET_GPIO_NO(x) ((GET_PORTF(x) << 4) + GET_FBITPOS(m))
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#define FUNC_SHIFT 7
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#define FUNC(x) ((x) << FUNC_SHIFT)
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#define GET_FUNC(x) (((x) >> FUNC_SHIFT) & 3)
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#define IS_GPIO (3)
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/* control pad's GPIO feature if enabled */
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#define GPIO_OUT (1 << 19)
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#define GPIO_VALUE(x) ((x) << 20)
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#define GPIO_IN (0 << 19)
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#define GET_GPIODIR(x) (!!((x) & (1 << 19)))
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#define GET_GPIOVAL(x) (!!((x) & (1 << 20)))
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/* control pad's drive strength */
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#define SE (1 << 9)
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#define SE_PRESENT(x) (!!((x) & SE))
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#define STRENGTH(x) ((x) << 11)
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#define S4MA 0 /* used to define a 4 mA drive strength */
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#define S8MA 1 /* used to define a 8 mA drive strength */
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#define S12MA 2 /* used to define a 12 mA drive strength */
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#define S16MA 3 /* used to define a 16 mA drive strength, not all pads can drive this current! */
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#define GET_STRENGTH(x) (((x) >> 11) & 0x3)
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/* control pad's pull up / bit keeper feature */
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#define PE (1 << 10)
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#define BK (1 << 21)
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#define PE_PRESENT(x) (!!((x) & PE))
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#define BK_PRESENT(x) (!!((x) & BK))
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#define PULLUP(x) ((x) << 13)
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#define BITKEEPER(x) ((x) << 14)
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#define GET_PULLUP(x) (!!((x) & (1 << 13)))
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#define GET_BITKEEPER(x) (!!((x) & BITKEEPER(1)))
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/* control pad's voltage feature */
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#define VE (1 << 14)
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#define VE_PRESENT(x) (!!((x) & VE))
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#define VE_1_8V (0 << 15)
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#define VE_2_5V (0 << 15) /* don't ask my why, RTFM */
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#define GET_VOLTAGE(x) (!!((x) & (1 << 15)))
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/* Bank 0, pins 0 ... 15, GPIO pins 0 ... 15 */
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#define GPMI_D15 (FUNC(0) | PORTF(0, 15) | SE | PE)
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#define GPMI_D15_AUART2_TX (FUNC(1) | PORTF(0, 15) | SE | PE)
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@ -10,69 +10,9 @@
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* GNU General Public License for more details.
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*/
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/* 3322222222221111111111
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* 10987654321098765432109876543210
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* ^^^^^_ Bit offset
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* ^^^______ Register Number
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* ^^_________ Function
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* ^___________ Drive strength feature present
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* ^____________ Pull up present
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* ^^_____________ Drive strength setting
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* ^_______________ Pull up / bit keeper setting
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* ^________________ Voltage select present
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* ^_________________ Voltage selection
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* ^_____________________ direction if enabled as GPIO (1 = output)
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* ^______________________ initial output value if enabled as GPIO
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* and configured as output
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* ^_______________________ Bit keeper present
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*/
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#ifndef __MACH_IOMUX_IMX28_H
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#define __MACH_IOMUX_IMX28_H
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/* control pad's function */
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#define FBANK_SHIFT (5)
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#define PORTF(bank,bit) (((bank) << FBANK_SHIFT) | (bit))
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#define GET_GPIO_NO(x) ((x) & 0xff)
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#define FUNC_SHIFT 8
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#define FUNC(x) ((x) << FUNC_SHIFT)
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#define GET_FUNC(x) (((x) >> FUNC_SHIFT) & 3)
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#define IS_GPIO (3)
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/* control pad's GPIO feature if enabled */
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#define GPIO_OUT (1 << 20)
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#define GPIO_VALUE(x) ((x) << 21)
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#define GPIO_IN (0 << 20)
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#define GET_GPIODIR(x) (!!((x) & (1 << 20)))
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#define GET_GPIOVAL(x) (!!((x) & (1 << 21)))
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/* control pad's drive strength */
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#define SE (1 << 10)
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#define SE_PRESENT(x) (!!((x) & SE))
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#define STRENGTH(x) ((x) << 12)
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#define S4MA 0 /* used to define a 4 mA drive strength */
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#define S8MA 1 /* used to define a 8 mA drive strength */
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#define S12MA 2 /* used to define a 12 mA drive strength */
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#define S16MA 3 /* used to define a 16 mA drive strength,
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not all pads can drive this current! */
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#define GET_STRENGTH(x) (((x) >> 12) & 0x3)
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/* control pad's pull up / bit keeper feature */
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#define PE (1 << 11)
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#define BK (1 << 22)
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#define PE_PRESENT(x) (!!((x) & PE))
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#define BK_PRESENT(x) (!!((x) & BK))
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#define PULLUP(x) ((x) << 14)
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#define BITKEEPER(x) ((x) << 14)
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#define GET_PULLUP(x) (!!((x) & PULLUP(1)))
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#define GET_BITKEEPER(x) (!!((x) & BITKEEPER(1)))
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/* control pad's voltage feature */
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#define VE (1 << 15)
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#define VE_PRESENT(x) (!!((x) & VE))
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#define VE_1_8V (0 << 16)
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#define VE_3_3V (1 << 16)
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#define GET_VOLTAGE(x) (!!((x) & (1 << 16)))
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/* Bank 0, GPIO pins 0 ... 31 */
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#define GPMI_RESETN (FUNC(0) | PORTF(0, 28) | SE | VE | PE)
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#define GPMI_RESETN_SSP3_CMD (FUNC(1) | PORTF(0, 28) | SE | VE | PE)
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@ -18,10 +18,92 @@
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#include <types.h>
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/*
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* The muxable pins on i.MX23 are organized in 4 banks. On i.MX28 there are 7
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* banks. Each bank has up to 32 pins each. Furthermore for each pin some of the
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* following properties can be configured:
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* - drive strength: 4 mA, 8 mA, 12 mA or 16 mA
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* - pull up enabled or bit keeper enabled (a pin cannot have both)
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* - voltage: 1.8 V, 2.5 V (i.MX23 only) or 3.3 V (i.MX28 only)
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* - function: 0..3, with 3 being the GPIO functionality
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*
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* So a configuration for a given pin can be described in an unsigned integer of
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* length 32:
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* - [ 4: 0] bank pin
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* - [ 7: 5] bank
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* - [ 8] 1 iff pin has a switchable pull up
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* - [ 9] 1 iff pin has a switchable bit keeper
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* - [ 10] 1 iff pin has switchable drive strength
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* - [ 11] 1 iff pin has switchable voltage
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* - [13:12] function
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* - [ 14] 1 for enabled pull up
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* - [ 15] 1 iff [14] is a valid pull up value
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* - [ 16] 1 for enabled bit keeper
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* - [ 17] 1 iff [16] is a valid bit keeper value
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* - [19:18] value for drive strength i -> i * 4 mA
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* - [ 20] 1 iff [19:18] is valid
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* - [ 21] 0 for 1.8 V, 1 for 2.5 V resp. 3.3 V
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* - [ 22] 1 iff [21] is valid
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* - [ 23] 1 iff configure as GPIO out if function == 3 (i.e. GPIO)
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* - [ 24] initial value iff configured as GPIO out
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* - [ 25] error
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*/
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#define BANKPIN(p) (((p) & 31) | ERROR((p) & ~31))
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#define BANK(b) ((((b) & 7) << 5) | (ERROR((b) & ~7)))
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#define PE (1 << 8)
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#define BK (1 << 9)
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#define SE (1 << 10)
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#define VE (1 << 11)
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#define FUNC(f) ((((f) & 3) << 12) | (ERROR((f) & ~3)))
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#define PULLUP(p) ((((p) & 1) << 14) | PEVALID | ERROR((p) & ~1))
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#define PEVALID (1 << 15)
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#define BITKEEPER(b) ((((b) & 1) << 16) | BKVALID | ERROR((b) & ~1))
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#define BKVALID (1 << 17)
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#define STRENGTH(s) ((((s) & 3) << 18) | SEVALID | ERROR((s) & ~3))
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#define S4MA 0
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#define S8MA 1
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#define S12MA 2
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#define S16MA 3
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#define SEVALID (1 << 20)
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#define VOLTAGE(v) ((((v) & 1) << 21) | VEVALID | ERROR((v) & ~1))
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#define VE_1_8V VOLTAGE(0)
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#define VEVALID (1 << 22)
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#define GPIO_OUT (1 << 23)
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#define GPIO_IN (0 << 23)
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#define GPIO_VALUE(v) ((((v) & 1) << 24) | ERROR((v) & ~1))
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#define ERROR(x) (!!(x) << 25)
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#define GET_GPIO_NO(m) ((m) & 0xff)
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#define GET_FUNC(m) (((m) >> 12) & 3)
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#define PE_PRESENT(m) ((m) & PE)
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#define GET_PULLUP(m) (((m) >> 14) & 1)
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#define BK_PRESENT(m) ((m) & BK)
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#define GET_BITKEEPER(m)(((m) >> 16) & 1)
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#define SE_PRESENT(m) ((m) & SE)
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#define GET_STRENGTH(m) (((m) >> 18) & 3)
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#define VE_PRESENT(m) ((m) & VE)
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#define GET_VOLTAGE(m) (((m) >> 21) & 1)
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#define GET_GPIODIR(m) (!!((m) & GPIO_OUT))
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#define GET_GPIOVAL(m) (!!((m) & GPIO_VALUE(1)))
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#define IS_GPIO 3
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#if defined CONFIG_ARCH_IMX23
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/*
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* The pin definition of i.MX23 are strange. Bank 0's pins 0 .. 15 are defined
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* using PORTF(0, 0) .. PORTF(0, 15). Its pins 16 .. 31 however use PORTF(1, 0)
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* .. PORTF(1, 15). So the PORTF macro is more ugly than necessary.
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*/
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# define PORTF(bank,bit) (BANK((bank) / 2) | BANKPIN((((bank) & 1) << 4) | (bit)) | ERROR((bit) & ~15) | ERROR((bank) & ~7))
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# define VE_2_5V VOLTAGE(1)
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# include <mach/iomux-imx23.h>
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#endif
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#if defined CONFIG_ARCH_IMX28
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# define PORTF(bank,bit) (BANK(bank) | BANKPIN(bit))
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# define VE_3_3V VOLTAGE(1)
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# include <mach/iomux-imx28.h>
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#endif
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@ -97,20 +97,35 @@ void imx_gpio_mode(uint32_t m)
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reg |= GET_FUNC(m) << ((gpio_pin % 16) << 1);
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writel(reg, IMX_IOMUXC_BASE + reg_offset);
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if (m & ERROR(1))
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printf("%s: broken mode: 0x%08x\n", __func__, m);
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if ((m & (PE | PEVALID)) == PEVALID)
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printf("%s: mode specifies PE, but pin not configurable: 0x%08x\n", __func__, m);
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if ((m & (BK | BKVALID)) == BKVALID)
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printf("%s: mode specifies BK, but pin not configurable: 0x%08x\n", __func__, m);
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if ((m & (SE | SEVALID)) == SEVALID)
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printf("%s: mode specifies SE, but pin not configurable: 0x%08x\n", __func__, m);
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if ((m & (VE | VEVALID)) == VEVALID)
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printf("%s: mode specifies VE, but pin not configurable: 0x%08x\n", __func__, m);
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/* some pins are disabled when configured for GPIO */
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if ((gpio_pin > MAX_GPIO_NO) && (GET_FUNC(m) == IS_GPIO)) {
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printf("Cannot configure pad %u to GPIO\n", gpio_pin);
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return;
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}
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if (SE_PRESENT(m)) {
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if (SE_PRESENT(m) && (m & SEVALID)) {
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reg_offset = calc_strength_reg(gpio_pin);
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reg = readl(IMX_IOMUXC_BASE + reg_offset) & ~(0x3 << ((gpio_pin % 8) << 2));
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reg |= GET_STRENGTH(m) << ((gpio_pin % 8) << 2);
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writel(reg, IMX_IOMUXC_BASE + reg_offset);
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}
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if (VE_PRESENT(m)) {
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if (VE_PRESENT(m) && (m & VEVALID)) {
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reg_offset = calc_strength_reg(gpio_pin);
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if (GET_VOLTAGE(m) == 1)
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writel(0x1 << (((gpio_pin % 8) << 2) + 2),
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@ -120,14 +135,14 @@ void imx_gpio_mode(uint32_t m)
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IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_CLR);
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}
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if (PE_PRESENT(m)) {
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if (PE_PRESENT(m) && (m & PEVALID)) {
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reg_offset = calc_pullup_reg(gpio_pin);
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writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset +
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(GET_PULLUP(m) == 1 ?
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STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR));
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}
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if (BK_PRESENT(m)) {
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if (BK_PRESENT(m) && (m & BKVALID)) {
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reg_offset = calc_pullup_reg(gpio_pin);
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writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset +
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(GET_BITKEEPER(m) == 1 ?
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