Add ATSTK1000 and ATSTK1002 board support
Patch by Haavard Skinnemoen, 06 Sep 2006 This patch adds support for the ATSTK1000 with the ATSTK1002 CPU daughterboard. ATSTK1000 is a full-featured development board for AT32AP CPUs. It has two ethernet ports, a high quality QVGA LCD panel, a loudspeaker, and connectors for USART, PS/2, VGA, USB, MMC/SD cards and CompactFlash cards. For more information, please see this page: http://www.atmel.com/dyn/products/tools.asp?family_id=682 The ATSTK1002 is a daughterboard for the ATSTK1000 supporting the AT32AP7000 chip. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This commit is contained in:
Wolfgang Denk
parent
f93ae788c3
commit
6ccec4492e
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@ -561,6 +561,10 @@ Zachary P. Landau <zachary.landau@labxtechnologies.com>
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# Board CPU #
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#########################################################################
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Haavard Skinnemoen <hskinnemoen@atmel.com>
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ATSTK1000 AT32AP7000
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#########################################################################
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# End of MAINTAINERS list #
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#########################################################################
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9
MAKEALL
9
MAKEALL
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@ -302,6 +302,12 @@ LIST_coldfire=" \
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r5200 M5271EVB \
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"
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#########################################################################
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## AVR32 Systems
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#########################################################################
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LIST_avr32="atstk1002"
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#-----------------------------------------------------------------------
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#----- for now, just run PPC by default -----
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@ -334,7 +340,8 @@ do
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mips|mips_el| \
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nios|nios2| \
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x86|I486| \
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coldfire)
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coldfire| \
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avr32)
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for target in `eval echo '$LIST_'${arg}`
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do
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build_target ${target}
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9
README
9
README
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@ -330,6 +330,15 @@ The following options need to be configured:
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CONFIG_PCI5441 CONFIG_PK1C20
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CONFIG_EP1C20 CONFIG_EP1S10 CONFIG_EP1S40
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AVR32 based boards:
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-------------------
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CONFIG_ATSTK1000
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- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
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Define exactly one of
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CONFIG_ATSTK1002
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- CPU Module Type: (if CONFIG_COGENT is defined)
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Define exactly one of
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@ -0,0 +1,44 @@
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#
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# (C) Copyright 2001-2006
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# Copyright (C) 2005-2006 Atmel Corporation
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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include $(TOPDIR)/config.mk
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LIB := $(obj)lib$(BOARD).a
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COBJS := $(BOARD).o flash.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
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$(LIB): $(obj).depend $(OBJS)
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$(AR) crv $@ $(OBJS)
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1,52 @@
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/*
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* Copyright (C) 2005-2006 Atmel Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/sdram.h>
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DECLARE_GLOBAL_DATA_PTR;
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static const struct sdram_info sdram = {
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.phys_addr = CFG_SDRAM_BASE,
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.row_bits = 11,
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.col_bits = 8,
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.bank_bits = 2,
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.cas = 3,
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.twr = 2,
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.trc = 7,
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.trp = 2,
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.trcd = 2,
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.tras = 5,
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.txsr = 5,
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};
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void board_init_memories(void)
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{
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gd->sdram_size = sdram_init(&sdram);
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}
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void board_init_info(void)
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{
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gd->bd->bi_phy_id[0] = 0x10;
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gd->bd->bi_phy_id[1] = 0x11;
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}
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@ -0,0 +1,4 @@
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PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections
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PLATFORM_LDFLAGS += --gc-sections
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TEXT_BASE = 0x00000000
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LDSCRIPT = $(obj)board/atstk1000/u-boot.lds
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@ -0,0 +1,223 @@
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/*
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* Copyright (C) 2005-2006 Atmel Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#ifdef CONFIG_ATSTK1000_EXT_FLASH
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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#include <asm/sections.h>
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DECLARE_GLOBAL_DATA_PTR;
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flash_info_t flash_info[1];
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static void __flashprog flash_identify(uint16_t *flash, flash_info_t *info)
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{
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unsigned long flags;
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flags = disable_interrupts();
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dcache_flush_unlocked();
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writew(0xaa, flash + 0x555);
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writew(0x55, flash + 0xaaa);
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writew(0x90, flash + 0x555);
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info->flash_id = readl(flash);
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writew(0xff, flash);
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readw(flash);
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if (flags)
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enable_interrupts();
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}
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unsigned long flash_init(void)
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{
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unsigned long addr;
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unsigned int i;
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gd->bd->bi_flashstart = CFG_FLASH_BASE;
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gd->bd->bi_flashsize = CFG_FLASH_SIZE;
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gd->bd->bi_flashoffset = __edata_lma - _text;
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flash_info[0].size = CFG_FLASH_SIZE;
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flash_info[0].sector_count = 135;
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flash_identify(uncached((void *)CFG_FLASH_BASE), &flash_info[0]);
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for (i = 0, addr = 0; i < 8; i++, addr += 0x2000)
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flash_info[0].start[i] = addr;
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for (; i < flash_info[0].sector_count; i++, addr += 0x10000)
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flash_info[0].start[i] = addr;
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return CFG_FLASH_SIZE;
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}
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void flash_print_info(flash_info_t *info)
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{
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printf("Flash: Vendor ID: 0x%02x, Product ID: 0x%02x\n",
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info->flash_id >> 16, info->flash_id & 0xffff);
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printf("Size: %ld MB in %d sectors\n",
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info->size >> 10, info->sector_count);
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}
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int __flashprog flash_erase(flash_info_t *info, int s_first, int s_last)
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{
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unsigned long flags;
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unsigned long start_time;
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uint16_t *fb, *sb;
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unsigned int i;
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int ret;
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uint16_t status;
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if ((s_first < 0) || (s_first > s_last)
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|| (s_last >= info->sector_count)) {
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puts("Error: first and/or last sector out of range\n");
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return ERR_INVAL;
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}
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for (i = s_first; i < s_last; i++)
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if (info->protect[i]) {
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printf("Error: sector %d is protected\n", i);
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return ERR_PROTECTED;
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}
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fb = (uint16_t *)uncached(info->start[0]);
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dcache_flush_unlocked();
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for (i = s_first; (i <= s_last) && !ctrlc(); i++) {
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printf("Erasing sector %3d...", i);
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sb = (uint16_t *)uncached(info->start[i]);
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flags = disable_interrupts();
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start_time = get_timer(0);
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/* Unlock sector */
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writew(0xaa, fb + 0x555);
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writew(0x70, sb);
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/* Erase sector */
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writew(0xaa, fb + 0x555);
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writew(0x55, fb + 0xaaa);
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writew(0x80, fb + 0x555);
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writew(0xaa, fb + 0x555);
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writew(0x55, fb + 0xaaa);
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writew(0x30, sb);
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/* Wait for completion */
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ret = ERR_OK;
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do {
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/* TODO: Timeout */
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status = readw(sb);
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} while ((status != 0xffff) && !(status & 0x28));
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writew(0xf0, fb);
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/*
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* Make sure the command actually makes it to the bus
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* before we re-enable interrupts.
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*/
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readw(fb);
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if (flags)
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enable_interrupts();
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if (status != 0xffff) {
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printf("Flash erase error at address 0x%p: 0x%02x\n",
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sb, status);
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ret = ERR_PROG_ERROR;
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break;
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}
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}
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if (ctrlc())
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printf("User interrupt!\n");
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return ERR_OK;
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}
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int __flashprog write_buff(flash_info_t *info, uchar *src,
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ulong addr, ulong count)
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{
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unsigned long flags;
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uint16_t *base, *p, *s, *end;
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uint16_t word, status;
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int ret = ERR_OK;
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if (addr < info->start[0]
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|| (addr + count) > (info->start[0] + info->size)
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|| (addr + count) < addr) {
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puts("Error: invalid address range\n");
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return ERR_INVAL;
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}
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if (addr & 1 || count & 1 || (unsigned int)src & 1) {
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puts("Error: misaligned source, destination or count\n");
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return ERR_ALIGN;
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}
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base = (uint16_t *)uncached(info->start[0]);
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end = (uint16_t *)uncached(addr + count);
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flags = disable_interrupts();
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dcache_flush_unlocked();
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sync_write_buffer();
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for (p = (uint16_t *)uncached(addr), s = (uint16_t *)src;
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p < end && !ctrlc(); p++, s++) {
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word = *s;
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writew(0xaa, base + 0x555);
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writew(0x55, base + 0xaaa);
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writew(0xa0, base + 0x555);
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writew(word, p);
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sync_write_buffer();
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/* Wait for completion */
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do {
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/* TODO: Timeout */
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status = readw(p);
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} while ((status != word) && !(status & 0x28));
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writew(0xf0, base);
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readw(base);
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if (status != word) {
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printf("Flash write error at address 0x%p: 0x%02x\n",
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p, status);
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ret = ERR_PROG_ERROR;
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break;
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}
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}
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if (flags)
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enable_interrupts();
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return ret;
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}
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#endif /* CONFIG_ATSTK1000_EXT_FLASH */
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@ -0,0 +1,79 @@
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/* -*- Fundamental -*-
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*
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* Copyright (C) 2005-2006 Atmel Corporation
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*
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* See file CREDITS for list of people who contributed to this
|
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* project.
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*
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* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
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* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <config.h>
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OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32")
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OUTPUT_ARCH(avr32)
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ENTRY(_start)
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SECTIONS
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{
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. = CFG_FLASH_BASE;
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_text = .;
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.text : {
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*(.text)
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*(.text.*)
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}
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. = ALIGN(CFG_ICACHE_LINESZ);
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__flashprog_start = .;
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.flashprog : {
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*(.flashprog)
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}
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. = ALIGN(CFG_ICACHE_LINESZ);
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__flashprog_end = .;
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. = ALIGN(8);
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.rodata : {
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*(.rodata)
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*(.rodata.*)
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}
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_etext = .;
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__data_lma = ALIGN(8);
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. = CFG_INTRAM_BASE;
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_data = .;
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.data : AT(__data_lma) {
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*(.data)
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*(.data.*)
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}
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. = ALIGN(4);
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__u_boot_cmd_start = .;
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__u_boot_cmd_lma = __data_lma + (__u_boot_cmd_start - _data);
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.u_boot_cmd : AT(__u_boot_cmd_lma) {
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KEEP(*(.u_boot_cmd))
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}
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__u_boot_cmd_end = .;
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. = ALIGN(8);
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_edata = .;
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__edata_lma = __u_boot_cmd_lma + (_edata - __u_boot_cmd_start);
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.bss : AT(__edata_lma) {
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*(.bss)
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*(.bss.*)
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}
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. = ALIGN(8);
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_end = .;
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}
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@ -0,0 +1,183 @@
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/*
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* Copyright (C) 2005-2006 Atmel Corporation
|
||||
*
|
||||
* Configuration settings for the ATSTK1002 CPU daughterboard
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#define CONFIG_AVR32 1
|
||||
#define CONFIG_AT32AP 1
|
||||
#define CONFIG_AT32AP7000 1
|
||||
#define CONFIG_ATSTK1002 1
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||||
#define CONFIG_ATSTK1000 1
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||||
|
||||
#define CONFIG_ATSTK1000_EXT_FLASH 1
|
||||
|
||||
/*
|
||||
* Timer clock frequency. We're using the CPU-internal COUNT register
|
||||
* for this, so this is equivalent to the CPU core clock frequency
|
||||
*/
|
||||
#define CFG_HZ 1000
|
||||
|
||||
/*
|
||||
* Set up the PLL to run at 199.5 MHz, the CPU to run at 1/2 the PLL
|
||||
* frequency and the peripherals to run at 1/4 the PLL frequency.
|
||||
*/
|
||||
#define CONFIG_PLL 1
|
||||
#define CFG_POWER_MANAGER 1
|
||||
#define CFG_OSC0_HZ 20000000
|
||||
#define CFG_PLL0_DIV 1
|
||||
#define CFG_PLL0_MUL 7
|
||||
#define CFG_PLL0_SUPPRESS_CYCLES 16
|
||||
#define CFG_CLKDIV_CPU 0
|
||||
#define CFG_CLKDIV_HSB 1
|
||||
#define CFG_CLKDIV_PBA 2
|
||||
#define CFG_CLKDIV_PBB 1
|
||||
|
||||
/*
|
||||
* The PLLOPT register controls the PLL like this:
|
||||
* icp = PLLOPT<2>
|
||||
* ivco = PLLOPT<1:0>
|
||||
*
|
||||
* We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
|
||||
*/
|
||||
#define CFG_PLL0_OPT 0x04
|
||||
|
||||
#define CFG_USART1 1
|
||||
|
||||
#define CFG_CONSOLE_UART_DEV DEVICE_USART1
|
||||
|
||||
/* User serviceable stuff */
|
||||
#define CONFIG_CMDLINE_TAG 1
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
#define CONFIG_STACKSIZE (2048)
|
||||
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_BOOTARGS \
|
||||
"console=ttyUS0 root=/dev/mtdblock1 fbmem=600k"
|
||||
|
||||
#define CONFIG_COMMANDS (CFG_CMD_BDI \
|
||||
| CFG_CMD_LOADS \
|
||||
| CFG_CMD_LOADB \
|
||||
/* | CFG_CMD_IMI */ \
|
||||
/* | CFG_CMD_CACHE */ \
|
||||
| CFG_CMD_FLASH \
|
||||
| CFG_CMD_MEMORY \
|
||||
/* | CFG_CMD_NET */ \
|
||||
| CFG_CMD_ENV \
|
||||
/* | CFG_CMD_IRQ */ \
|
||||
| CFG_CMD_BOOTD \
|
||||
| CFG_CMD_CONSOLE \
|
||||
/* | CFG_CMD_EEPROM */ \
|
||||
| CFG_CMD_ASKENV \
|
||||
| CFG_CMD_RUN \
|
||||
| CFG_CMD_ECHO \
|
||||
/* | CFG_CMD_I2C */ \
|
||||
| CFG_CMD_REGINFO \
|
||||
/* | CFG_CMD_DATE */ \
|
||||
/* | CFG_CMD_DHCP */ \
|
||||
/* | CFG_CMD_AUTOSCRIPT */ \
|
||||
/* | CFG_CMD_MII */ \
|
||||
| CFG_CMD_MISC \
|
||||
/* | CFG_CMD_SDRAM */ \
|
||||
/* | CFG_CMD_DIAG */ \
|
||||
/* | CFG_CMD_HWFLOW */ \
|
||||
/* | CFG_CMD_SAVES */ \
|
||||
/* | CFG_CMD_SPI */ \
|
||||
/* | CFG_CMD_PING */ \
|
||||
/* | CFG_CMD_MMC */ \
|
||||
/* | CFG_CMD_FAT */ \
|
||||
/* | CFG_CMD_IMLS */ \
|
||||
/* | CFG_CMD_ITEST */ \
|
||||
/* | CFG_CMD_EXT2 */ \
|
||||
)
|
||||
|
||||
#include <cmd_confdefs.h>
|
||||
|
||||
#define CONFIG_ATMEL_USART 1
|
||||
#define CONFIG_PIO2 1
|
||||
#define CFG_NR_PIOS 5
|
||||
#define CFG_HSDRAMC 1
|
||||
|
||||
#define CFG_DCACHE_LINESZ 32
|
||||
#define CFG_ICACHE_LINESZ 32
|
||||
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
|
||||
/* External flash on STK1000 */
|
||||
#if 0
|
||||
#define CFG_FLASH_CFI 1
|
||||
#define CFG_FLASH_CFI_DRIVER 1
|
||||
#endif
|
||||
|
||||
#define CFG_FLASH_BASE 0x00000000
|
||||
#define CFG_FLASH_SIZE 0x800000
|
||||
#define CFG_MAX_FLASH_BANKS 1
|
||||
#define CFG_MAX_FLASH_SECT 135
|
||||
|
||||
#define CFG_MONITOR_BASE CFG_FLASH_BASE
|
||||
|
||||
#define CFG_INTRAM_BASE 0x24000000
|
||||
#define CFG_INTRAM_SIZE 0x8000
|
||||
|
||||
#define CFG_SDRAM_BASE 0x10000000
|
||||
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_ENV_SIZE 65536
|
||||
#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_FLASH_SIZE - CFG_ENV_SIZE)
|
||||
|
||||
#define CFG_INIT_SP_ADDR (CFG_INTRAM_BASE + CFG_INTRAM_SIZE)
|
||||
|
||||
#define CFG_MALLOC_LEN (256*1024)
|
||||
#define CFG_MALLOC_END \
|
||||
({ \
|
||||
DECLARE_GLOBAL_DATA_PTR; \
|
||||
CFG_SDRAM_BASE + gd->sdram_size; \
|
||||
})
|
||||
#define CFG_MALLOC_START (CFG_MALLOC_END - CFG_MALLOC_LEN)
|
||||
|
||||
#define CFG_DMA_ALLOC_LEN (16384)
|
||||
#define CFG_DMA_ALLOC_END (CFG_MALLOC_START)
|
||||
#define CFG_DMA_ALLOC_START (CFG_DMA_ALLOC_END - CFG_DMA_ALLOC_LEN)
|
||||
/* Allow 2MB for the kernel run-time image */
|
||||
#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x00200000)
|
||||
#define CFG_BOOTPARAMS_LEN (16 * 1024)
|
||||
|
||||
/* Other configuration settings that shouldn't have to change all that often */
|
||||
#define CFG_PROMPT "Uboot> "
|
||||
#define CFG_CBSIZE 256
|
||||
#define CFG_MAXARGS 8
|
||||
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
|
||||
#define CFG_LONGHELP 1
|
||||
|
||||
#define CFG_MEMTEST_START \
|
||||
({ DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_dram[0].start; })
|
||||
#define CFG_MEMTEST_END \
|
||||
({ \
|
||||
DECLARE_GLOBAL_DATA_PTR; \
|
||||
gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; \
|
||||
})
|
||||
#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
Loading…
Reference in New Issue