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arm: mvebu: initial support for Marvell Kirkwood SoCs 

Marvell Kirkwood SoCs are based on a ARMv5 compatible core designed by
Marvell, and a large number of peripherals with Marvell Dove, Marvell
Armada 370 and Marvell Armada XP SoCs. The Marvell Kirkwood are used
in a large number of consumer-grade NAS devices, for example.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Thomas Petazzoni 2013-05-15 09:36:34 +02:00 committed by Sascha Hauer
parent 4f7c4267ca
commit 6cd2c76b2f
5 changed files with 185 additions and 0 deletions
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14
arch/arm/mach-mvebu/Kconfig
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@ -31,6 +31,11 @@ config ARCH_DOVE
select CPU_V7
select CLOCKSOURCE_ORION
config ARCH_KIRKWOOD
bool "Kirkwood"
select CPU_FEROCEON
select CLOCKSOURCE_ORION
endchoice
if ARCH_ARMADA_370
@ -72,4 +77,13 @@ endchoice
endif # ARCH_DOVE
if ARCH_KIRKWOOD
choice
prompt "Kirkwood Board Type"
endchoice
endif # ARCH_KIRKWOOD
endif # ARCH_MVEBU

1
arch/arm/mach-mvebu/Makefile
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@ -1,3 +1,4 @@
obj-$(CONFIG_ARCH_ARMADA_370) += armada-370-xp.o
obj-$(CONFIG_ARCH_ARMADA_XP) += armada-370-xp.o
obj-$(CONFIG_ARCH_DOVE) += dove.o
obj-$(CONFIG_ARCH_KIRKWOOD) += kirkwood.o

37
arch/arm/mach-mvebu/include/mach/kirkwood-regs.h Normal file
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@ -0,0 +1,37 @@
/*
* Copyright
* (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MACH_MVEBU_KIRKWOOD_REGS_H
#define __MACH_MVEBU_KIRKWOOD_REGS_H
#define KIRKWOOD_INT_REGS_BASE IOMEM(0xd0000000)
#define KIRKWOOD_SDRAM_WIN_BASE (KIRKWOOD_INT_REGS_BASE + 0x1500)
#define DDR_BASE_CS_OFF(n) (0x0000 + ((n) << 3))
#define DDR_BASE_CS_HIGH_MASK 0xf
#define DDR_BASE_CS_LOW_MASK 0xff000000
#define DDR_SIZE_CS_OFF(n) (0x0004 + ((n) << 3))
#define DDR_SIZE_ENABLED (1 << 0)
#define DDR_SIZE_CS_MASK 0x1c
#define DDR_SIZE_CS_SHIFT 2
#define DDR_SIZE_MASK 0xff000000
#define KIRKWOOD_SAR_BASE (KIRKWOOD_INT_REGS_BASE + 0x10030)
#define KIRKWOOD_TCLK_BIT 21
#define KIRKWOOD_UART_BASE (KIRKWOOD_INT_REGS_BASE + 0x12000)
#define KIRKWOOD_CPUCTRL_BASE (KIRKWOOD_INT_REGS_BASE + 0x20100)
#define KIRKWOOD_TIMER_BASE (KIRKWOOD_INT_REGS_BASE + 0x20300)
#endif /* __MACH_MVEBU_KIRKWOOD_REGS_H */

22
arch/arm/mach-mvebu/include/mach/kirkwood.h Normal file
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@ -0,0 +1,22 @@
/*
* Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __MACH_KIRKWOOD_H
#define __MACH_KIRKWOOD_H
int kirkwood_add_uart0(void);
void __naked __noreturn kirkwood_barebox_entry(void);
#endif /* __MACH_KIRKWOOD_H */

111
arch/arm/mach-mvebu/kirkwood.c Normal file
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@ -0,0 +1,111 @@
/*
* Copyright (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <common.h>
#include <init.h>
#include <io.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <ns16550.h>
#include <mach/kirkwood-regs.h>
#include <asm/memory.h>
#include <asm/barebox-arm.h>
static struct clk *tclk;
static inline void kirkwood_memory_find(unsigned long *phys_base,
unsigned long *phys_size)
{
void __iomem *sdram_win = IOMEM(KIRKWOOD_SDRAM_WIN_BASE);
int cs;
*phys_base = ~0;
*phys_size = 0;
for (cs = 0; cs < 4; cs++) {
uint32_t base = readl(sdram_win + DDR_BASE_CS_OFF(cs));
uint32_t ctrl = readl(sdram_win + DDR_SIZE_CS_OFF(cs));
/* Skip non-enabled CS */
if (! (ctrl & DDR_SIZE_ENABLED))
continue;
base &= DDR_BASE_CS_LOW_MASK;
if (base < *phys_base)
*phys_base = base;
*phys_size += (ctrl | ~DDR_SIZE_MASK) + 1;
}
}
void __naked __noreturn kirkwood_barebox_entry(void)
{
unsigned long phys_base, phys_size;
kirkwood_memory_find(&phys_base, &phys_size);
writel('E', 0xD0012000);
barebox_arm_entry(phys_base, phys_size, 0);
}
static struct NS16550_plat uart_plat = {
.shift = 2,
};
int kirkwood_add_uart0(void)
{
uart_plat.clock = clk_get_rate(tclk);
if (!add_ns16550_device(DEVICE_ID_DYNAMIC,
(unsigned int)KIRKWOOD_UART_BASE,
32, IORESOURCE_MEM_32BIT, &uart_plat))
return -ENODEV;
return 0;
}
static int kirkwood_init_clocks(void)
{
uint32_t sar = readl(KIRKWOOD_SAR_BASE);
unsigned int rate;
if (sar & (1 << KIRKWOOD_TCLK_BIT))
rate = 166666667;
else
rate = 200000000;
tclk = clk_fixed("tclk", rate);
return clk_register_clkdev(tclk, NULL, "orion-timer");
}
static int kirkwood_init_soc(void)
{
unsigned long phys_base, phys_size;
kirkwood_init_clocks();
add_generic_device("orion-timer", DEVICE_ID_SINGLE, NULL,
(unsigned int)KIRKWOOD_TIMER_BASE, 0x30,
IORESOURCE_MEM, NULL);
kirkwood_memory_find(&phys_base, &phys_size);
arm_add_mem_device("ram0", phys_base, phys_size);
return 0;
}
postcore_initcall(kirkwood_init_soc);
void __noreturn reset_cpu(unsigned long addr)
{
writel(0x4, KIRKWOOD_CPUCTRL_BASE + 0x8);
writel(0x1, KIRKWOOD_CPUCTRL_BASE + 0xC);
for(;;)
;
}
EXPORT_SYMBOL(reset_cpu);