From 6d610de61c17c4caeeb2815dedf840b06efa61ad Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 13 Mar 2014 10:13:59 +0100 Subject: [PATCH] ARM: i.MX: introduce clk parent rate changes Let dividers and gates change the parent rates. Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/clk-imx6.c | 2 +- arch/arm/mach-imx/clk.h | 14 +++++++++++--- 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-imx/clk-imx6.c b/arch/arm/mach-imx/clk-imx6.c index 8d78a1832..db16bb5e4 100644 --- a/arch/arm/mach-imx/clk-imx6.c +++ b/arch/arm/mach-imx/clk-imx6.c @@ -214,7 +214,7 @@ static int imx6_ccm_probe(struct device_d *dev) clks[sata_ref_100m] = imx_clk_gate("sata_ref_100m", "sata_ref", base + 0xe0, 20); clks[pcie_ref_125m] = imx_clk_gate("pcie_ref_125m", "pcie_ref", base + 0xe0, 19); - clks[enet_ref] = clk_divider_table("enet_ref", "pll6_enet", base + 0xe0, 0, 2, clk_enet_ref_table, 0); + clks[enet_ref] = imx_clk_divider_table("enet_ref", "pll6_enet", base + 0xe0, 0, 2, clk_enet_ref_table); /* name parent_name reg idx */ clks[pll2_pfd0_352m] = imx_clk_pfd("pll2_pfd0_352m", "pll2_bus", base + 0x100, 0); diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h index cdafad1e9..d83266b77 100644 --- a/arch/arm/mach-imx/clk.h +++ b/arch/arm/mach-imx/clk.h @@ -4,13 +4,21 @@ static inline struct clk *imx_clk_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width) { - return clk_divider(name, parent, reg, shift, width, 0); + return clk_divider(name, parent, reg, shift, width, CLK_SET_RATE_PARENT); +} + +static inline struct clk *imx_clk_divider_table(const char *name, + const char *parent, void __iomem *reg, u8 shift, u8 width, + const struct clk_div_table *table) +{ + return clk_divider_table(name, parent, reg, shift, width, table, + CLK_SET_RATE_PARENT); } static inline struct clk *imx_clk_fixed_factor(const char *name, const char *parent, unsigned int mult, unsigned int div) { - return clk_fixed_factor(name, parent, mult, div, 0); + return clk_fixed_factor(name, parent, mult, div, CLK_SET_RATE_PARENT); } static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, @@ -22,7 +30,7 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, static inline struct clk *imx_clk_gate(const char *name, const char *parent, void __iomem *reg, u8 shift) { - return clk_gate(name, parent, reg, shift, 0); + return clk_gate(name, parent, reg, shift, CLK_SET_RATE_PARENT); } struct clk *imx_clk_pllv1(const char *name, const char *parent,