mc13xxx: Define maximum SPI clock frequency global to driver
This patch provide setup for SPI clk frequency global to driver. For MC13783 maximum clock frequency is 20 MHz, for MC13892 maximum clock frequency is 26 MHz, so we define 20 MHz as a maximum SPI clk. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -191,7 +191,6 @@ static struct spi_imx_master ecspi_0_data = {
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static const struct spi_board_info ccxmx51_spi_board_info[] = {
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{
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.name = "mc13xxx-spi",
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.max_speed_hz = 6000000,
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.bus_num = 0,
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.chip_select = 0,
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},
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@ -117,7 +117,6 @@ static struct spi_imx_master spi_0_data = {
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static const struct spi_board_info mx51_babbage_spi_board_info[] = {
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{
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.name = "mc13xxx-spi",
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.max_speed_hz = 300000,
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.bus_num = 0,
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.chip_select = 0,
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},
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@ -59,7 +59,6 @@ static struct spi_imx_master pcm038_spi_0_data = {
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static struct spi_board_info pcm038_spi_board_info[] = {
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{
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.name = "mc13xxx-spi",
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.max_speed_hz = 3000000,
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.bus_num = 0,
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.chip_select = 0,
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}
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@ -297,6 +297,7 @@ static int mc_probe(struct device_d *dev, enum mc13xxx_mode mode)
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mc_dev->spi = dev->type_data;
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mc_dev->spi->mode = SPI_MODE_0 | SPI_CS_HIGH;
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mc_dev->spi->bits_per_word = 32;
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mc_dev->spi->max_speed_hz = 20000000;
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}
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mc_dev->cdev.size = 256;
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mc_dev->cdev.dev = dev;
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