animeo_ip: ensure the phy is reset correctly
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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3293c860ab
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6e419891d2
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@ -19,6 +19,7 @@
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#include <nand.h>
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#include <sizes.h>
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#include <linux/mtd/nand.h>
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#include <linux/clk.h>
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#include <mach/board.h>
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#include <mach/at91sam9_smc.h>
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#include <gpio.h>
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@ -208,12 +209,45 @@ static void animeo_ip_power_control(void)
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animeo_export_gpio_out(AT91_PIN_PC4, "power_save");
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}
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static void animeo_ip_phy_reset(void)
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{
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unsigned long rstc;
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int i;
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struct clk *clk = clk_get(NULL, "macb_clk");
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clk_enable(clk);
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for (i = AT91_PIN_PA12; i <= AT91_PIN_PA29; i++)
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at91_set_gpio_input(i, 0);
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rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
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/* Need to reset PHY -> 500ms reset */
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at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
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(AT91_RSTC_ERSTL & (0x0d << 8)) |
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AT91_RSTC_URSTEN);
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at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
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/* Wait for end hardware reset */
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while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL))
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;
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/* Restore NRST value */
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at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | (rstc) | AT91_RSTC_URSTEN);
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}
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static void animeo_ip_add_device_eth(void)
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{
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animeo_ip_phy_reset();
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at91_add_device_eth(0, &macb_pdata);
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}
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static int animeo_ip_devices_init(void)
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{
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animeo_ip_detect_version();
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animeo_ip_power_control();
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animeo_ip_add_device_nand();
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at91_add_device_eth(0, &macb_pdata);
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animeo_ip_add_device_mci();
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animeo_ip_add_device_buttons();
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animeo_ip_add_device_led();
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@ -232,6 +266,8 @@ static int animeo_ip_devices_init(void)
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devfs_add_partition("nand0", SZ_256K + SZ_32K, SZ_32K, DEVFS_PARTITION_FIXED, "env_raw");
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dev_add_bb_dev("env_raw", "env0");
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animeo_ip_add_device_eth();
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return 0;
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}
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