parent
4fbb0d6987
commit
7303a2a1f5
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obj-y += eco920.o
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TEXT_BASE = 0x21f00000
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/*
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* (C) Copyright 2007 Pengutronix
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* Sascha Hauer, <s.hauer@pengutronix.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/AT91RM9200.h>
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#include <at91rm9200_net.h>
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#include <dm9161.h>
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#include <miiphy.h>
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//#include <splash.h>
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//#include <s1d13706fb.h>
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#include <net.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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/* Enable Ctrlc */
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console_init_f ();
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gd->bd->bi_arch_number = MACH_TYPE_ECO920;
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int dram_init (void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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return 0;
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}
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static unsigned int phy_is_connected (AT91PS_EMAC p_mac)
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{
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return 1;
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}
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static unsigned char phy_init_bogus (AT91PS_EMAC p_mac)
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{
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unsigned short val;
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int timeout, adr, speed, fullduplex;
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at91rm9200_EmacEnableMDIO (p_mac);
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/* Scan through phy addresses to find a phy */
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for (adr = 0; adr < 16; adr++) {
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at91rm9200_EmacReadPhy(p_mac, PHY_PHYIDR1 | (adr << 5), &val);
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if (val != 0xffff)
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break;
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}
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adr <<= 5;
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val = PHY_BMCR_RESET;
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at91rm9200_EmacWritePhy(p_mac, PHY_BMCR | adr, &val);
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udelay(1000);
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val = 0x01e1; /* ADVERTISE_100FULL | ADVERTISE_100HALF |
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* ADVERTISE_10FULL | ADVERTISE_10HALF |
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* ADVERTISE_CSMA */
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at91rm9200_EmacWritePhy(p_mac, PHY_ANAR | adr, &val);
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at91rm9200_EmacReadPhy(p_mac, PHY_BMCR | adr, &val);
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val |= PHY_BMCR_AUTON | PHY_BMCR_RST_NEG;
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at91rm9200_EmacWritePhy(p_mac, PHY_BMCR | adr, &val);
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timeout = 500;
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do {
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/* at91rm9200_EmacReadPhy() has a udelay(10000)
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* in it, so this should be about 5 deconds
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*/
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if ((timeout--) == 0) {
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printf("Autonegotiation timeout\n");
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goto out;
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}
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at91rm9200_EmacReadPhy(p_mac, PHY_BMSR | adr, &val);
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} while (!(val & PHY_BMSR_LS));
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at91rm9200_EmacReadPhy(p_mac, PHY_ANLPAR | adr, &val);
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if (val & PHY_ANLPAR_100) {
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speed = 100;
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p_mac->EMAC_CFG |= AT91C_EMAC_SPD;
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} else {
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speed = 10;
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p_mac->EMAC_CFG &= ~AT91C_EMAC_SPD;
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}
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if (val & (PHY_ANLPAR_TXFD | PHY_ANLPAR_10FD)) {
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fullduplex = 1;
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p_mac->EMAC_CFG |= AT91C_EMAC_FD;
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} else {
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fullduplex = 0;
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p_mac->EMAC_CFG &= ~AT91C_EMAC_FD;
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}
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printf("running at %d-%sDuplex\n",speed, fullduplex ? "FUll" : "Half");
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out:
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at91rm9200_EmacDisableMDIO (p_mac);
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return 1;
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}
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void at91rm9200_GetPhyInterface(AT91PS_PhyOps p_phyops)
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{
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p_phyops->Init = phy_init_bogus;
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p_phyops->IsPhyConnected = phy_is_connected;
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/* This is not used anywhere */
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p_phyops->GetLinkSpeed = NULL;
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/* ditto */
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p_phyops->AutoNegotiate = NULL;
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}
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#if 0
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static int *efb_init(struct efb_info *efb)
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{
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writeb(GPIO_CONTROL0_GPO, efb->regs + EFB_GPIO_CONTROL1);
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writeb(PCLK_SOURCE_CLKI2, efb->regs + EFB_PCLK_CONF);
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writeb(0x1, efb->regs + 0x26); /* FIXME: display specific, should be set to zero
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* according to datasheet
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*/
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return 0;
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}
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/* Nanya STN Display */
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static struct efb_info efb = {
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.fbd = {
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.xres = 320,
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.yres = 240,
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.bpp = 8,
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.fb = (void*)0x40020000,
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},
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.init = efb_init,
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.regs = (void*)0x40000000,
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.pixclock = 100000,
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.hsync_len = 1,
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.left_margin = 22,
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.right_margin = 1,
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.vsync_len = 1,
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.upper_margin = 0,
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.lower_margin = 1,
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.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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.panel_type = PANEL_TYPE_STN | PANEL_TYPE_WIDTH_8 |
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PANEL_TYPE_COLOR | PANEL_TYPE_FORMAT_2,
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};
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#endif
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#define SMC_CSR3 0xFFFFFF7C
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int misc_init_r(void)
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{
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/* Initialization of the Static Memory Controller for Chip Select 3 */
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*(volatile unsigned long*)SMC_CSR3 = 0x00002185;
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// s1d13706fb_init(&efb);
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// splash_set_fb_data(&efb.fbd);
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// eth_set_current(&at91rm9200_eth);
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return 0;
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}
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@ -0,0 +1,57 @@
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/*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
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/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
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OUTPUT_ARCH(arm)
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ENTRY(_start)
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SECTIONS
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{
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. = 0x00000000;
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. = ALIGN(4);
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.text :
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{
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cpu/arm920t/start.o (.text)
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*(.text)
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}
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. = ALIGN(4);
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.rodata : { *(.rodata) }
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. = ALIGN(4);
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.data : { *(.data) }
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. = ALIGN(4);
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.got : { *(.got) }
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. = .;
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__u_boot_cmd_start = .;
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.u_boot_cmd : { *(.u_boot_cmd) }
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__u_boot_cmd_end = .;
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. = ALIGN(4);
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__bss_start = .;
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.bss : { *(.bss) }
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_end = .;
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}
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