Add framebuffer support
This patch adds framebuffer support and a driver for i.MX[12] framebuffer devices. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer
parent
915aa03c77
commit
79baaa503f
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@ -6,5 +6,6 @@ source "drivers/spi/Kconfig"
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source "drivers/nor/Kconfig"
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source "drivers/nand/Kconfig"
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source "drivers/usb/Kconfig"
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source "drivers/video/Kconfig"
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endmenu
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@ -4,3 +4,4 @@ obj-y += nand/
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obj-y += nor/
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obj-y += usb/
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obj-$(CONFIG_SPI) += spi/
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obj-$(CONFIG_VIDEO) += video/
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@ -0,0 +1,11 @@
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menu "Video drivers "
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config VIDEO
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bool "Enable Framebuffersupport"
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config DRIVER_VIDEO_IMX
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bool "i.MX framebuffer driver"
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depends on ARCH_IMX
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depends on VIDEO
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endmenu
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@ -0,0 +1,3 @@
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obj-$(CONFIG_VIDEO) += fb.o
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obj-$(CONFIG_DRIVER_VIDEO_IMX) += imx.o
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@ -0,0 +1,86 @@
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#include <common.h>
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#include <fb.h>
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#include <errno.h>
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#include <command.h>
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#include <getopt.h>
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#include <fcntl.h>
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#include <fs.h>
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static int fb_ioctl(struct cdev* cdev, int req, void *data)
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{
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struct fb_info *info = cdev->priv;
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switch (req) {
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case FBIOGET_SCREENINFO:
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memcpy(data, info, sizeof(*info));
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break;
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case FBIO_ENABLE:
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info->fbops->fb_enable(info);
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break;
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case FBIO_DISABLE:
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info->fbops->fb_disable(info);
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break;
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default:
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return -ENOSYS;
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}
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return 0;
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}
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static int fb_enable_set(struct device_d *dev, struct param_d *param,
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const char *val)
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{
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struct fb_info *info = dev->priv;
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int enable;
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enable = simple_strtoul(val, NULL, 0);
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if (enable)
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info->fbops->fb_enable(info);
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else
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info->fbops->fb_disable(info);
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sprintf(info->enable_string, "%d", !!enable);
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return 0;
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}
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static struct file_operations fb_ops = {
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.read = mem_read,
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.write = mem_write,
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.memmap = generic_memmap_rw,
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.lseek = dev_lseek_default,
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.ioctl = fb_ioctl,
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};
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int register_framebuffer(struct fb_info *info)
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{
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int id = get_free_deviceid("fb");
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struct device_d *dev;
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info->cdev.ops = &fb_ops;
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info->cdev.name = asprintf("fb%d", id);
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info->cdev.size = info->xres * info->yres * (info->bits_per_pixel >> 3);
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info->cdev.dev = &info->dev;
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info->cdev.priv = info;
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info->cdev.dev->map_base = (unsigned long)info->screen_base;
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info->cdev.dev->size = info->cdev.size;
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dev = &info->dev;
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dev->priv = info;
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sprintf(dev->name, "fb");
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info->param_enable.set = fb_enable_set;
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info->param_enable.name = "enable";
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sprintf(info->enable_string, "%d", 0);
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info->param_enable.value = info->enable_string;
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dev_add_param(dev, &info->param_enable);
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register_device(&info->dev);
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devfs_create(&info->cdev);
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return 0;
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}
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@ -0,0 +1,415 @@
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/*
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* Freescale i.MX Frame Buffer device driver
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*
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* Copyright (C) 2004 Sascha Hauer, Pengutronix
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* Based on acornfb.c Copyright (C) Russell King.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*
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* Please direct your questions and comments on this driver to the following
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* email address:
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*
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* linux-arm-kernel@lists.arm.linux.org.uk
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*/
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#include <common.h>
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#include <fb.h>
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#include <asm/io.h>
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#include <asm/arch/imxfb.h>
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#include <driver.h>
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#include <malloc.h>
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#include <errno.h>
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#include <init.h>
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#include <asm/arch/imx-regs.h>
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#include <asm-generic/div64.h>
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#include <asm/arch/clock.h>
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#define LCDC_SSA 0x00
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#define LCDC_SIZE 0x04
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#define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
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#ifdef CONFIG_ARCH_IMX1
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#define SIZE_YMAX(y) ((y) & 0x1ff)
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#else
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#define SIZE_YMAX(y) ((y) & 0x3ff)
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#endif
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#define LCDC_VPW 0x08
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#define VPW_VPW(x) ((x) & 0x3ff)
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#define LCDC_CPOS 0x0C
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#define CPOS_CC1 (1<<31)
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#define CPOS_CC0 (1<<30)
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#define CPOS_OP (1<<28)
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#define CPOS_CXP(x) (((x) & 3ff) << 16)
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#ifdef CONFIG_ARCH_IMX1
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#define CPOS_CYP(y) ((y) & 0x1ff)
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#else
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#define CPOS_CYP(y) ((y) & 0x3ff)
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#endif
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#define LCDC_LCWHB 0x10
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#define LCWHB_BK_EN (1<<31)
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#define LCWHB_CW(w) (((w) & 0x1f) << 24)
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#define LCWHB_CH(h) (((h) & 0x1f) << 16)
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#define LCWHB_BD(x) ((x) & 0xff)
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#define LCDC_LCHCC 0x14
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#ifdef CONFIG_ARCH_IMX1
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#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11)
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#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5)
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#define LCHCC_CUR_COL_B(b) ((b) & 0x1f)
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#else
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#define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12)
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#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6)
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#define LCHCC_CUR_COL_B(b) ((b) & 0x3f)
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#endif
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#define LCDC_PCR 0x18
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#define LCDC_HCR 0x1C
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#define HCR_H_WIDTH(x) (((x) & 0x3f) << 26)
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#define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
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#define HCR_H_WAIT_2(x) ((x) & 0xff)
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#define LCDC_VCR 0x20
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#define VCR_V_WIDTH(x) (((x) & 0x3f) << 26)
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#define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
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#define VCR_V_WAIT_2(x) ((x) & 0xff)
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#define LCDC_POS 0x24
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#define POS_POS(x) ((x) & 1f)
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#define LCDC_LSCR1 0x28
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/* bit fields in imxfb.h */
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#define LCDC_PWMR 0x2C
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/* bit fields in imxfb.h */
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#define LCDC_DMACR 0x30
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/* bit fields in imxfb.h */
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#define LCDC_RMCR 0x34
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#ifdef CONFIG_ARCH_IMX1
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#define RMCR_LCDC_EN (1<<1)
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#else
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#define RMCR_LCDC_EN 0
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#endif
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#define RMCR_SELF_REF (1<<0)
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#define LCDC_LCDICR 0x38
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#define LCDICR_INT_SYN (1<<2)
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#define LCDICR_INT_CON (1)
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#define LCDC_LCDISR 0x40
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#define LCDISR_UDR_ERR (1<<3)
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#define LCDISR_ERR_RES (1<<2)
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#define LCDISR_EOF (1<<1)
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#define LCDISR_BOF (1<<0)
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/*
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* These are the bitfields for each
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* display depth that we support.
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*/
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struct imxfb_rgb {
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struct fb_bitfield red;
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struct fb_bitfield green;
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struct fb_bitfield blue;
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struct fb_bitfield transp;
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};
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struct imxfb_info {
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void __iomem *regs;
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u_int pcr;
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u_int pwmr;
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u_int lscr1;
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u_int dmacr;
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u_int cmap_inverse:1,
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cmap_static:1,
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unused:30;
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struct imx_fb_videomode *mode;
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struct fb_info info;
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};
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#define IMX_NAME "IMX"
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/*
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* Minimum X and Y resolutions
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*/
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#define MIN_XRES 64
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#define MIN_YRES 64
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/* Actually this really is 18bit support, the lowest 2 bits of each colour
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* are unused in hardware. We claim to have 24bit support to make software
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* like X work, which does not support 18bit.
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*/
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static struct imxfb_rgb def_rgb_18 = {
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.red = {.offset = 16, .length = 8,},
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.green = {.offset = 8, .length = 8,},
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.blue = {.offset = 0, .length = 8,},
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.transp = {.offset = 0, .length = 0,},
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};
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static struct imxfb_rgb def_rgb_16_tft = {
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.red = {.offset = 11, .length = 5,},
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.green = {.offset = 5, .length = 6,},
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.blue = {.offset = 0, .length = 5,},
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.transp = {.offset = 0, .length = 0,},
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};
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static struct imxfb_rgb def_rgb_16_stn = {
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.red = {.offset = 8, .length = 4,},
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.green = {.offset = 4, .length = 4,},
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.blue = {.offset = 0, .length = 4,},
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.transp = {.offset = 0, .length = 0,},
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};
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static struct imxfb_rgb def_rgb_8 = {
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.red = {.offset = 0, .length = 8,},
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.green = {.offset = 0, .length = 8,},
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.blue = {.offset = 0, .length = 8,},
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.transp = {.offset = 0, .length = 0,},
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};
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static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
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{
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chan &= 0xffff;
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chan >>= 16 - bf->length;
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return chan << bf->offset;
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}
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static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
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u_int trans, struct fb_info *info)
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{
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struct imxfb_info *fbi = info->priv;
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int ret = 1;
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u32 val;
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/*
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* If inverse mode was selected, invert all the colours
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* rather than the register number. The register number
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* is what you poke into the framebuffer to produce the
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* colour you requested.
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*/
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if (fbi->cmap_inverse) {
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red = 0xffff - red;
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green = 0xffff - green;
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blue = 0xffff - blue;
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}
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/*
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* If greyscale is true, then we convert the RGB value
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* to greyscale no matter what visual we are using.
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*/
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if (info->grayscale)
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red = green = blue = (19595 * red + 38470 * green +
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7471 * blue) >> 16;
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#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
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if (regno < 256) {
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val = (CNVT_TOHW(red, 4) << 8) |
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(CNVT_TOHW(green,4) << 4) |
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CNVT_TOHW(blue, 4);
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writel(val, fbi->regs + 0x800 + (regno << 2));
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ret = 0;
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}
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return ret;
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}
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static void imxfb_enable_controller(struct fb_info *info)
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{
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struct imxfb_info *fbi = info->priv;
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writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR);
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#ifdef CONFIG_ARCH_IMX27
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PCCR0 |= PCCR0_LCDC_EN;
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PCCR1 |= PCCR1_HCLK_LCDC;
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#endif
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}
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static void imxfb_disable_controller(struct fb_info *info)
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{
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struct imxfb_info *fbi = info->priv;
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writel(0, fbi->regs + LCDC_RMCR);
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#ifdef CONFIG_ARCH_IMX27
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PCCR0 &= ~PCCR0_LCDC_EN;
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PCCR1 &= ~PCCR1_HCLK_LCDC;
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#endif
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}
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/*
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* imxfb_activate_var():
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* Configures LCD Controller based on entries in var parameter. Settings are
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* only written to the controller if changes were made.
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*/
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static int imxfb_activate_var(struct fb_info *info)
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{
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struct fb_videomode *mode = info->mode;
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struct imxfb_rgb *rgb;
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unsigned long lcd_clk;
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unsigned long long tmp;
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struct imxfb_info *fbi = info->priv;
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u32 pcr;
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/* physical screen start address */
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writel(VPW_VPW(mode->xres * info->bits_per_pixel / 8 / 4),
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fbi->regs + LCDC_VPW);
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writel(HCR_H_WIDTH(mode->hsync_len - 1) |
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HCR_H_WAIT_1(mode->right_margin - 1) |
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HCR_H_WAIT_2(mode->left_margin - 3),
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fbi->regs + LCDC_HCR);
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writel(VCR_V_WIDTH(mode->vsync_len) |
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VCR_V_WAIT_1(mode->lower_margin) |
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VCR_V_WAIT_2(mode->upper_margin),
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fbi->regs + LCDC_VCR);
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writel(SIZE_XMAX(info->xres) | SIZE_YMAX(info->yres),
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fbi->regs + LCDC_SIZE);
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writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
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writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
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writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
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writel((unsigned long)fbi->info.screen_base, fbi->regs + LCDC_SSA);
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/* panning offset 0 (0 pixel offset) */
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writel(0x0, fbi->regs + LCDC_POS);
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/* disable hardware cursor */
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writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
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fbi->regs + LCDC_CPOS);
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lcd_clk = imx_get_lcdclk();
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tmp = mode->pixclock * (unsigned long long)lcd_clk;
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do_div(tmp, 1000000);
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if (do_div(tmp, 1000000) > 500000)
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tmp++;
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pcr = (unsigned int)tmp;
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if (--pcr > 0x3f) {
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pcr = 0x3f;
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printk(KERN_WARNING "Must limit pixel clock to %luHz\n",
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lcd_clk / pcr);
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}
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switch (info->bits_per_pixel) {
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case 32:
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pcr |= PCR_BPIX_18;
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rgb = &def_rgb_18;
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break;
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case 16:
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default:
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#ifdef CONFIG_ARCH_IMX1
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pcr |= PCR_BPIX_12;
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#else
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pcr |= PCR_BPIX_16;
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#endif
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if (fbi->pcr & PCR_TFT)
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rgb = &def_rgb_16_tft;
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else
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rgb = &def_rgb_16_stn;
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break;
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case 8:
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pcr |= PCR_BPIX_8;
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rgb = &def_rgb_8;
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break;
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}
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writel(fbi->pcr | pcr, fbi->regs + LCDC_PCR);
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/*
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* Copy the RGB parameters for this display
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* from the machine specific parameters.
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*/
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info->red = rgb->red;
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info->green = rgb->green;
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info->blue = rgb->blue;
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info->transp = rgb->transp;
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return 0;
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}
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static struct fb_ops imxfb_ops = {
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.fb_setcolreg = imxfb_setcolreg,
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.fb_enable = imxfb_enable_controller,
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.fb_disable = imxfb_disable_controller,
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};
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static int imxfb_probe(struct device_d *dev)
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{
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struct imxfb_info *fbi;
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struct fb_info *info;
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struct imx_fb_platform_data *pdata = dev->platform_data;
|
||||
int ret;
|
||||
|
||||
if (!pdata)
|
||||
return -ENODEV;
|
||||
|
||||
fbi = xzalloc(sizeof(*fbi));
|
||||
info = &fbi->info;
|
||||
|
||||
fbi->mode = pdata->mode;
|
||||
fbi->regs = (void *)dev->map_base;
|
||||
fbi->pcr = pdata->mode->pcr;
|
||||
fbi->pwmr = pdata->pwmr;
|
||||
fbi->lscr1 = pdata->lscr1;
|
||||
fbi->dmacr = pdata->dmacr;
|
||||
info->priv = fbi;
|
||||
info->mode = &pdata->mode->mode;
|
||||
info->xres = pdata->mode->mode.xres;
|
||||
info->yres = pdata->mode->mode.yres;
|
||||
info->bits_per_pixel = pdata->mode->bpp;
|
||||
info->fbops = &imxfb_ops;
|
||||
|
||||
dev_info(dev, "i.MX Framebuffer driver\n");
|
||||
|
||||
fbi->info.screen_base = xzalloc(info->xres * info->yres *
|
||||
(info->bits_per_pixel >> 3));
|
||||
|
||||
imxfb_activate_var(&fbi->info);
|
||||
|
||||
ret = register_framebuffer(&fbi->info);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "failed to register framebuffer\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void imxfb_remove(struct device_d *dev)
|
||||
{
|
||||
}
|
||||
|
||||
static struct driver_d imxfb_driver = {
|
||||
.name = "imxfb",
|
||||
.probe = imxfb_probe,
|
||||
.remove = imxfb_remove,
|
||||
};
|
||||
|
||||
static int imxfb_init(void)
|
||||
{
|
||||
return register_driver(&imxfb_driver);
|
||||
}
|
||||
|
||||
device_initcall(imxfb_init);
|
||||
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
/*
|
||||
* This structure describes the machine which we are running on.
|
||||
*/
|
||||
|
||||
#include <fb.h>
|
||||
|
||||
#define PCR_TFT (1 << 31)
|
||||
#define PCR_COLOR (1 << 30)
|
||||
#define PCR_PBSIZ_1 (0 << 28)
|
||||
#define PCR_PBSIZ_2 (1 << 28)
|
||||
#define PCR_PBSIZ_4 (2 << 28)
|
||||
#define PCR_PBSIZ_8 (3 << 28)
|
||||
#define PCR_BPIX_1 (0 << 25)
|
||||
#define PCR_BPIX_2 (1 << 25)
|
||||
#define PCR_BPIX_4 (2 << 25)
|
||||
#define PCR_BPIX_8 (3 << 25)
|
||||
#define PCR_BPIX_12 (4 << 25)
|
||||
#define PCR_BPIX_16 (5 << 25)
|
||||
#define PCR_BPIX_18 (6 << 25)
|
||||
#define PCR_PIXPOL (1 << 24)
|
||||
#define PCR_FLMPOL (1 << 23)
|
||||
#define PCR_LPPOL (1 << 22)
|
||||
#define PCR_CLKPOL (1 << 21)
|
||||
#define PCR_OEPOL (1 << 20)
|
||||
#define PCR_SCLKIDLE (1 << 19)
|
||||
#define PCR_END_SEL (1 << 18)
|
||||
#define PCR_END_BYTE_SWAP (1 << 17)
|
||||
#define PCR_REV_VS (1 << 16)
|
||||
#define PCR_ACD_SEL (1 << 15)
|
||||
#define PCR_ACD(x) (((x) & 0x7f) << 8)
|
||||
#define PCR_SCLK_SEL (1 << 7)
|
||||
#define PCR_SHARP (1 << 6)
|
||||
#define PCR_PCD(x) ((x) & 0x3f)
|
||||
|
||||
#define PWMR_CLS(x) (((x) & 0x1ff) << 16)
|
||||
#define PWMR_LDMSK (1 << 15)
|
||||
#define PWMR_SCR1 (1 << 10)
|
||||
#define PWMR_SCR0 (1 << 9)
|
||||
#define PWMR_CC_EN (1 << 8)
|
||||
#define PWMR_PW(x) ((x) & 0xff)
|
||||
|
||||
#define LSCR1_PS_RISE_DELAY(x) (((x) & 0x7f) << 26)
|
||||
#define LSCR1_CLS_RISE_DELAY(x) (((x) & 0x3f) << 16)
|
||||
#define LSCR1_REV_TOGGLE_DELAY(x) (((x) & 0xf) << 8)
|
||||
#define LSCR1_GRAY2(x) (((x) & 0xf) << 4)
|
||||
#define LSCR1_GRAY1(x) (((x) & 0xf))
|
||||
|
||||
#define DMACR_BURST (1 << 31)
|
||||
#define DMACR_HM(x) (((x) & 0xf) << 16)
|
||||
#define DMACR_TM(x) ((x) & 0xf)
|
||||
|
||||
struct imx_fb_videomode {
|
||||
struct fb_videomode mode;
|
||||
u32 pcr;
|
||||
unsigned char bpp;
|
||||
};
|
||||
|
||||
struct imx_fb_platform_data {
|
||||
struct imx_fb_videomode *mode;
|
||||
|
||||
u_int cmap_greyscale:1,
|
||||
cmap_inverse:1,
|
||||
cmap_static:1,
|
||||
unused:29;
|
||||
|
||||
u_int pwmr;
|
||||
u_int lscr1;
|
||||
u_int dmacr;
|
||||
};
|
||||
|
||||
void set_imx_fb_info(struct imx_fb_platform_data *);
|
||||
|
||||
Loading…
Reference in New Issue