i.MX27: Added helper for setup chipselect control register
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -185,9 +185,7 @@ static int eukrea_cpuimx27_devices_init(void)
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};
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/* configure 16 bit nor flash on cs0 */
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CS0U = 0x00008F03;
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CS0L = 0xA0330D01;
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CS0A = 0x002208C0;
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imx27_setup_weimcs(0, 0x00008F03, 0xA0330D01, 0x002208C0);
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/* initialize gpios */
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for (i = 0; i < ARRAY_SIZE(mode); i++)
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@ -233,9 +231,7 @@ static int eukrea_cpuimx27_console_init(void)
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#endif
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/* configure 8 bit UART on cs3 */
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FMCR &= ~0x2;
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CS3U = 0x0000D603;
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CS3L = 0x0D1D0D01;
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CS3A = 0x00D20000;
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imx27_setup_weimcs(3, 0x0000D603, 0x0D1D0D01, 0x00D20000);
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#ifdef CONFIG_DRIVER_SERIAL_NS16550
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add_ns16550_device(-1, IMX_CS3_BASE + QUART_OFFSET, 0xf,
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IORESOURCE_MEM_16BIT, &quad_uart_serial_plat);
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@ -42,15 +42,11 @@ static struct fec_platform_data fec_info = {
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static int imx27ads_timing_init(void)
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{
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/* configure cpld on cs4 */
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CS4U = 0x0000DCF6;
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CS4L = 0x444A4541;
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CS4A = 0x44443302;
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imx27_setup_weimcs(4, 0x0000DCF6, 0x444A4541, 0x44443302);
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/* configure synchronous mode for
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* 16 bit nor flash on cs0 */
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CS0U = 0x0000CC03;
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CS0L = 0xa0330D01;
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CS0A = 0x00220800;
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imx27_setup_weimcs(0, 0x0000CC03, 0xa0330D01, 0x00220800);
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writew(0x00f0, 0xc0000000);
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writew(0x00aa, 0xc0000aaa);
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@ -59,9 +55,7 @@ static int imx27ads_timing_init(void)
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writew(0x66ca, 0xc0000aaa);
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writew(0x00f0, 0xc0000000);
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CS0U = 0x23524E80;
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CS0L = 0x10000D03;
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CS0A = 0x00720900;
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imx27_setup_weimcs(0, 0x23524E80, 0x10000D03, 0x00720900);
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/* Select FEC data through data path */
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writew(0x0020, IMX_CS4_BASE + 0x10);
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@ -224,19 +224,13 @@ static int pcm038_devices_init(void)
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};
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/* configure 16 bit nor flash on cs0 */
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CS0U = 0x22C2CF00;
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CS0L = 0x75000D01;
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CS0A = 0x00000900;
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imx27_setup_weimcs(0, 0x22C2CF00, 0x75000D01, 0x00000900);
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/* configure SRAM on cs1 */
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CS1U = 0x0000d843;
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CS1L = 0x22252521;
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CS1A = 0x22220a00;
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imx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
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/* configure SJA1000 on cs4 */
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CS4U = 0x0000DCF6;
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CS4L = 0x444A0301;
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CS4A = 0x44443302;
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imx27_setup_weimcs(4, 0x0000DCF6, 0x444A0301, 0x44443302);
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/* initizalize gpios */
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for (i = 0; i < ARRAY_SIZE(mode); i++)
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@ -66,24 +66,9 @@
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#define GPCR_BOOT_8BIT_NAND_512 7
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/* Chip Select Registers */
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#define CS0U __REG(IMX_WEIM_BASE + 0x00) /* Chip Select 0 Upper Register */
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#define CS0L __REG(IMX_WEIM_BASE + 0x04) /* Chip Select 0 Lower Register */
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#define CS0A __REG(IMX_WEIM_BASE + 0x08) /* Chip Select 0 Addition Register */
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#define CS1U __REG(IMX_WEIM_BASE + 0x10) /* Chip Select 1 Upper Register */
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#define CS1L __REG(IMX_WEIM_BASE + 0x14) /* Chip Select 1 Lower Register */
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#define CS1A __REG(IMX_WEIM_BASE + 0x18) /* Chip Select 1 Addition Register */
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#define CS2U __REG(IMX_WEIM_BASE + 0x20) /* Chip Select 2 Upper Register */
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#define CS2L __REG(IMX_WEIM_BASE + 0x24) /* Chip Select 2 Lower Register */
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#define CS2A __REG(IMX_WEIM_BASE + 0x28) /* Chip Select 2 Addition Register */
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#define CS3U __REG(IMX_WEIM_BASE + 0x30) /* Chip Select 3 Upper Register */
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#define CS3L __REG(IMX_WEIM_BASE + 0x34) /* Chip Select 3 Lower Register */
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#define CS3A __REG(IMX_WEIM_BASE + 0x38) /* Chip Select 3 Addition Register */
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#define CS4U __REG(IMX_WEIM_BASE + 0x40) /* Chip Select 4 Upper Register */
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#define CS4L __REG(IMX_WEIM_BASE + 0x44) /* Chip Select 4 Lower Register */
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#define CS4A __REG(IMX_WEIM_BASE + 0x48) /* Chip Select 4 Addition Register */
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#define CS5U __REG(IMX_WEIM_BASE + 0x50) /* Chip Select 5 Upper Register */
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#define CS5L __REG(IMX_WEIM_BASE + 0x54) /* Chip Select 5 Lower Register */
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#define CS5A __REG(IMX_WEIM_BASE + 0x58) /* Chip Select 5 Addition Register */
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#define CSxU(x) __REG(IMX_WEIM_BASE + (cs * 0x10) + 0x00) /* Chip Select x Upper Register */
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#define CSxL(x) __REG(IMX_WEIM_BASE + (cs * 0x10) + 0x04) /* Chip Select x Lower Register */
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#define CSxA(x) __REG(IMX_WEIM_BASE + (cs * 0x10) + 0x08) /* Chip Select x Addition Register */
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#define EIM __REG(IMX_WEIM_BASE + 0x60) /* WEIM Configuration Register */
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#include "esdctl.h"
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@ -255,4 +240,11 @@
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#define IMX_CS4_BASE 0xD4000000
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#define IMX_CS5_BASE 0xD6000000
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static inline void imx27_setup_weimcs(size_t cs, unsigned upper, unsigned lower, unsigned addional)
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{
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CSxU(cs) = upper;
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CSxL(cs) = lower;
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CSxA(cs) = addional;
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}
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#endif /* _IMX27_REGS_H */
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