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CLK: clk-mux: Respect CLK_MUX_HIWORD_MASK flag

It is required for Rockchip SoCs where clock settings registers have
write-enable mask in high word.

Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Andrey Panov 2015-03-04 23:11:32 +03:00 committed by Sascha Hauer
parent 22a0c31c92
commit 7baf7df9fd
2 changed files with 5 additions and 0 deletions

View File

@ -45,6 +45,9 @@ static int clk_mux_set_parent(struct clk *clk, u8 idx)
val = readl(m->reg);
val &= ~(((1 << m->width) - 1) << m->shift);
val |= idx << m->shift;
if (clk->flags & CLK_MUX_HIWORD_MASK)
val |= ((1 << m->width) - 1) << (m->shift + 16);
writel(val, m->reg);
return 0;

View File

@ -248,6 +248,8 @@ struct clk_divider {
int table_size;
};
#define CLK_MUX_HIWORD_MASK (1 << 2)
extern struct clk_ops clk_divider_ops;
struct clk *clk_divider(const char *name, const char *parent,