diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 3312a49a0..c5769991f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -167,13 +167,16 @@ KBUILD_IMAGE := barebox.ubl endif quiet_cmd_am35xx_spi_image = SPI-IMG $@ - cmd_am35xx_spi_image = scripts/mk-am35xx-spi-image -a $(TEXT_BASE) $< > $@ + cmd_am35xx_spi_image = scripts/mk-am3xxx-spi-image -s am35xx -a $(TEXT_BASE) $< > $@ barebox.spi: $(KBUILD_BINARY) FORCE $(call if_changed,am35xx_spi_image) +MLO.spi: MLO FORCE + $(call if_changed,am35xx_spi_image) + ifeq ($(CONFIG_OMAP_BUILD_SPI),y) -KBUILD_IMAGE := barebox.spi +KBUILD_IMAGE := MLO.spi endif quiet_cmd_zynq_image = ZYNQ-IMG $@ diff --git a/arch/arm/boards/beaglebone/Makefile b/arch/arm/boards/beaglebone/Makefile index 092c31d6b..21a1a29d0 100644 --- a/arch/arm/boards/beaglebone/Makefile +++ b/arch/arm/boards/beaglebone/Makefile @@ -1,2 +1,3 @@ lwl-y += lowlevel.o obj-y += board.o +bbenv-y += defaultenv-beaglebone diff --git a/arch/arm/boards/beaglebone/board.c b/arch/arm/boards/beaglebone/board.c index ad0d3b307..993d05bfe 100644 --- a/arch/arm/boards/beaglebone/board.c +++ b/arch/arm/boards/beaglebone/board.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -66,6 +67,8 @@ static int beaglebone_devices_init(void) black = is_beaglebone_black(); + defaultenv_append_directory(defaultenv_beaglebone); + globalvar_add_simple("board.variant", black ? "boneblack" : "bone"); printf("detected 'BeagleBone %s'\n", black ? "Black" : "White"); diff --git a/arch/arm/boards/beaglebone/env/boot/sd b/arch/arm/boards/beaglebone/defaultenv-beaglebone/boot/sd similarity index 100% rename from arch/arm/boards/beaglebone/env/boot/sd rename to arch/arm/boards/beaglebone/defaultenv-beaglebone/boot/sd diff --git a/arch/arm/boards/beaglebone/env/config b/arch/arm/boards/beaglebone/defaultenv-beaglebone/config similarity index 100% rename from arch/arm/boards/beaglebone/env/config rename to arch/arm/boards/beaglebone/defaultenv-beaglebone/config diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c index 66fd3715c..350e3ff9d 100644 --- a/arch/arm/boards/beaglebone/lowlevel.c +++ b/arch/arm/boards/beaglebone/lowlevel.c @@ -147,7 +147,7 @@ static noinline int beaglebone_sram_init(void) &ddr2_data); } - am33xx_uart0_soft_reset(); + am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE); am33xx_enable_uart0_pin_mux(); omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE); putc_ll('>'); diff --git a/arch/arm/boards/phytec-phycore-am335x/Makefile b/arch/arm/boards/phytec-phycore-am335x/Makefile index 092c31d6b..173a6b6fd 100644 --- a/arch/arm/boards/phytec-phycore-am335x/Makefile +++ b/arch/arm/boards/phytec-phycore-am335x/Makefile @@ -1,2 +1,3 @@ lwl-y += lowlevel.o obj-y += board.o +bbenv-y += defaultenv-phycore-am335x diff --git a/arch/arm/boards/phytec-phycore-am335x/board.c b/arch/arm/boards/phytec-phycore-am335x/board.c index 59de42bee..9482b80ed 100644 --- a/arch/arm/boards/phytec-phycore-am335x/board.c +++ b/arch/arm/boards/phytec-phycore-am335x/board.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -48,6 +49,13 @@ static struct omap_barebox_part pcm051_barebox_part = { .nor_size = SZ_512K, }; +static char *xloadslots[] = { + "/dev/nand0.xload.bb", + "/dev/nand0.xload_backup1.bb", + "/dev/nand0.xload_backup2.bb", + "/dev/nand0.xload_backup3.bb" +}; + static int pcm051_devices_init(void) { if (!of_machine_is_compatible("phytec,pcm051")) @@ -67,8 +75,11 @@ static int pcm051_devices_init(void) omap_set_barebox_part(&pcm051_barebox_part); armlinux_set_architecture(MACH_TYPE_PCM051); + defaultenv_append_directory(defaultenv_phycore_am335x); am33xx_bbu_spi_nor_mlo_register_handler("MLO.spi", "/dev/m25p0.xload"); + am33xx_bbu_nand_xloadslots_register_handler("MLO.nand", + xloadslots, ARRAY_SIZE(xloadslots)); return 0; } diff --git a/arch/arm/boards/phytec-phycore-am335x/env/boot/mmc b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/mmc similarity index 100% rename from arch/arm/boards/phytec-phycore-am335x/env/boot/mmc rename to arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/mmc diff --git a/arch/arm/boards/phytec-phycore-am335x/env/boot/nand b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/nand similarity index 100% rename from arch/arm/boards/phytec-phycore-am335x/env/boot/nand rename to arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/nand diff --git a/arch/arm/boards/phytec-phycore-am335x/env/boot/spi b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/spi similarity index 100% rename from arch/arm/boards/phytec-phycore-am335x/env/boot/spi rename to arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/boot/spi diff --git a/arch/arm/boards/phytec-phycore-am335x/env/config-board b/arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/config-board similarity index 100% rename from arch/arm/boards/phytec-phycore-am335x/env/config-board rename to arch/arm/boards/phytec-phycore-am335x/defaultenv-phycore-am335x/config-board diff --git a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c index f04961dbf..a0ba86a6e 100644 --- a/arch/arm/boards/phytec-phycore-am335x/lowlevel.c +++ b/arch/arm/boards/phytec-phycore-am335x/lowlevel.c @@ -76,7 +76,7 @@ static noinline void pcm051_board_init(void) &MT41J256M8HX15E_2x256M8_regs, &MT41J256M8HX15E_2x256M8_data); - am33xx_uart0_soft_reset(); + am33xx_uart_soft_reset((void *)AM33XX_UART0_BASE); am33xx_enable_uart0_pin_mux(); omap_uart_lowlevel_init((void *)AM33XX_UART0_BASE); putc_ll('>'); diff --git a/arch/arm/configs/am335x_beaglebone_defconfig b/arch/arm/configs/am335x_beaglebone_defconfig deleted file mode 100644 index 80c0ca54f..000000000 --- a/arch/arm/configs/am335x_beaglebone_defconfig +++ /dev/null @@ -1,84 +0,0 @@ -CONFIG_ARCH_OMAP=y -CONFIG_OMAP_MULTI_BOARDS=y -CONFIG_MACH_BEAGLEBONE=y -CONFIG_THUMB2_BAREBOX=y -CONFIG_CMD_ARM_MMUINFO=y -CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y -CONFIG_ARM_UNWIND=y -CONFIG_MMU=y -CONFIG_TEXT_BASE=0x8f000000 -CONFIG_MALLOC_SIZE=0x0 -CONFIG_MALLOC_TLSF=y -CONFIG_KALLSYMS=y -CONFIG_PROMPT="barebox> " -CONFIG_LONGHELP=y -CONFIG_HUSH_FANCY_PROMPT=y -CONFIG_CMDLINE_EDITING=y -CONFIG_AUTO_COMPLETE=y -CONFIG_MENU=y -# CONFIG_TIMESTAMP is not set -CONFIG_CONSOLE_ACTIVATE_NONE=y -CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/beaglebone/env" -CONFIG_CMD_EDIT=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_MSLEEP=y -CONFIG_CMD_SAVEENV=y -CONFIG_CMD_EXPORT=y -CONFIG_CMD_PRINTENV=y -CONFIG_CMD_READLINE=y -CONFIG_CMD_MENU=y -CONFIG_CMD_MENU_MANAGEMENT=y -CONFIG_CMD_TIME=y -CONFIG_CMD_LN=y -CONFIG_CMD_TFTP=y -CONFIG_CMD_FILETYPE=y -CONFIG_CMD_ECHO_E=y -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_IOMEM=y -CONFIG_CMD_MM=y -CONFIG_CMD_CRC=y -CONFIG_CMD_CRC_CMP=y -CONFIG_CMD_MD5SUM=y -CONFIG_CMD_BOOTM_SHOW_TYPE=y -CONFIG_CMD_BOOTM_VERBOSE=y -CONFIG_CMD_BOOTM_INITRD=y -CONFIG_CMD_BOOTM_OFTREE=y -CONFIG_CMD_BOOTM_OFTREE_UIMAGE=y -CONFIG_CMD_UIMAGE=y -CONFIG_CMD_RESET=y -CONFIG_CMD_GO=y -CONFIG_CMD_OFTREE=y -CONFIG_CMD_OF_PROPERTY=y -CONFIG_CMD_OF_NODE=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_MAGICVAR=y -CONFIG_CMD_MAGICVAR_HELP=y -CONFIG_CMD_GPIO=y -CONFIG_CMD_UNCOMPRESS=y -CONFIG_CMD_I2C=y -CONFIG_CMD_MIITOOL=y -CONFIG_CMD_DETECT=y -CONFIG_NET=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_PING=y -CONFIG_NET_NETCONSOLE=y -CONFIG_NET_RESOLV=y -CONFIG_OFDEVICE=y -CONFIG_OF_BAREBOX_DRIVERS=y -CONFIG_DRIVER_SERIAL_NS16550=y -CONFIG_DRIVER_SERIAL_NS16550_OMAP_EXTENSIONS=y -CONFIG_DRIVER_NET_CPSW=y -# CONFIG_SPI is not set -CONFIG_I2C=y -CONFIG_I2C_OMAP=y -CONFIG_MCI=y -CONFIG_MCI_OMAP_HSMMC=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_SINGLE=y -CONFIG_FS_TFTP=y -CONFIG_FS_NFS=y -CONFIG_FS_FAT=y -CONFIG_FS_FAT_WRITE=y -CONFIG_FS_FAT_LFN=y diff --git a/arch/arm/configs/phytec-phycore-am335x_defconfig b/arch/arm/configs/am335x_defconfig similarity index 80% rename from arch/arm/configs/phytec-phycore-am335x_defconfig rename to arch/arm/configs/am335x_defconfig index edf204f3f..0c92c96e4 100644 --- a/arch/arm/configs/phytec-phycore-am335x_defconfig +++ b/arch/arm/configs/am335x_defconfig @@ -1,6 +1,7 @@ CONFIG_ARCH_OMAP=y CONFIG_BAREBOX_UPDATE_AM33XX_SPI_NOR_MLO=y CONFIG_OMAP_MULTI_BOARDS=y +CONFIG_MACH_BEAGLEBONE=y CONFIG_MACH_PCM051=y CONFIG_THUMB2_BAREBOX=y CONFIG_ARM_BOARD_APPEND_ATAG=y @@ -13,7 +14,7 @@ CONFIG_MALLOC_SIZE=0x0 CONFIG_MALLOC_TLSF=y CONFIG_KALLSYMS=y CONFIG_RELOCATABLE=y -CONFIG_PROMPT="barebox@pcm051>" +CONFIG_PROMPT="barebox> " CONFIG_LONGHELP=y CONFIG_HUSH_FANCY_PROMPT=y CONFIG_CMDLINE_EDITING=y @@ -21,37 +22,52 @@ CONFIG_AUTO_COMPLETE=y CONFIG_MENU=y # CONFIG_TIMESTAMP is not set CONFIG_BLSPEC=y +CONFIG_CONSOLE_ACTIVATE_NONE=y CONFIG_DEFAULT_ENVIRONMENT_GENERIC_NEW=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="arch/arm/boards/phytec-phycore-am335x/env" CONFIG_DEBUG_INFO=y CONFIG_CMD_EDIT=y CONFIG_CMD_SLEEP=y +CONFIG_CMD_MSLEEP=y CONFIG_CMD_SAVEENV=y +CONFIG_CMD_LOADENV=y CONFIG_CMD_EXPORT=y CONFIG_CMD_PRINTENV=y CONFIG_CMD_READLINE=y +CONFIG_CMD_READF=y +CONFIG_CMD_LET=y CONFIG_CMD_MENU=y -CONFIG_CMD_MENU_MANAGEMENT=y +CONFIG_CMD_MENUTREE=y CONFIG_CMD_TIME=y +CONFIG_CMD_LN=y CONFIG_CMD_TFTP=y +CONFIG_CMD_FILETYPE=y CONFIG_CMD_ECHO_E=y CONFIG_CMD_LOADB=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_IOMEM=y +CONFIG_CMD_MM=y CONFIG_CMD_CRC=y CONFIG_CMD_CRC_CMP=y CONFIG_CMD_MD5SUM=y CONFIG_CMD_FLASH=y CONFIG_CMD_UBIFORMAT=y CONFIG_CMD_BOOTM_SHOW_TYPE=y +CONFIG_CMD_BOOTM_VERBOSE=y +CONFIG_CMD_BOOTM_INITRD=y +CONFIG_CMD_BOOTM_OFTREE=y CONFIG_CMD_UIMAGE=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_BOOTU is not set CONFIG_CMD_RESET=y CONFIG_CMD_GO=y +CONFIG_CMD_OFTREE=y +CONFIG_CMD_OF_PROPERTY=y +CONFIG_CMD_OF_NODE=y CONFIG_CMD_BAREBOX_UPDATE=y CONFIG_CMD_TIMEOUT=y CONFIG_CMD_PARTITION=y +CONFIG_CMD_MAGICVAR=y +CONFIG_CMD_MAGICVAR_HELP=y CONFIG_CMD_GPIO=y CONFIG_CMD_UNCOMPRESS=y CONFIG_CMD_I2C=y @@ -64,6 +80,8 @@ CONFIG_NET=y CONFIG_CMD_DHCP=y CONFIG_NET_NFS=y CONFIG_CMD_PING=y +CONFIG_NET_NETCONSOLE=y +CONFIG_NET_RESOLV=y CONFIG_OFDEVICE=y CONFIG_OF_BAREBOX_DRIVERS=y CONFIG_DRIVER_SERIAL_NS16550=y @@ -87,7 +105,6 @@ CONFIG_LED_GPIO_OF=y CONFIG_LED_TRIGGERS=y CONFIG_EEPROM_AT24=y CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_PINCTRL=y CONFIG_PINCTRL_SINGLE=y CONFIG_BUS_OMAP_GPMC=y CONFIG_FS_TFTP=y diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig index 201944ce2..732de15fe 100644 --- a/arch/arm/mach-omap/Kconfig +++ b/arch/arm/mach-omap/Kconfig @@ -93,6 +93,16 @@ config BAREBOX_UPDATE_AM33XX_SPI_NOR_MLO Say Y for barebox update SPI NOR MLO handler. AM35xx, AM33xx chips use big endian MLO for SPI NOR flash. +config BAREBOX_UPDATE_AM33XX_NAND_XLOADSLOTS + prompt "barebox update nand xload slots handler" + bool + depends on BAREBOX_UPDATE + help + Say Y for barebox update nand xload slots handler. + This update handler updates 4 default nand xload slots + with a single command. + The Handler also checks if the given image has a valid CH header. + config ARCH_TEXT_BASE hex default 0x80e80000 if MACH_OMAP343xSDP diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile index 81a771eb3..c9b6f4bb9 100644 --- a/arch/arm/mach-omap/Makefile +++ b/arch/arm/mach-omap/Makefile @@ -32,3 +32,4 @@ obj-$(CONFIG_MFD_TWL6030) += omap4_twl6030_mmc.o obj-$(CONFIG_OMAP4_USBBOOT) += omap4_rom_usb.o obj-$(CONFIG_CMD_BOOT_ORDER) += boot_order.o obj-$(CONFIG_BAREBOX_UPDATE_AM33XX_SPI_NOR_MLO) += am33xx_bbu_spi_mlo.o +obj-$(CONFIG_BAREBOX_UPDATE_AM33XX_NAND_XLOADSLOTS) += am33xx_bbu_nand_xloadslots.o diff --git a/arch/arm/mach-omap/am33xx_bbu_nand_xloadslots.c b/arch/arm/mach-omap/am33xx_bbu_nand_xloadslots.c new file mode 100644 index 000000000..0b4f1ccf0 --- /dev/null +++ b/arch/arm/mach-omap/am33xx_bbu_nand_xloadslots.c @@ -0,0 +1,122 @@ +/* + * am33xx_bbu_nand_xloadslots.c - barebox update handler for + * the nand xload slots. + * + * Copyright (c) 2014 Wadim Egorov , Phytec + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +struct nand_bbu_handler { + struct bbu_handler bbu_handler; + char **devicefile; + int num_devicefiles; +}; + +static int write_image(const char *devfile, const void *image, size_t size) +{ + int fd = 0; + int ret = 0; + + fd = open(devfile, O_WRONLY); + if (fd < 0) { + pr_err("could not open %s: %s\n", devfile, + errno_str()); + return fd; + } + + ret = erase(fd, ~0, 0); + if (ret < 0) { + pr_err("could not erase %s: %s\n", devfile, + errno_str()); + close(fd); + return ret; + } + + ret = write(fd, image, size); + if (ret < 0) { + pr_err("could not write to fd %s: %s\n", devfile, + errno_str()); + close(fd); + return ret; + } + + close(fd); + + return 0; +} + +/* + * This handler updates all given xload slots in nand with an image. + */ +static int nand_xloadslots_update_handler(struct bbu_handler *handler, + struct bbu_data *data) +{ + int ret = 0; + const void *image = data->image; + size_t size = data->len; + struct nand_bbu_handler *nh; + int i = 0; + + if (file_detect_type(image, size) != filetype_ch_image) { + pr_err("%s is not a valid ch-image\n", data->imagefile); + return -EINVAL; + } + + nh = container_of(handler, struct nand_bbu_handler, bbu_handler); + + /* check if the devicefile has been overwritten */ + if (strcmp(data->devicefile, nh->devicefile[0]) != 0) { + ret = bbu_confirm(data); + if (ret != 0) + return ret; + + ret = write_image(data->devicefile, image, size); + if (ret != 0) + return ret; + } else { + for (i = 0; i < nh->num_devicefiles; i++) { + ret = write_image(nh->devicefile[i], image, size); + if (ret != 0) + return ret; + } + } + + return 0; +} + +int am33xx_bbu_nand_xloadslots_register_handler(const char *name, + char **devicefile, + int num_devicefiles) +{ + struct nand_bbu_handler *handler; + int ret; + + handler = xzalloc(sizeof(*handler)); + handler->devicefile = devicefile; + handler->num_devicefiles = num_devicefiles; + handler->bbu_handler.devicefile = devicefile[0]; + handler->bbu_handler.handler = nand_xloadslots_update_handler; + handler->bbu_handler.name = name; + + ret = bbu_register_handler(&handler->bbu_handler); + if (ret) + free(handler); + + return ret; +} diff --git a/arch/arm/mach-omap/am33xx_bbu_spi_mlo.c b/arch/arm/mach-omap/am33xx_bbu_spi_mlo.c index ff9f8a69a..8ac0a185c 100644 --- a/arch/arm/mach-omap/am33xx_bbu_spi_mlo.c +++ b/arch/arm/mach-omap/am33xx_bbu_spi_mlo.c @@ -32,6 +32,18 @@ static int spi_nor_mlo_handler(struct bbu_handler *handler, uint32_t readbuf; int size = data->len; void *image = data->image; + uint32_t *header; + int swap = 0; + + header = data->image; + if (header[5] == 0x43485345) { + swap = 0; + } else if (header[5] == 0x45534843) { + swap = 1; + } else { + if (!bbu_force(data, "Not a MLO image")) + return -EINVAL; + } dstfd = open(data->devicefile, O_WRONLY); if (dstfd < 0) { @@ -49,7 +61,8 @@ static int spi_nor_mlo_handler(struct bbu_handler *handler, for (; size >= 0; size -= 4) { memcpy((char *)&readbuf, image, 4); - readbuf = cpu_to_be32(readbuf); + if (swap) + readbuf = cpu_to_be32(readbuf); ret = write(dstfd, &readbuf, 4); if (ret < 0) { perror("write"); @@ -66,6 +79,41 @@ out: return ret; } +static int spi_nor_handler(struct bbu_handler *handler, + struct bbu_data *data) +{ + int fd, ret; + + if (file_detect_type(data->image, data->len) != filetype_arm_barebox) { + if (!bbu_force(data, "Not an ARM barebox image")) + return -EINVAL; + } + + fd = open(data->devicefile, O_RDWR | O_CREAT); + if (fd < 0) + return fd; + + debug("%s: eraseing %s from 0 to 0x%08x\n", __func__, + data->devicefile, data->len); + ret = erase(fd, data->len, 0); + if (ret) { + printf("erasing %s failed with %s\n", data->devicefile, + strerror(-ret)); + goto err_close; + } + + ret = write(fd, data->image, data->len); + if (ret < 0) + goto err_close; + + ret = 0; + +err_close: + close(fd); + + return ret; +} + /* * Register a am33xx MLO update handler for SPI NOR */ @@ -86,3 +134,24 @@ int am33xx_bbu_spi_nor_mlo_register_handler(const char *name, char *devicefile) return ret; } + +/* + * Register a am33xx update handler for SPI NOR + */ +int am33xx_bbu_spi_nor_register_handler(const char *name, char *devicefile) +{ + struct bbu_handler *handler; + int ret; + + handler = xzalloc(sizeof(*handler)); + handler->devicefile = devicefile; + handler->name = name; + handler->handler = spi_nor_handler; + + ret = bbu_register_handler(handler); + + if (ret) + free(handler); + + return ret; +} diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c index c22791883..1b53c064f 100644 --- a/arch/arm/mach-omap/am33xx_generic.c +++ b/arch/arm/mach-omap/am33xx_generic.c @@ -141,6 +141,12 @@ static int am33xx_bootsource(void) case 0x0b: src = BOOTSOURCE_SPI; break; + case 0x41: + src = BOOTSOURCE_SERIAL; + break; + case 0x44: + src = BOOTSOURCE_USB; + break; default: src = BOOTSOURCE_UNKNOWN; } @@ -220,22 +226,22 @@ int am33xx_devices_init(void) #define UART_RESET (0x1 << 1) #define UART_SMART_IDLE_EN (0x1 << 0x3) -void am33xx_uart0_soft_reset(void) +void am33xx_uart_soft_reset(void __iomem *uart_base) { int reg; - reg = readl(AM33XX_UART0_BASE + UART_SYSCFG_OFFSET); + reg = readl(uart_base + UART_SYSCFG_OFFSET); reg |= UART_RESET; - writel(reg, (AM33XX_UART0_BASE + UART_SYSCFG_OFFSET)); + writel(reg, (uart_base + UART_SYSCFG_OFFSET)); - while ((readl(AM33XX_UART0_BASE + UART_SYSSTS_OFFSET) & + while ((readl(uart_base + UART_SYSSTS_OFFSET) & UART_CLK_RUNNING_MASK) != UART_CLK_RUNNING_MASK) ; /* Disable smart idle */ - reg = readl((AM33XX_UART0_BASE + UART_SYSCFG_OFFSET)); + reg = readl((uart_base + UART_SYSCFG_OFFSET)); reg |= UART_SMART_IDLE_EN; - writel(reg, (AM33XX_UART0_BASE + UART_SYSCFG_OFFSET)); + writel(reg, (uart_base + UART_SYSCFG_OFFSET)); } diff --git a/arch/arm/mach-omap/include/mach/am33xx-generic.h b/arch/arm/mach-omap/include/mach/am33xx-generic.h index 8472d0730..75ac00aa5 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-generic.h +++ b/arch/arm/mach-omap/include/mach/am33xx-generic.h @@ -1,6 +1,7 @@ #ifndef __MACH_AM33XX_GENERIC_H #define __MACH_AM33XX_GENERIC_H +#include #include #include diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h index 16e665f2c..20b8e81c1 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h +++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h @@ -228,7 +228,7 @@ struct am33xx_ddr_data { u32 dll_lock_diff0; }; -void am33xx_uart0_soft_reset(void); +void am33xx_uart_soft_reset(void __iomem *uart_base); void am33xx_config_vtp(void); void am33xx_ddr_phydata_cmd_macro(const struct am33xx_cmd_control *cmd_ctrl); void am33xx_config_io_ctrl(int ioctrl); diff --git a/arch/arm/mach-omap/include/mach/bbu.h b/arch/arm/mach-omap/include/mach/bbu.h index 9556ad6b1..8c4c5e3eb 100644 --- a/arch/arm/mach-omap/include/mach/bbu.h +++ b/arch/arm/mach-omap/include/mach/bbu.h @@ -5,11 +5,30 @@ #ifdef CONFIG_BAREBOX_UPDATE_AM33XX_SPI_NOR_MLO int am33xx_bbu_spi_nor_mlo_register_handler(const char *name, char *devicefile); +int am33xx_bbu_spi_nor_register_handler(const char *name, char *devicefile); #else static inline int am33xx_bbu_spi_nor_mlo_register_handler(const char *name, char *devicefile) { return 0; } + +static inline int am33xx_bbu_spi_nor_register_handler(const char *name, char *devicefile) +{ + return 0; +} +#endif + +#ifdef CONFIG_BAREBOX_UPDATE_AM33XX_NAND_XLOADSLOTS +int am33xx_bbu_nand_xloadslots_register_handler(const char *name, + char **devicefile, + int num_devicefiles); +#else +static inline int am33xx_bbu_nand_xloadslots_register_handler(const char *name, + char **devicefile, + int num_devicefiles) +{ + return 0; +} #endif #endif diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c index 073a98f0c..c62288b16 100644 --- a/drivers/spi/omap3_spi.c +++ b/drivers/spi/omap3_spi.c @@ -106,8 +106,15 @@ int spi_claim_bus(struct spi_device *spi) /* standard 4-wire master mode: SCK, MOSI/out, MISO/in, nCS * REVISIT: this controller could support SPI_3WIRE mode. */ - conf &= ~(OMAP3_MCSPI_CHCONF_IS|OMAP3_MCSPI_CHCONF_DPE1); - conf |= OMAP3_MCSPI_CHCONF_DPE0; + if (omap3_master->swap_miso_mosi) { + /* swapped */ + conf |= (OMAP3_MCSPI_CHCONF_IS | OMAP3_MCSPI_CHCONF_DPE1); + conf &= ~OMAP3_MCSPI_CHCONF_DPE0; + } else { + /* bootloader default */ + conf &= ~(OMAP3_MCSPI_CHCONF_IS | OMAP3_MCSPI_CHCONF_DPE1); + conf |= OMAP3_MCSPI_CHCONF_DPE0; + } /* wordlength */ conf &= ~OMAP3_MCSPI_CHCONF_WL_MASK; @@ -343,6 +350,17 @@ static int omap3_spi_setup(struct spi_device *spi) return 0; } +static int omap3_spi_probe_dt(struct device_d *dev, struct omap3_spi_master *omap3_master) +{ + if (!IS_ENABLED(CONFIG_OFDEVICE) || !dev->device_node) + return -ENODEV; + + if (of_property_read_bool(dev->device_node, "ti,pindir-d0-out-d1-in")) + omap3_master->swap_miso_mosi = 1; + + return 0; +} + static int omap3_spi_probe(struct device_d *dev) { struct spi_master *master; @@ -356,6 +374,8 @@ static int omap3_spi_probe(struct device_d *dev) omap3_master = xzalloc(sizeof(*omap3_master)); + omap3_spi_probe_dt(dev, omap3_master); + master = &omap3_master->master; master->dev = dev; diff --git a/drivers/spi/omap3_spi.h b/drivers/spi/omap3_spi.h index ce4a29bed..6fd6bdac5 100644 --- a/drivers/spi/omap3_spi.h +++ b/drivers/spi/omap3_spi.h @@ -93,6 +93,7 @@ struct omap3_spi_master { * offset of 0x100 between start of register space * and registers */ + int swap_miso_mosi; }; #endif /* _OMAP3_SPI_H_ */ diff --git a/scripts/Makefile b/scripts/Makefile index 3908c1dcb..d8925da75 100644 --- a/scripts/Makefile +++ b/scripts/Makefile @@ -13,7 +13,7 @@ hostprogs-y += kernel-install hostprogs-$(CONFIG_KALLSYMS) += kallsyms hostprogs-$(CONFIG_ARCH_MVEBU) += kwbimage kwboot hostprogs-$(CONFIG_ARCH_NETX) += gen_netx_image -hostprogs-$(CONFIG_ARCH_OMAP) += omap_signGP mk-am35xx-spi-image +hostprogs-$(CONFIG_ARCH_OMAP) += omap_signGP mk-am3xxx-spi-image hostprogs-$(CONFIG_ARCH_S5PCxx) += s5p_cksum hostprogs-$(CONFIG_ARCH_DAVINCI) += mkublheader hostprogs-$(CONFIG_ARCH_ZYNQ) += zynq_mkimage diff --git a/scripts/mk-am35xx-spi-image.c b/scripts/mk-am3xxx-spi-image.c similarity index 77% rename from scripts/mk-am35xx-spi-image.c rename to scripts/mk-am3xxx-spi-image.c index 74e79dbee..dcb7060d2 100644 --- a/scripts/mk-am35xx-spi-image.c +++ b/scripts/mk-am3xxx-spi-image.c @@ -48,32 +48,66 @@ #include #include +enum soc { + SOC_AM33XX, + SOC_AM35XX, + SOC_UNKNOWN, +}; + +static char *soc_names[] = { + [SOC_AM33XX] = "am33xx", + [SOC_AM35XX] = "am35xx", +}; + void usage(char *prgname) { printf("usage: %s [OPTION] FILE > IMAGE\n" "\n" "options:\n" - " -a
memory address for the loaded image in SRAM\n", + " -a
memory address for the loaded image in SRAM\n" + " -s SoC to use (am33xx, am35xx)\n", prgname); } int main(int argc, char *argv[]) { FILE *input; - int opt; + int opt, i; off_t pos; size_t size; uint32_t addr = 0x40200000; uint32_t temp; + enum soc soc = SOC_UNKNOWN; + char *socname = NULL; - while((opt = getopt(argc, argv, "a:")) != -1) { + while((opt = getopt(argc, argv, "a:s:")) != -1) { switch (opt) { case 'a': addr = strtoul(optarg, NULL, 0); break; + case 's': + socname = optarg; + break; } } + if (!socname) { + fprintf(stderr, "SoC not specified. Use -s \n"); + exit(EXIT_FAILURE); + } + + for (i = 0; i < 2; i++) { + if (!strcmp(socname, soc_names[i])) { + soc = i; + break; + } + } + + if (soc == SOC_UNKNOWN) { + fprintf(stderr, "SoC %s unknown\n", socname); + exit(EXIT_FAILURE); + } + if (optind >= argc) { usage(argv[0]); exit(1); @@ -108,12 +142,14 @@ int main(int argc, char *argv[]) pos = (pos + 3) & ~3; /* image size */ - temp = htobe32((uint32_t)pos); - fwrite(&temp, sizeof(uint32_t), 1, stdout); + if (soc == SOC_AM35XX) { + temp = htobe32((uint32_t)pos); + fwrite(&temp, sizeof(uint32_t), 1, stdout); - /* memory address */ - temp = htobe32(addr); - fwrite(&temp, sizeof(uint32_t), 1, stdout); + /* memory address */ + temp = htobe32(addr); + fwrite(&temp, sizeof(uint32_t), 1, stdout); + } for (;;) { size = fread(&temp, 1, sizeof(uint32_t), input);