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tegra: pmc: work around power domain failure 

Sometimes a power domain didn't properly power up,
reading back the command register seems to fix this
by flushing the write.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Lucas Stach 2014-11-02 21:13:49 +01:00 committed by Sascha Hauer
parent 7d60a02034
commit 7cf0a3ea2b
1 changed files with 2 additions and 0 deletions
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2
arch/arm/mach-tegra/tegra20-pmc.c
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@ -53,6 +53,8 @@ static int tegra_powergate_set(int id, bool new_state)
}
writel(PMC_PWRGATE_TOGGLE_START | id, pmc_base + PMC_PWRGATE_TOGGLE);
/* I don't know exactly why this is needed, seems to flush the write */
readl(pmc_base + PMC_PWRGATE_TOGGLE);
return 0;
}