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pcm043: enable l2x0 cache 

Also, initialize the MMU in a postcore_initcall to enable
it earlier.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sascha Hauer 2010-03-30 11:07:43 +02:00
parent be00ed538c
commit 844ca16e1f
2 changed files with 10 additions and 8 deletions
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3
arch/arm/mach-imx/Kconfig
View File

@ -228,7 +228,8 @@ config MACH_PCM043
bool "phyCORE-i.MX35"
select HAS_CFI
select HAVE_MMU
select MACH_HAS_LOWLEVEL_INIT
select MACH_HAS_LOWLEVEL_INIT
select ARCH_HAS_L2X0
help
Say Y here if you are using Phytec's phyCORE-i.MX35 (pcm043) equipped
with a Freescale i.MX35 Processor

15
board/pcm043/pcm043.c
View File

@ -145,7 +145,7 @@ static struct device_d imx_ipu_fb_dev = {
};
#ifdef CONFIG_MMU
static void pcm043_mmu_init(void)
static int pcm043_mmu_init(void)
{
mmu_init();
@ -159,20 +159,21 @@ static void pcm043_mmu_init(void)
#else
arm_create_section(0x0, TEXT_BASE, 1, PMD_SECT_DEF_UNCACHED);
#endif
mmu_enable();
#ifdef CONFIG_CACHE_L2X0
l2x0_init((void __iomem *)0x30000000, 0x00030024, 0x00000000);
#endif
return 0;
}
#else
static void pcm043_mmu_init(void)
{
}
postcore_initcall(pcm043_mmu_init);
#endif
static int imx35_devices_init(void)
{
uint32_t reg;
pcm043_mmu_init();
/* CS0: Nor Flash */
writel(0x0000cf03, CSCR_U(0));
writel(0x10000d03, CSCR_L(0));