spi: mvebu: fix register macros for Armada 370/XP clock divider
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -43,8 +43,8 @@
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#define IF_TRANSFER_2BYTE BIT(5)
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#define IF_CLK_PRESCALE_POW2 BIT(4)
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#define IF_CLK_PRESCALE(x) ((x) & 0x0f)
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#define IF_CLK_PRE_PRESCALE(x) (((((x) & 0xc) << 1) | ((x) & 0x1)) << 4)
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#define IF_CLK_PRESCALE_MASK (IF_CLK_PRESCALE(7) | IF_CLK_PRE_PRESCALE(7))
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#define IF_CLK_PRE_PRESCALE(x) (((((x) & 0x6) << 6) | ((x) & 0x1)) << 4)
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#define IF_CLK_PRESCALE_MASK (IF_CLK_PRESCALE(0xf) | IF_CLK_PRE_PRESCALE(7))
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#define SPI_DATA_OUT 0x08
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#define SPI_DATA_IN 0x0c
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#define SPI_INT_CAUSE 0x10
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