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ARM: mvebu: armada-xp: Limit PUP access to Armada XP

Commit 6638760c22
 ("ARM: mvebu: Enable PUP register")
correctly enables devices that are disabled after boot-up due to
some Design For Testability registers.

However, although harmless on Armada 370, call the code conditionally
on Armada XP only. While at it, move PUP register defines to SYSCTL
registers where they belong to.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Sebastian Hesselbarth 2015-04-20 22:11:22 +02:00 committed by Sascha Hauer
parent f061acf442
commit 868d67b0f7
2 changed files with 15 additions and 6 deletions

View File

@ -112,6 +112,18 @@ static void __noreturn armada_370_xp_reset_cpu(unsigned long addr)
;
}
static int armada_xp_init_soc(struct device_node *root)
{
u32 reg;
/* Enable GBE0, GBE1, LCD and NFC PUP */
reg = readl(ARMADA_XP_PUP_ENABLE);
reg |= GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | NAND_PUP_EN | SPI_PUP_EN;
writel(reg, ARMADA_XP_PUP_ENABLE);
return 0;
}
static int armada_370_xp_init_soc(struct device_node *root, void *context)
{
unsigned long phys_base, phys_size;
@ -137,10 +149,8 @@ static int armada_370_xp_init_soc(struct device_node *root, void *context)
armada_370_xp_soc_id_fixup();
/* Enable peripherals PUP */
reg = readl(ARMADA_XP_PUP_ENABLE_BASE);
reg |= GE0_PUP_EN | GE1_PUP_EN | LCD_PUP_EN | NAND_PUP_EN | SPI_PUP_EN;
writel(reg, ARMADA_XP_PUP_ENABLE_BASE);
if (of_machine_is_compatible("marvell,armadaxp"))
armada_xp_init_soc(root);
return 0;
}

View File

@ -37,8 +37,7 @@
#define ARMADA_370_XP_SAR_HIGH (ARMADA_370_XP_SYSCTL_BASE + 0x034)
#define ARMADA_370_XP_CPU_SOC_ID (ARMADA_370_XP_SYSCTL_BASE + 0x03c)
#define CPU_SOC_ID_DEVICE_MASK 0xffff
#define ARMADA_XP_PUP_ENABLE_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x1864c)
#define ARMADA_XP_PUP_ENABLE (ARMADA_370_XP_SYSCTL_BASE + 0x44c)
#define GE0_PUP_EN BIT(0)
#define GE1_PUP_EN BIT(1)
#define LCD_PUP_EN BIT(2)