ARM i.MX27: move PCCR gate registers to its only user
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Sascha Hauer
parent
6a9d37e579
commit
86d9ed1cc5
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@ -27,6 +27,69 @@
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#define CCM_PMCOUNT 0x30
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#define CCM_WKGDCTL 0x34
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#define PCCR0_SSI2_EN (1 << 0)
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#define PCCR0_SSI1_EN (1 << 1)
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#define PCCR0_SLCDC_EN (1 << 2)
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#define PCCR0_SDHC3_EN (1 << 3)
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#define PCCR0_SDHC2_EN (1 << 4)
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#define PCCR0_SDHC1_EN (1 << 5)
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#define PCCR0_SDC_EN (1 << 6)
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#define PCCR0_SAHARA_EN (1 << 7)
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#define PCCR0_RTIC_EN (1 << 8)
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#define PCCR0_RTC_EN (1 << 9)
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#define PCCR0_PWM_EN (1 << 11)
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#define PCCR0_OWIRE_EN (1 << 12)
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#define PCCR0_MSHC_EN (1 << 13)
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#define PCCR0_LCDC_EN (1 << 14)
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#define PCCR0_KPP_EN (1 << 15)
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#define PCCR0_IIM_EN (1 << 16)
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#define PCCR0_I2C2_EN (1 << 17)
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#define PCCR0_I2C1_EN (1 << 18)
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#define PCCR0_GPT6_EN (1 << 19)
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#define PCCR0_GPT5_EN (1 << 20)
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#define PCCR0_GPT4_EN (1 << 21)
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#define PCCR0_GPT3_EN (1 << 22)
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#define PCCR0_GPT2_EN (1 << 23)
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#define PCCR0_GPT1_EN (1 << 24)
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#define PCCR0_GPIO_EN (1 << 25)
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#define PCCR0_FEC_EN (1 << 26)
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#define PCCR0_EMMA_EN (1 << 27)
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#define PCCR0_DMA_EN (1 << 28)
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#define PCCR0_CSPI3_EN (1 << 29)
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#define PCCR0_CSPI2_EN (1 << 30)
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#define PCCR0_CSPI1_EN (1 << 31)
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#define PCCR1_MSHC_BAUDEN (1 << 2)
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#define PCCR1_NFC_BAUDEN (1 << 3)
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#define PCCR1_SSI2_BAUDEN (1 << 4)
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#define PCCR1_SSI1_BAUDEN (1 << 5)
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#define PCCR1_H264_BAUDEN (1 << 6)
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#define PCCR1_PERCLK4_EN (1 << 7)
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#define PCCR1_PERCLK3_EN (1 << 8)
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#define PCCR1_PERCLK2_EN (1 << 9)
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#define PCCR1_PERCLK1_EN (1 << 10)
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#define PCCR1_HCLK_USB (1 << 11)
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#define PCCR1_HCLK_SLCDC (1 << 12)
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#define PCCR1_HCLK_SAHARA (1 << 13)
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#define PCCR1_HCLK_RTIC (1 << 14)
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#define PCCR1_HCLK_LCDC (1 << 15)
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#define PCCR1_HCLK_H264 (1 << 16)
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#define PCCR1_HCLK_FEC (1 << 17)
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#define PCCR1_HCLK_EMMA (1 << 18)
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#define PCCR1_HCLK_EMI (1 << 19)
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#define PCCR1_HCLK_DMA (1 << 20)
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#define PCCR1_HCLK_CSI (1 << 21)
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#define PCCR1_HCLK_BROM (1 << 22)
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#define PCCR1_HCLK_ATA (1 << 23)
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#define PCCR1_WDT_EN (1 << 24)
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#define PCCR1_USB_EN (1 << 25)
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#define PCCR1_UART6_EN (1 << 26)
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#define PCCR1_UART5_EN (1 << 27)
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#define PCCR1_UART4_EN (1 << 28)
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#define PCCR1_UART3_EN (1 << 29)
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#define PCCR1_UART2_EN (1 << 30)
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#define PCCR1_UART1_EN (1 << 31)
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enum mx27_clks {
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dummy, ckih, ckil, mpll, spll, mpll_main2, ahb, ipg, nfc_div, per1_div,
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per2_div, per3_div, per4_div, usb_div, cpu_sel, clko_sel, cpu_div, clko_div,
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@ -162,69 +162,6 @@
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#define MX27_MPCTL1_BRMO (1 << 6)
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#define MX27_MPCTL1_LF (1 << 15)
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#define PCCR0_SSI2_EN (1 << 0)
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#define PCCR0_SSI1_EN (1 << 1)
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#define PCCR0_SLCDC_EN (1 << 2)
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#define PCCR0_SDHC3_EN (1 << 3)
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#define PCCR0_SDHC2_EN (1 << 4)
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#define PCCR0_SDHC1_EN (1 << 5)
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#define PCCR0_SDC_EN (1 << 6)
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#define PCCR0_SAHARA_EN (1 << 7)
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#define PCCR0_RTIC_EN (1 << 8)
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#define PCCR0_RTC_EN (1 << 9)
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#define PCCR0_PWM_EN (1 << 11)
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#define PCCR0_OWIRE_EN (1 << 12)
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#define PCCR0_MSHC_EN (1 << 13)
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#define PCCR0_LCDC_EN (1 << 14)
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#define PCCR0_KPP_EN (1 << 15)
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#define PCCR0_IIM_EN (1 << 16)
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#define PCCR0_I2C2_EN (1 << 17)
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#define PCCR0_I2C1_EN (1 << 18)
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#define PCCR0_GPT6_EN (1 << 19)
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#define PCCR0_GPT5_EN (1 << 20)
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#define PCCR0_GPT4_EN (1 << 21)
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#define PCCR0_GPT3_EN (1 << 22)
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#define PCCR0_GPT2_EN (1 << 23)
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#define PCCR0_GPT1_EN (1 << 24)
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#define PCCR0_GPIO_EN (1 << 25)
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#define PCCR0_FEC_EN (1 << 26)
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#define PCCR0_EMMA_EN (1 << 27)
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#define PCCR0_DMA_EN (1 << 28)
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#define PCCR0_CSPI3_EN (1 << 29)
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#define PCCR0_CSPI2_EN (1 << 30)
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#define PCCR0_CSPI1_EN (1 << 31)
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#define PCCR1_MSHC_BAUDEN (1 << 2)
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#define PCCR1_NFC_BAUDEN (1 << 3)
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#define PCCR1_SSI2_BAUDEN (1 << 4)
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#define PCCR1_SSI1_BAUDEN (1 << 5)
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#define PCCR1_H264_BAUDEN (1 << 6)
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#define PCCR1_PERCLK4_EN (1 << 7)
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#define PCCR1_PERCLK3_EN (1 << 8)
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#define PCCR1_PERCLK2_EN (1 << 9)
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#define PCCR1_PERCLK1_EN (1 << 10)
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#define PCCR1_HCLK_USB (1 << 11)
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#define PCCR1_HCLK_SLCDC (1 << 12)
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#define PCCR1_HCLK_SAHARA (1 << 13)
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#define PCCR1_HCLK_RTIC (1 << 14)
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#define PCCR1_HCLK_LCDC (1 << 15)
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#define PCCR1_HCLK_H264 (1 << 16)
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#define PCCR1_HCLK_FEC (1 << 17)
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#define PCCR1_HCLK_EMMA (1 << 18)
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#define PCCR1_HCLK_EMI (1 << 19)
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#define PCCR1_HCLK_DMA (1 << 20)
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#define PCCR1_HCLK_CSI (1 << 21)
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#define PCCR1_HCLK_BROM (1 << 22)
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#define PCCR1_HCLK_ATA (1 << 23)
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#define PCCR1_WDT_EN (1 << 24)
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#define PCCR1_USB_EN (1 << 25)
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#define PCCR1_UART6_EN (1 << 26)
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#define PCCR1_UART5_EN (1 << 27)
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#define PCCR1_UART4_EN (1 << 28)
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#define PCCR1_UART3_EN (1 << 29)
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#define PCCR1_UART2_EN (1 << 30)
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#define PCCR1_UART1_EN (1 << 31)
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/* SDRAM Controller registers bitfields */
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#define ESDCTL_PRCT(x) (((x) & 3f) << 0)
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#define ESDCTL_BL (1 << 7)
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