9
0
Fork 0

MACH SAMSUNG/S3C: Prepare watchdog unit to be shared in the S3C family

Signed-off-by: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Juergen Beisert 2012-01-02 12:43:59 +01:00 committed by Sascha Hauer
parent f937e19dc1
commit 88200bfb33
3 changed files with 9 additions and 10 deletions

View File

@ -76,16 +76,20 @@ uint32_t s3c24x0_get_memory_size(void)
return size;
}
#define S3C_WTCON (S3C_WATCHDOG_BASE)
#define S3C_WTDAT (S3C_WATCHDOG_BASE + 0x04)
#define S3C_WTCNT (S3C_WATCHDOG_BASE + 0x08)
void __noreturn reset_cpu(unsigned long addr)
{
/* Disable watchdog */
writew(0x0000, WTCON);
writew(0x0000, S3C_WTCON);
/* Initialize watchdog timer count register */
writew(0x0001, WTCNT);
writew(0x0001, S3C_WTCNT);
/* Enable watchdog timer; assert reset at timer timeout */
writew(0x0021, WTCON);
writew(0x0021, S3C_WTCON);
/* loop forever and wait for reset to happen */
while(1)

View File

@ -31,7 +31,7 @@
#define S3C24X0_UART_BASE 0x50000000
#define S3C_TIMER_BASE 0x51000000
#define S3C2410_USB_DEVICE_BASE 0x52000140
#define S3C24X0_WATCHDOG_BASE 0x53000000
#define S3C_WATCHDOG_BASE 0x53000000
#define S3C2410_I2C_BASE 0x54000000
#define S3C2410_I2S_BASE 0x55000000
#define S3C24X0_GPIO_BASE 0x56000000
@ -41,11 +41,6 @@
#define S3C2410_SDI_BASE 0x5A000000
/* Watchdog (direct access) */
#define WTCON (S3C24X0_WATCHDOG_BASE)
#define WTDAT (S3C24X0_WATCHDOG_BASE + 0x04)
#define WTCNT (S3C24X0_WATCHDOG_BASE + 0x08)
/*
* if we are booting from NAND, its internal SRAM occures at
* a different address than without this feature

View File

@ -29,7 +29,7 @@
.globl s3c24x0_disable_wd
s3c24x0_disable_wd:
ldr r0, =S3C24X0_WATCHDOG_BASE
ldr r0, =S3C_WATCHDOG_BASE
mov r1, #0x0
str r1, [r0]
mov pc, lr