From 8aabd884160ec23724cde79cc4a66b4e54c79460 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Tue, 10 Apr 2012 23:44:09 +0400 Subject: [PATCH] Rename remainings structs and functions from mc13892_ to mc13xxx_ Signed-off-by: Alexander Shiyan Signed-off-by: Sascha Hauer --- .../boards/freescale-mx35-3-stack/3stack.c | 26 ++++---- arch/arm/boards/freescale-mx51-pdk/board.c | 66 +++++++++---------- drivers/mfd/mc13xxx.c | 66 +++++++++---------- include/mfd/mc13xxx.h | 14 ++-- 4 files changed, 86 insertions(+), 86 deletions(-) diff --git a/arch/arm/boards/freescale-mx35-3-stack/3stack.c b/arch/arm/boards/freescale-mx35-3-stack/3stack.c index fa6be1a1e..a76f09f20 100644 --- a/arch/arm/boards/freescale-mx35-3-stack/3stack.c +++ b/arch/arm/boards/freescale-mx35-3-stack/3stack.c @@ -353,33 +353,33 @@ static int f3s_core_init(void) core_initcall(f3s_core_init); -static int f3s_get_rev(struct mc13892 *mc13892) +static int f3s_get_rev(struct mc13xxx *mc13xxx) { u32 rev; int err; - err = mc13892_reg_read(mc13892, MC13892_REG_IDENTIFICATION, &rev); + err = mc13xxx_reg_read(mc13xxx, MC13892_REG_IDENTIFICATION, &rev); if (err) return err; - dev_info(&mc13892->client->dev, "revision: 0x%x\n", rev); + dev_info(&mc13xxx->client->dev, "revision: 0x%x\n", rev); if (rev == 0x00ffffff) return -ENODEV; return ((rev >> 6) & 0x7) ? MX35PDK_BOARD_REV_2 : MX35PDK_BOARD_REV_1; } -static int f3s_pmic_init_v2(struct mc13892 *mc13892) +static int f3s_pmic_init_v2(struct mc13xxx *mc13xxx) { int err = 0; /* COMPARE pin (GPIO1_5) as output and set high */ gpio_direction_output( 32*0 + 5 , 1); - err |= mc13892_set_bits(mc13892, MC13892_REG_SETTING_0, 0x03, 0x03); - err |= mc13892_set_bits(mc13892, MC13892_REG_MODE_0, 0x01, 0x01); + err |= mc13xxx_set_bits(mc13xxx, MC13892_REG_SETTING_0, 0x03, 0x03); + err |= mc13xxx_set_bits(mc13xxx, MC13892_REG_MODE_0, 0x01, 0x01); if (err) - dev_err(&mc13892->client->dev, + dev_err(&mc13xxx->client->dev, "Init sequence failed, the system might not be working!\n"); return err; @@ -404,22 +404,22 @@ static int f3s_pmic_init_all(struct mc9sdz60 *mc9sdz60) static int f3s_pmic_init(void) { - struct mc13892 *mc13892; + struct mc13xxx *mc13xxx; struct mc9sdz60 *mc9sdz60; int rev; - mc13892 = mc13892_get(); - if (!mc13892) { - printf("FAILED to get mc13xxx handle!\n"); + mc13xxx = mc13xxx_get(); + if (!mc13xxx) { + printf("FAILED to get PMIC handle!\n"); return 0; } - rev = f3s_get_rev(mc13892); + rev = f3s_get_rev(mc13xxx); switch (rev) { case MX35PDK_BOARD_REV_1: break; case MX35PDK_BOARD_REV_2: - f3s_pmic_init_v2(mc13892); + f3s_pmic_init_v2(mc13xxx); break; default: printf("FAILED to identify board revision!\n"); diff --git a/arch/arm/boards/freescale-mx51-pdk/board.c b/arch/arm/boards/freescale-mx51-pdk/board.c index c616a8718..63c89b76e 100644 --- a/arch/arm/boards/freescale-mx51-pdk/board.c +++ b/arch/arm/boards/freescale-mx51-pdk/board.c @@ -121,101 +121,101 @@ static const struct spi_board_info mx51_babbage_spi_board_info[] = { static void babbage_power_init(void) { - struct mc13892 *mc13892; + struct mc13xxx *mc13xxx; u32 val; - mc13892 = mc13892_get(); - if (!mc13892) { - printf("could not get mc13892\n"); + mc13xxx = mc13xxx_get(); + if (!mc13xxx) { + printf("could not get PMIC\n"); return; } /* Write needed to Power Gate 2 register */ - mc13892_reg_read(mc13892, MC13892_REG_POWER_MISC, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_POWER_MISC, &val); val &= ~0x10000; - mc13892_reg_write(mc13892, MC13892_REG_POWER_MISC, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, val); /* Write needed to update Charger 0 */ - mc13892_reg_write(mc13892, MC13892_REG_CHARGE, 0x0023807F); + mc13xxx_reg_write(mc13xxx, MC13892_REG_CHARGE, 0x0023807F); /* power up the system first */ - mc13892_reg_write(mc13892, MC13892_REG_POWER_MISC, 0x00200000); + mc13xxx_reg_write(mc13xxx, MC13892_REG_POWER_MISC, 0x00200000); if (imx_silicon_revision() < MX51_CHIP_REV_3_0) { /* Set core voltage to 1.1V */ - mc13892_reg_read(mc13892, MC13892_REG_SW_0, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_0, &val); val &= ~0x1f; val |= 0x14; - mc13892_reg_write(mc13892, MC13892_REG_SW_0, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_0, val); /* Setup VCC (SW2) to 1.25 */ - mc13892_reg_read(mc13892, MC13892_REG_SW_1, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val); val &= ~0x1f; val |= 0x1a; - mc13892_reg_write(mc13892, MC13892_REG_SW_1, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val); /* Setup 1V2_DIG1 (SW3) to 1.25 */ - mc13892_reg_read(mc13892, MC13892_REG_SW_2, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val); val &= ~0x1f; val |= 0x1a; - mc13892_reg_write(mc13892, MC13892_REG_SW_2, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val); } else { /* Setup VCC (SW2) to 1.225 */ - mc13892_reg_read(mc13892, MC13892_REG_SW_1, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_1, &val); val &= ~0x1f; val |= 0x19; - mc13892_reg_write(mc13892, MC13892_REG_SW_1, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_1, val); /* Setup 1V2_DIG1 (SW3) to 1.2 */ - mc13892_reg_read(mc13892, MC13892_REG_SW_2, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_2, &val); val &= ~0x1f; val |= 0x18; - mc13892_reg_write(mc13892, MC13892_REG_SW_2, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_2, val); } - if (mc13892_get_revision(mc13892) < MC13892_REVISION_2_0) { + if (mc13xxx_get_revision(mc13xxx) < MC13892_REVISION_2_0) { /* Set switchers in PWM mode for Atlas 2.0 and lower */ /* Setup the switcher mode for SW1 & SW2*/ - mc13892_reg_read(mc13892, MC13892_REG_SW_4, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val); val &= ~0x3c0f; val |= 0x1405; - mc13892_reg_write(mc13892, MC13892_REG_SW_4, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val); /* Setup the switcher mode for SW3 & SW4 */ - mc13892_reg_read(mc13892, MC13892_REG_SW_5, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val); val &= ~0xf0f; val |= 0x505; - mc13892_reg_write(mc13892, MC13892_REG_SW_5, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val); } else { /* Set switchers in Auto in NORMAL mode & STANDBY mode for Atlas 2.0a */ /* Setup the switcher mode for SW1 & SW2*/ - mc13892_reg_read(mc13892, MC13892_REG_SW_4, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_4, &val); val &= ~0x3c0f; val |= 0x2008; - mc13892_reg_write(mc13892, MC13892_REG_SW_4, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_4, val); /* Setup the switcher mode for SW3 & SW4 */ - mc13892_reg_read(mc13892, MC13892_REG_SW_5, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SW_5, &val); val &= ~0xf0f; val |= 0x808; - mc13892_reg_write(mc13892, MC13892_REG_SW_5, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SW_5, val); } /* Set VDIG to 1.65V, VGEN3 to 1.8V, VCAM to 2.5V */ - mc13892_reg_read(mc13892, MC13892_REG_SETTING_0, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_0, &val); val &= ~0x34030; val |= 0x10020; - mc13892_reg_write(mc13892, MC13892_REG_SETTING_0, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_0, val); /* Set VVIDEO to 2.775V, VAUDIO to 3V, VSD to 3.15V */ - mc13892_reg_read(mc13892, MC13892_REG_SETTING_1, &val); + mc13xxx_reg_read(mc13xxx, MC13892_REG_SETTING_1, &val); val &= ~0x1FC; val |= 0x1F4; - mc13892_reg_write(mc13892, MC13892_REG_SETTING_1, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_SETTING_1, val); /* Configure VGEN3 and VCAM regulators to use external PNP */ val = 0x208; - mc13892_reg_write(mc13892, MC13892_REG_MODE_1, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val); udelay(200); #define GPIO_LAN8700_RESET (1 * 32 + 14) @@ -224,7 +224,7 @@ static void babbage_power_init(void) /* Enable VGEN3, VCAM, VAUDIO, VVIDEO, VSD regulators */ val = 0x49249; - mc13892_reg_write(mc13892, MC13892_REG_MODE_1, val); + mc13xxx_reg_write(mc13xxx, MC13892_REG_MODE_1, val); udelay(500); diff --git a/drivers/mfd/mc13xxx.c b/drivers/mfd/mc13xxx.c index 23e732274..6802c12e4 100644 --- a/drivers/mfd/mc13xxx.c +++ b/drivers/mfd/mc13xxx.c @@ -32,18 +32,18 @@ #define DRIVERNAME "mc13xxx" -#define to_mc13892(a) container_of(a, struct mc13892, cdev) +#define to_mc13xxx(a) container_of(a, struct mc13xxx, cdev) -static struct mc13892 *mc_dev; +static struct mc13xxx *mc_dev; -struct mc13892 *mc13892_get(void) +struct mc13xxx *mc13xxx_get(void) { if (!mc_dev) return NULL; return mc_dev; } -EXPORT_SYMBOL(mc13892_get); +EXPORT_SYMBOL(mc13xxx_get); #ifdef CONFIG_SPI static int spi_rw(struct spi_device *spi, void * buf, size_t len) @@ -70,42 +70,42 @@ static int spi_rw(struct spi_device *spi, void * buf, size_t len) #define MXC_PMIC_REG_NUM(reg) (((reg) & 0x3f) << 25) #define MXC_PMIC_WRITE (1 << 31) -static int mc13892_spi_reg_read(struct mc13892 *mc13892, u8 reg, u32 *val) +static int mc13xxx_spi_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val) { uint32_t buf; buf = MXC_PMIC_REG_NUM(reg); - spi_rw(mc13892->spi, &buf, 4); + spi_rw(mc13xxx->spi, &buf, 4); *val = buf; return 0; } -static int mc13892_spi_reg_write(struct mc13892 *mc13892, u8 reg, u32 val) +static int mc13xxx_spi_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val) { uint32_t buf = MXC_PMIC_REG_NUM(reg) | MXC_PMIC_WRITE | (val & 0xffffff); - spi_rw(mc13892->spi, &buf, 4); + spi_rw(mc13xxx->spi, &buf, 4); return 0; } #endif #ifdef CONFIG_I2C -static int mc13892_i2c_reg_read(struct mc13892 *mc13892, u8 reg, u32 *val) +static int mc13xxx_i2c_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val) { u8 buf[3]; int ret; - ret = i2c_read_reg(mc13892->client, reg, buf, 3); + ret = i2c_read_reg(mc13xxx->client, reg, buf, 3); *val = buf[0] << 16 | buf[1] << 8 | buf[2] << 0; return ret == 3 ? 0 : ret; } -static int mc13892_i2c_reg_write(struct mc13892 *mc13892, u8 reg, u32 val) +static int mc13xxx_i2c_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val) { u8 buf[] = { val >> 16, @@ -114,58 +114,58 @@ static int mc13892_i2c_reg_write(struct mc13892 *mc13892, u8 reg, u32 val) }; int ret; - ret = i2c_write_reg(mc13892->client, reg, buf, 3); + ret = i2c_write_reg(mc13xxx->client, reg, buf, 3); return ret == 3 ? 0 : ret; } #endif -int mc13892_reg_write(struct mc13892 *mc13892, u8 reg, u32 val) +int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val) { #ifdef CONFIG_I2C if (mc13xxx->mode == MC13XXX_MODE_I2C) - return mc13892_i2c_reg_write(mc13892, reg, val); + return mc13xxx_i2c_reg_write(mc13xxx, reg, val); #endif #ifdef CONFIG_SPI if (mc13xxx->mode == MC13XXX_MODE_SPI) - return mc13892_spi_reg_write(mc13892, reg, val); + return mc13xxx_spi_reg_write(mc13xxx, reg, val); #endif return -EINVAL; } -EXPORT_SYMBOL(mc13892_reg_write); +EXPORT_SYMBOL(mc13xxx_reg_write); -int mc13892_reg_read(struct mc13892 *mc13892, u8 reg, u32 *val) +int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val) { #ifdef CONFIG_I2C if (mc13xxx->mode == MC13XXX_MODE_I2C) - return mc13892_i2c_reg_read(mc13892, reg, val); + return mc13xxx_i2c_reg_read(mc13xxx, reg, val); #endif #ifdef CONFIG_SPI if (mc13xxx->mode == MC13XXX_MODE_SPI) - return mc13892_spi_reg_read(mc13892, reg, val); + return mc13xxx_spi_reg_read(mc13xxx, reg, val); #endif return -EINVAL; } -EXPORT_SYMBOL(mc13892_reg_read); +EXPORT_SYMBOL(mc13xxx_reg_read); -int mc13892_set_bits(struct mc13892 *mc13892, u8 reg, u32 mask, u32 val) +int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val) { u32 tmp; int err; - err = mc13892_reg_read(mc13892, reg, &tmp); + err = mc13xxx_reg_read(mc13xxx, reg, &tmp); tmp = (tmp & ~mask) | val; if (!err) - err = mc13892_reg_write(mc13892, reg, tmp); + err = mc13xxx_reg_write(mc13xxx, reg, tmp); return err; } -EXPORT_SYMBOL(mc13892_set_bits); +EXPORT_SYMBOL(mc13xxx_set_bits); static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset, ulong flags) { - struct mc13892 *priv = to_mc13892(cdev); + struct mc13xxx *priv = to_mc13xxx(cdev); u32 *buf = _buf; size_t i = count >> 2; int err; @@ -173,7 +173,7 @@ static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset offset >>= 2; while (i) { - err = mc13892_reg_read(priv, offset, buf); + err = mc13xxx_reg_read(priv, offset, buf); if (err) return (ssize_t)err; buf++; @@ -186,7 +186,7 @@ static ssize_t mc_read(struct cdev *cdev, void *_buf, size_t count, ulong offset static ssize_t mc_write(struct cdev *cdev, const void *_buf, size_t count, ulong offset, ulong flags) { - struct mc13892 *mc13892 = to_mc13892(cdev); + struct mc13xxx *mc13xxx = to_mc13xxx(cdev); const u32 *buf = _buf; size_t i = count >> 2; int err; @@ -194,7 +194,7 @@ static ssize_t mc_write(struct cdev *cdev, const void *_buf, size_t count, ulong offset >>= 2; while (i) { - err = mc13892_reg_write(mc13892, offset, *buf); + err = mc13xxx_reg_write(mc13xxx, offset, *buf); if (err) return (ssize_t)err; buf++; @@ -231,13 +231,13 @@ static struct mc13892_rev mc13892_revisions[] = { { 0x1d, MC13892_REVISION_3_5, "3.5" }, }; -static int mc13893_query_revision(struct mc13892 *mc13892) +static int mc13xxx_query_revision(struct mc13xxx *mc13xxx) { unsigned int rev_id; char *revstr; int rev, i; - mc13892_reg_read(mc13892, MC13892_REG_IDENTIFICATION, &rev_id); + mc13xxx_reg_read(mc13xxx, MC13892_REG_IDENTIFICATION, &rev_id); for (i = 0; i < ARRAY_SIZE(mc13892_revisions); i++) if ((rev_id & 0x1f) == mc13892_revisions[i].rev_id) @@ -259,7 +259,7 @@ static int mc13893_query_revision(struct mc13892 *mc13892) dev_info(mc_dev->cdev.dev, "PMIC ID: 0x%08x [Rev: %s]\n", rev_id, revstr); - mc13892->revision = rev; + mc13xxx->revision = rev; return rev; } @@ -271,7 +271,7 @@ static int mc_probe(struct device_d *dev, enum mc13xxx_mode mode) if (mc_dev) return -EBUSY; - mc_dev = xzalloc(sizeof(struct mc13892)); + mc_dev = xzalloc(sizeof(struct mc13xxx)); mc_dev->mode = mode; mc_dev->cdev.name = DRIVERNAME; if (mode == MC13XXX_MODE_I2C) { @@ -286,7 +286,7 @@ static int mc_probe(struct device_d *dev, enum mc13xxx_mode mode) mc_dev->cdev.dev = dev; mc_dev->cdev.ops = &mc_fops; - rev = mc13893_query_revision(mc_dev); + rev = mc13xxx_query_revision(mc_dev); if (rev < 0) { free(mc_dev); return -EINVAL; diff --git a/include/mfd/mc13xxx.h b/include/mfd/mc13xxx.h index f9b55852e..2951b20a5 100644 --- a/include/mfd/mc13xxx.h +++ b/include/mfd/mc13xxx.h @@ -95,7 +95,7 @@ enum mc13xxx_mode { MC13XXX_MODE_SPI, }; -struct mc13892 { +struct mc13xxx { struct cdev cdev; struct i2c_client *client; struct spi_device *spi; @@ -103,15 +103,15 @@ struct mc13892 { int revision; }; -extern struct mc13892 *mc13892_get(void); +extern struct mc13xxx *mc13xxx_get(void); -extern int mc13892_reg_read(struct mc13892 *mc13892, u8 reg, u32 *val); -extern int mc13892_reg_write(struct mc13892 *mc13892, u8 reg, u32 val); -extern int mc13892_set_bits(struct mc13892 *mc13892, u8 reg, u32 mask, u32 val); +extern int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val); +extern int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val); +extern int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val); -static inline int mc13892_get_revision(struct mc13892 *mc13892) +static inline int mc13xxx_get_revision(struct mc13xxx *mc13xxx) { - return mc13892->revision; + return mc13xxx->revision; } #endif /* __MFD_MC13XXX_H */