Code cleanup. Update CHANGELOG.
This commit is contained in:
parent
726e90aacf
commit
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165
CHANGELOG
165
CHANGELOG
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@ -1,3 +1,85 @@
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commit 726e90aacf0b1ecb0e7055be574622fbe3e450ba
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Author: Grant Likely <grant.likely@secretlab.ca>
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Date: Wed Nov 29 16:23:42 2006 +0100
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[PATCH] [MPC52xx] Use IPB bus frequency for SOC peripherals
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The soc node of the mpc52xx needs to be loaded with the IPB bus frequency,
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not the XLB frequency.
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This patch depends on the previous patches for MPC52xx device tree support
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Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
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commit 1eac2a71417b6675b11aace72102a2e7fde8f5c6
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Author: Stefan Roese <sr@denx.de>
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Date: Wed Nov 29 15:42:37 2006 +0100
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[PATCH] Add support for Prodrive P3M750 & P3M7448 (P3Mx) boards
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This patch adds support for the Prodrive P3M750 (PPC750 & MV64460)
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and the P3M7448 (MPC7448 & MV64460) PMC modules. Both modules are
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quite similar and share the same board directory "prodrive/p3mx"
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and the same config file "p3mx.h".
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 1bdd46832aeb569f5e04b1f20f64318525b6525a
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Author: Stefan Roese <sr@denx.de>
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Date: Wed Nov 29 12:53:15 2006 +0100
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[PATCH] common/cmd_elf.c: Enable loadaddr as parameter in bootvx command
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In the bootvx command the load address was only read from the env
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variable "loadaddr" and not optionally passed as paramter as described
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in the help. This is fixed with this patch. The behaviour is now the
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same as in the bootelf command.
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 4e26f1074c3ac1bd8fd094f0dc4a1c4a0b15a592
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Author: Stefan Roese <sr@denx.de>
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Date: Wed Nov 29 12:03:57 2006 +0100
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[PATCH] include/ppc440.h minor error affecting interrupts
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Fixed include/ppc440.c for UIC address Bug
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Corrects bug affecting the addresses for the universal interrupt
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controller UIC2 and UIC3 on the PPC440 Epx, GRx, and SPE chips.
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Signed-off-by: Jeff Mann <mannj@embeddedplanet.com>
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit e59581c56ab5d6e0207ddac3b2c1d55cb36ec706
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Nov 28 17:55:49 2006 +0100
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[PATCH] Enable the IceCube/lite5200 variants to pass a device tree to Linux.
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This patch adds the code and configuration necessary to boot with an
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arch/powerpc Linux kernel.
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Signed-off-by: Grant Likely <grant.likely@gmail.com>
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Acked-by: Jon Loeliger <jdl@freescale.com>
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commit e732faec95a83cb468b4850ae807c8301dde8f6a
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Nov 28 16:09:24 2006 +0100
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[PATCH] PPC4xx: 440SP Rev. C detection added
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit e7f3e9ff01fbd7fa72eb42a9675fbed6bc4736b0
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Nov 28 11:04:45 2006 +0100
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[PATCH] nand: Fix patch merge problem
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 4f4b602ec7524a032bdf3c6d28c7f525a4a67eaa
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Author: Wolfgang Denk <wd@pollux.denx.de>
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Date: Mon Nov 27 22:53:53 2006 +0100
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@ -67,6 +149,46 @@ Date: Mon Nov 27 15:32:42 2006 +0100
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Minor code cleanup. Update CHANGELOG.
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commit 1729b92cde575476684bffe819d0b7791b57bff2
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:52:04 2006 +0100
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[PATCH] 4xx: Fix problem with board specific reset code (now for real)
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit cc5ee8a92a0e3ca6f727af71b8fd206460c7afd7
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:49:51 2006 +0100
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[PATCH] alpr: remove unused board specific flash driver
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 1f94d162e2b5f0edc28d9fb11482502c44d218e1
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:48:41 2006 +0100
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[PATCH] 4xx: Fix problem with board specific reset code
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit ec0c2ec725aec9524a177a77ce75559e644a931a
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:46:06 2006 +0100
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[PATCH] Remove testing 4xx enet PHY setup
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 1c2ce2262069510f31c7d3fd7efd3d58b8c0c148
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Author: Stefan Roese <sr@denx.de>
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Date: Mon Nov 27 14:12:17 2006 +0100
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[PATCH] Update Prodrive ALPR board support (440GX)
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Signed-off-by: Stefan Roese <sr@denx.de>
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commit 78d620ebb5871d252270dedfad60c6568993b780
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Author: Wolfgang Denk <wd@atlas.denx.de>
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Date: Thu Nov 23 22:58:58 2006 +0100
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@ -641,6 +763,34 @@ Date: Tue Oct 10 17:02:22 2006 -0500
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Fix whitespace and 80-col issues.
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commit 5c912cb1c31266c66ca59b36f9b6f87296421d75
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Author: Stefan Roese <sr@denx.de>
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Date: Sat Oct 7 11:36:51 2006 +0200
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CFG_NAND_QUIET_TEST added to not warn upon missing NAND device
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Patch by Stefan Roese, 07 Oct 2006
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commit 5bc528fa4da751d472397b308137238a6465afd2
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Author: Stefan Roese <sr@denx.de>
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Date: Sat Oct 7 11:35:25 2006 +0200
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Update ALPR code (NAND support working now)
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Patch by Stefan Roese, 07 Oct 2006
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commit 77d5034847d328753b80c46b83f960a14a26f40e
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Author: Stefan Roese <sr@denx.de>
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Date: Sat Oct 7 11:33:03 2006 +0200
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Remove compile warnings in fpga code
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Patch by Stefan Roese, 07 Oct 2006
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commit f3443867e90d2979a7dd1c65b0d537777e1f9850
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Author: Stefan Roese <sr@denx.de>
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Date: Sat Oct 7 11:30:52 2006 +0200
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Add CONFIG_BOARD_RESET to configure board specific reset function
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Patch by Stefan Roese, 07 Oct 2006
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commit f55df18187e7a45cb73fec4370d12135e6691ae1
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Author: John Traill <john.traill@freescale.com>
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Date: Fri Sep 29 08:23:12 2006 +0100
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@ -873,6 +1023,21 @@ Date: Wed Aug 16 10:54:09 2006 -0500
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Signed-off-by: Matthew McClintock <msm@freescale.com>
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commit 899620c2d66d4eef3b2a0034d062e71d45d886c9
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Aug 15 14:22:35 2006 +0200
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Add initial support for the ALPR board from Prodrive
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NAND needs some additional testing
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Patch by Heiko Schocher, 15 Aug 2006
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commit f0ff4692ff3372dec55074a8eb444943ab095abb
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Author: Stefan Roese <sr@denx.de>
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Date: Tue Aug 15 14:15:51 2006 +0200
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Add FPGA Altera Cyclone 2 support
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Patch by Heiko Schocher, 15 Aug 2006
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commit fecf1c7e4de1b2779edc18742b91c22bdc32b68b
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Author: Jon Loeliger <jdl@freescale.com>
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Date: Mon Aug 14 15:33:38 2006 -0500
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@ -56,18 +56,13 @@
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#undef MV64460_CHECKSUM_OFFLOAD
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/*************************************************************************
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**************************************************************************
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**************************************************************************
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* The first part is the high level driver of the gigE ethernet ports. *
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**************************************************************************
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**************************************************************************
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*************************************************************************/
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/* Definition for configuring driver */
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/* #define UPDATE_STATS_BY_SOFTWARE */
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#undef MV64460_RX_QUEUE_FILL_ON_TASK
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/* Constants */
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#define MAGIC_ETH_RUNNING 8031971
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#define MV64460_INTERNAL_SRAM_SIZE _256K
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@ -141,8 +136,10 @@ void print_globals (struct eth_device *dev)
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printf ("GT Internal Base Address: %08x\n",
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INTERNAL_REG_BASE_ADDR);
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printf ("Base Address for TX-DESCs: %08x Number of allocated Buffers %d\n", (unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_tx_desc_area_base[0], MV64460_TX_QUEUE_SIZE);
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printf ("Base Address for RX-DESCs: %08x Number of allocated Buffers %d\n", (unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_rx_desc_area_base[0], MV64460_RX_QUEUE_SIZE);
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printf ("Base Address for TX-DESCs: %08x Number of allocated Buffers %d\n",
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(unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_tx_desc_area_base[0], MV64460_TX_QUEUE_SIZE);
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printf ("Base Address for RX-DESCs: %08x Number of allocated Buffers %d\n",
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(unsigned int) ((ETH_PORT_INFO *) dev->priv)->p_rx_desc_area_base[0], MV64460_RX_QUEUE_SIZE);
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printf ("Base Address for RX-Buffer: %08x allocated Bytes %d\n",
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(unsigned int) ((ETH_PORT_INFO *) dev->priv)->
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p_rx_buffer_base[0],
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@ -154,8 +151,6 @@ void print_globals (struct eth_device *dev)
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}
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#endif
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/**********************************************************************
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* mv64460_eth_print_phy_status
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*
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@ -221,84 +216,37 @@ void db64460_eth_disable (struct eth_device *dev)
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mv64460_eth_stop (dev);
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}
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#define DFCDL(write,read) ((write << 6) | read)
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unsigned int ethDfcdls[] = { DFCDL(0,0),
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DFCDL(1,1),
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DFCDL(2,2),
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DFCDL(3,3),
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DFCDL(4,4),
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DFCDL(5,5),
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DFCDL(6,6),
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DFCDL(7,7),
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DFCDL(8,8),
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DFCDL(9,9),
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DFCDL(10,10),
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DFCDL(11,11),
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DFCDL(12,12),
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DFCDL(13,13),
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DFCDL(14,14),
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DFCDL(15,15),
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DFCDL(16,16),
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DFCDL(17,17),
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DFCDL(18,18),
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DFCDL(19,19),
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DFCDL(20,20),
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DFCDL(21,21),
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DFCDL(22,22),
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DFCDL(23,23),
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DFCDL(24,24),
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DFCDL(25,25),
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DFCDL(26,26),
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DFCDL(27,27),
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DFCDL(28,28),
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DFCDL(29,29),
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DFCDL(30,30),
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DFCDL(31,31),
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DFCDL(32,32),
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DFCDL(33,33),
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DFCDL(34,34),
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DFCDL(35,35),
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DFCDL(36,36),
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DFCDL(37,37),
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DFCDL(38,38),
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DFCDL(39,39),
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DFCDL(40,40),
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DFCDL(41,41),
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DFCDL(42,42),
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DFCDL(43,43),
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DFCDL(44,44),
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DFCDL(45,45),
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DFCDL(46,46),
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DFCDL(47,47),
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DFCDL(48,48),
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DFCDL(49,49),
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DFCDL(50,50),
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DFCDL(51,51),
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DFCDL(52,52),
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DFCDL(53,53),
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DFCDL(54,54),
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DFCDL(55,55),
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DFCDL(56,56),
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DFCDL(57,57),
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DFCDL(58,58),
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DFCDL(59,59),
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DFCDL(60,60),
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DFCDL(61,61),
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DFCDL(62,62),
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DFCDL(63,63) };
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unsigned int ethDfcdls[] = {
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DFCDL(0,0), DFCDL(1,1), DFCDL(2,2), DFCDL(3,3),
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DFCDL(4,4), DFCDL(5,5), DFCDL(6,6), DFCDL(7,7),
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DFCDL(8,8), DFCDL(9,9), DFCDL(10,10), DFCDL(11,11),
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DFCDL(12,12), DFCDL(13,13), DFCDL(14,14), DFCDL(15,15),
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DFCDL(16,16), DFCDL(17,17), DFCDL(18,18), DFCDL(19,19),
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DFCDL(20,20), DFCDL(21,21), DFCDL(22,22), DFCDL(23,23),
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DFCDL(24,24), DFCDL(25,25), DFCDL(26,26), DFCDL(27,27),
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DFCDL(28,28), DFCDL(29,29), DFCDL(30,30), DFCDL(31,31),
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DFCDL(32,32), DFCDL(33,33), DFCDL(34,34), DFCDL(35,35),
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DFCDL(36,36), DFCDL(37,37), DFCDL(38,38), DFCDL(39,39),
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DFCDL(40,40), DFCDL(41,41), DFCDL(42,42), DFCDL(43,43),
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DFCDL(44,44), DFCDL(45,45), DFCDL(46,46), DFCDL(47,47),
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DFCDL(48,48), DFCDL(49,49), DFCDL(50,50), DFCDL(51,51),
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DFCDL(52,52), DFCDL(53,53), DFCDL(54,54), DFCDL(55,55),
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DFCDL(56,56), DFCDL(57,57), DFCDL(58,58), DFCDL(59,59),
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DFCDL(60,60), DFCDL(61,61), DFCDL(62,62), DFCDL(63,63),
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};
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void mv_eth_phy_init(void)
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void mv_eth_phy_init (void)
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{
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int i;
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MV_REG_WRITE(ETH_PHY_DFCDL_ADDR_REG, 0);
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MV_REG_WRITE (ETH_PHY_DFCDL_ADDR_REG, 0);
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for (i = 0 ; i < 64; i++) {
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MV_REG_WRITE(ETH_PHY_DFCDL_DATA0_REG, ethDfcdls[i]);
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for (i = 0; i < 64; i++) {
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MV_REG_WRITE (ETH_PHY_DFCDL_DATA0_REG, ethDfcdls[i]);
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}
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MV_REG_WRITE(ETH_PHY_DFCDL_CONFIG0_REG,0x300000);
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MV_REG_WRITE (ETH_PHY_DFCDL_CONFIG0_REG, 0x300000);
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}
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|
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void mv6446x_eth_initialize (bd_t * bis)
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@ -309,7 +257,7 @@ void mv6446x_eth_initialize (bd_t * bis)
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int devnum, x, temp;
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char *s, *e, buf[64];
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/* P3M750 only
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/* P3M750 only
|
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* Set RGMII clock drives strength
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*/
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temp = MV_REG_READ(0x20A0);
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@ -338,15 +286,12 @@ void mv6446x_eth_initialize (bd_t * bis)
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case 0:
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s = "ethaddr";
|
||||
break;
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||||
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||||
case 1:
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||||
s = "eth1addr";
|
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break;
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||||
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case 2:
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||||
s = "eth2addr";
|
||||
break;
|
||||
|
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default: /* this should never happen */
|
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printf ("%s: Invalid device number %d\n",
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__FUNCTION__, devnum);
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||||
|
@ -440,15 +385,12 @@ void mv6446x_eth_initialize (bd_t * bis)
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case 0:
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||||
s = "ethaddr";
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break;
|
||||
|
||||
case 1:
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||||
s = "eth1addr";
|
||||
break;
|
||||
|
||||
case 2:
|
||||
s = "eth2addr";
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break;
|
||||
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default: /* this should never happen */
|
||||
printf ("%s: Invalid device number %d\n",
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__FUNCTION__, devnum);
|
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@ -538,13 +480,11 @@ static int mv64460_eth_real_open (struct eth_device *dev)
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see ./net/eth.c eth_set_enetaddr() */
|
||||
memcpy (ethernet_private->port_mac_addr, dev->enetaddr, 6);
|
||||
|
||||
port_private =
|
||||
(struct mv64460_eth_priv *) ethernet_private->port_private;
|
||||
port_private = (struct mv64460_eth_priv *) ethernet_private->port_private;
|
||||
port_num = port_private->port_num;
|
||||
|
||||
/* Stop RX Queues */
|
||||
MV_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG (port_num),
|
||||
0x0000ff00);
|
||||
MV_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG (port_num), 0x0000ff00);
|
||||
|
||||
/* Clear the ethernet port interrupts */
|
||||
MV_REG_WRITE (MV64460_ETH_INTERRUPT_CAUSE_REG (port_num), 0);
|
||||
|
@ -685,7 +625,6 @@ static int mv64460_eth_real_open (struct eth_device *dev)
|
|||
return 1;
|
||||
}
|
||||
|
||||
|
||||
static int mv64460_eth_free_tx_rings (struct eth_device *dev)
|
||||
{
|
||||
unsigned int queue;
|
||||
|
@ -739,7 +678,6 @@ static int mv64460_eth_free_rx_rings (struct eth_device *dev)
|
|||
(struct mv64460_eth_priv *) ethernet_private->port_private;
|
||||
port_num = port_private->port_num;
|
||||
|
||||
|
||||
/* Stop RX Queues */
|
||||
MV_REG_WRITE (MV64460_ETH_RECEIVE_QUEUE_COMMAND_REG (port_num),
|
||||
0x0000ff00);
|
||||
|
@ -838,7 +776,6 @@ static int mv64460_eth_real_stop (struct eth_device *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/**********************************************************************
|
||||
* mv64460_eth_start_xmit
|
||||
*
|
||||
|
@ -882,7 +819,7 @@ int mv64460_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
|
|||
printf ("ETH Queue is full. \n");
|
||||
if (status == ETH_QUEUE_LAST_RESOURCE)
|
||||
printf ("ETH Queue: using last available resource. \n");
|
||||
goto error;
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Update statistics and start of transmittion time */
|
||||
|
@ -919,9 +856,6 @@ int mv64460_eth_xmit (struct eth_device *dev, volatile void *dataPtr,
|
|||
} while (release_result == ETH_OK);
|
||||
|
||||
return 0; /* success */
|
||||
|
||||
error:
|
||||
return 1; /* Failed - higher layers will free the skb */
|
||||
}
|
||||
|
||||
/**********************************************************************
|
||||
|
@ -1054,7 +988,6 @@ static struct net_device_stats *mv64460_eth_get_stats (struct eth_device *dev)
|
|||
return port_private->stats;
|
||||
}
|
||||
|
||||
|
||||
/**********************************************************************
|
||||
* mv64460_eth_update_stat
|
||||
*
|
||||
|
@ -1712,7 +1645,6 @@ static bool eth_port_start (ETH_PORT_INFO * p_eth_port_ctrl)
|
|||
unsigned int phy_reg_data;
|
||||
ETH_PORT eth_port_num = p_eth_port_ctrl->port_num;
|
||||
|
||||
|
||||
/* Assignment of Tx CTRP of given queue */
|
||||
for (queue = 0; queue < MAX_TX_QUEUE_NUM; queue++) {
|
||||
CURR_TFD_GET (p_tx_curr_desc, queue);
|
||||
|
@ -1928,13 +1860,12 @@ static void eth_port_mc_addr (ETH_PORT eth_port_num,
|
|||
int crc[8];
|
||||
int i;
|
||||
|
||||
|
||||
if ((p_addr[0] == 0x01) &&
|
||||
(p_addr[1] == 0x00) &&
|
||||
(p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00))
|
||||
(p_addr[2] == 0x5E) && (p_addr[3] == 0x00) && (p_addr[4] == 0x00)) {
|
||||
|
||||
eth_port_smc_addr (eth_port_num, p_addr[5], queue, option);
|
||||
else {
|
||||
} else {
|
||||
/* Calculate CRC-8 out of the given address */
|
||||
mac_h = (p_addr[0] << 8) | (p_addr[1]);
|
||||
mac_l = (p_addr[2] << 24) | (p_addr[3] << 16) |
|
||||
|
@ -1945,7 +1876,6 @@ static void eth_port_mc_addr (ETH_PORT eth_port_num,
|
|||
for (i = 32; i < 48; i++)
|
||||
mac_array[i] = (mac_h >> (i - 32)) & 0x1;
|
||||
|
||||
|
||||
crc[0] = mac_array[45] ^ mac_array[43] ^ mac_array[40] ^
|
||||
mac_array[39] ^ mac_array[35] ^ mac_array[34] ^
|
||||
mac_array[31] ^ mac_array[30] ^ mac_array[28] ^
|
||||
|
@ -2817,7 +2747,6 @@ static bool ether_init_rx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||
unsigned int buffer_addr;
|
||||
int ix; /* a counter */
|
||||
|
||||
|
||||
p_rx_desc = (ETH_RX_DESC *) rx_desc_base_addr;
|
||||
p_rx_prev_desc = p_rx_desc;
|
||||
buffer_addr = rx_buff_base_addr;
|
||||
|
@ -2912,7 +2841,6 @@ static bool ether_init_tx_desc_ring (ETH_PORT_INFO * p_eth_port_ctrl,
|
|||
unsigned int buffer_addr;
|
||||
int ix; /* a counter */
|
||||
|
||||
|
||||
/* save the first desc pointer to link with the last descriptor */
|
||||
p_tx_desc = (ETH_TX_DESC *) tx_desc_base_addr;
|
||||
p_tx_prev_desc = p_tx_desc;
|
||||
|
@ -3116,12 +3044,10 @@ static ETH_FUNC_RET_STATUS eth_tx_return_desc (ETH_PORT_INFO *
|
|||
volatile ETH_TX_DESC *p_tx_desc_first = NULL;
|
||||
unsigned int command_status;
|
||||
|
||||
|
||||
/* Get the Tx Desc ring indexes */
|
||||
USED_TFD_GET (p_tx_desc_used, tx_queue);
|
||||
FIRST_TFD_GET (p_tx_desc_first, tx_queue);
|
||||
|
||||
|
||||
/* Sanity check */
|
||||
if (p_tx_desc_used == NULL)
|
||||
return ETH_ERROR;
|
||||
|
|
|
@ -70,11 +70,12 @@ int memory_map_bank (unsigned int bankNo,
|
|||
#endif
|
||||
|
||||
#ifdef DEBUG
|
||||
if (bankLength > 0)
|
||||
if (bankLength > 0) {
|
||||
printf ("mapping bank %d at %08x - %08x\n",
|
||||
bankNo, bankBase, bankBase + bankLength - 1);
|
||||
else
|
||||
} else {
|
||||
printf ("unmapping bank %d\n", bankNo);
|
||||
}
|
||||
#endif
|
||||
|
||||
memoryMapBank (bankNo, bankBase, bankLength);
|
||||
|
|
Loading…
Reference in New Issue