ARM: i.MX6: Add Nand boot bbu handler
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
f20f362a0d
commit
964966be6a
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@ -109,6 +109,12 @@ config BAREBOX_UPDATE_IMX_EXTERNAL_NAND
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depends on BAREBOX_UPDATE
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default y
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config BAREBOX_UPDATE_IMX6_NAND
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bool
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depends on ARCH_IMX6
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depends on BAREBOX_UPDATE
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default y
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comment "Freescale i.MX System-on-Chip"
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config ARCH_IMX1
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@ -20,4 +20,5 @@ obj-y += devices.o imx.o esdctl.o
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obj-y += boot.o
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obj-$(CONFIG_BAREBOX_UPDATE) += imx-bbu-internal.o
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obj-$(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND) += imx-bbu-external-nand.o
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obj-$(CONFIG_BAREBOX_UPDATE_IMX6_NAND) += imx6-bbu-nand.o
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pbl-y += esdctl.o
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@ -0,0 +1,497 @@
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/*
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* Copyright (C) 2014 Sascha Hauer, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation.
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*
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*/
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#define pr_fmt(fmt) "imx6-bbu-nand: " fmt
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#include <filetype.h>
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#include <common.h>
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#include <malloc.h>
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#include <errno.h>
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#include <fcntl.h>
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#include <ioctl.h>
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#include <sizes.h>
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#include <bbu.h>
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#include <fs.h>
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#include <mach/bbu.h>
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#include <linux/mtd/mtd-abi.h>
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#include <linux/mtd/mtd.h>
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#include <linux/stat.h>
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struct dbbt_block {
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uint32_t Checksum;
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uint32_t FingerPrint;
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uint32_t Version;
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uint32_t reserved;
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uint32_t DBBTNumOfPages;
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};
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struct fcb_block {
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uint32_t Checksum; /* First fingerprint in first byte */
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uint32_t FingerPrint; /* 2nd fingerprint at byte 4 */
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uint32_t Version; /* 3rd fingerprint at byte 8 */
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uint8_t DataSetup;
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uint8_t DataHold;
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uint8_t AddressSetup;
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uint8_t DSAMPLE_TIME;
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/* These are for application use only and not for ROM. */
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uint8_t NandTimingState;
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uint8_t REA;
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uint8_t RLOH;
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uint8_t RHOH;
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uint32_t PageDataSize; /* 2048 for 2K pages, 4096 for 4K pages */
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uint32_t TotalPageSize; /* 2112 for 2K pages, 4314 for 4K pages */
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uint32_t SectorsPerBlock; /* Number of 2K sections per block */
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uint32_t NumberOfNANDs; /* Total Number of NANDs - not used by ROM */
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uint32_t TotalInternalDie; /* Number of separate chips in this NAND */
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uint32_t CellType; /* MLC or SLC */
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uint32_t EccBlockNEccType; /* Type of ECC, can be one of BCH-0-20 */
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uint32_t EccBlock0Size; /* Number of bytes for Block0 - BCH */
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uint32_t EccBlockNSize; /* Block size in bytes for all blocks other than Block0 - BCH */
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uint32_t EccBlock0EccType; /* Ecc level for Block 0 - BCH */
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uint32_t MetadataBytes; /* Metadata size - BCH */
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uint32_t NumEccBlocksPerPage; /* Number of blocks per page for ROM use - BCH */
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uint32_t EccBlockNEccLevelSDK; /* Type of ECC, can be one of BCH-0-20 */
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uint32_t EccBlock0SizeSDK; /* Number of bytes for Block0 - BCH */
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uint32_t EccBlockNSizeSDK; /* Block size in bytes for all blocks other than Block0 - BCH */
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uint32_t EccBlock0EccLevelSDK; /* Ecc level for Block 0 - BCH */
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uint32_t NumEccBlocksPerPageSDK;/* Number of blocks per page for SDK use - BCH */
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uint32_t MetadataBytesSDK; /* Metadata size - BCH */
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uint32_t EraseThreshold; /* To set into BCH_MODE register */
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uint32_t BootPatch; /* 0 for normal boot and 1 to load patch starting next to FCB */
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uint32_t PatchSectors; /* Size of patch in sectors */
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uint32_t Firmware1_startingPage;/* Firmware image starts on this sector */
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uint32_t Firmware2_startingPage;/* Secondary FW Image starting Sector */
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uint32_t PagesInFirmware1; /* Number of sectors in firmware image */
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uint32_t PagesInFirmware2; /* Number of sector in secondary FW image */
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uint32_t DBBTSearchAreaStartAddress; /* Page address where dbbt search area begins */
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uint32_t BadBlockMarkerByte; /* Byte in page data that have manufacturer marked bad block marker, */
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/* this will be swapped with metadata[0] to complete page data. */
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uint32_t BadBlockMarkerStartBit;/* For BCH ECC sizes other than 8 and 16 the bad block marker does not */
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/* start at 0th bit of BadBlockMarkerByte. This field is used to get to */
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/* the start bit of bad block marker byte with in BadBlockMarkerByte */
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uint32_t BBMarkerPhysicalOffset;/* FCB value that gives byte offset for bad block marker on physical NAND page */
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uint32_t BCHType;
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uint32_t TMTiming2_ReadLatency;
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uint32_t TMTiming2_PreambleDelay;
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uint32_t TMTiming2_CEDelay;
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uint32_t TMTiming2_PostambleDelay;
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uint32_t TMTiming2_CmdAddPause;
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uint32_t TMTiming2_DataPause;
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uint32_t TMSpeed;
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uint32_t TMTiming1_BusyTimeout;
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uint32_t DISBBM; /* the flag to enable (1)/disable(0) bi swap */
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uint32_t BBMarkerPhysicalOffsetInSpareData; /* The swap position of main area in spare area */
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};
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#define BF_VAL(v, bf) (((v) & bf##_MASK) >> bf##_OFFSET)
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#define GETBIT(v,n) (((v) >> (n)) & 0x1)
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static uint8_t calculate_parity_13_8(uint8_t d)
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{
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uint8_t p = 0;
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p |= (GETBIT(d, 6) ^ GETBIT(d, 5) ^ GETBIT(d, 3) ^ GETBIT(d, 2)) << 0;
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p |= (GETBIT(d, 7) ^ GETBIT(d, 5) ^ GETBIT(d, 4) ^ GETBIT(d, 2) ^ GETBIT(d, 1)) << 1;
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p |= (GETBIT(d, 7) ^ GETBIT(d, 6) ^ GETBIT(d, 5) ^ GETBIT(d, 1) ^ GETBIT(d, 0)) << 2;
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p |= (GETBIT(d, 7) ^ GETBIT(d, 4) ^ GETBIT(d, 3) ^ GETBIT(d, 0)) << 3;
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p |= (GETBIT(d, 6) ^ GETBIT(d, 4) ^ GETBIT(d, 3) ^ GETBIT(d, 2) ^ GETBIT(d, 1) ^ GETBIT(d, 0)) << 4;
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return p;
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}
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static void encode_hamming_13_8(void *_src, void *_ecc, size_t size)
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{
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int i;
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uint8_t *src = _src;
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uint8_t *ecc = _ecc;
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for (i = 0; i < size; i++)
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ecc[i] = calculate_parity_13_8(src[i]);
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}
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static uint32_t calc_chksum(void *buf, size_t size)
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{
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u32 chksum = 0;
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u8 *bp = buf;
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size_t i;
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for (i = 0; i < size; i++)
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chksum += bp[i];
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return ~chksum;
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}
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static __maybe_unused void dump_fcb(void *buf)
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{
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struct fcb_block *fcb = buf;
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pr_debug("Checksum: 0x%08x\n", fcb->Checksum);
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pr_debug("FingerPrint: 0x%08x\n", fcb->FingerPrint);
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pr_debug("Version: 0x%08x\n", fcb->Version);
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pr_debug("DataSetup: 0x%02x\n", fcb->DataSetup);
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pr_debug("DataHold: 0x%02x\n", fcb->DataHold);
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pr_debug("AddressSetup: 0x%02x\n", fcb->AddressSetup);
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pr_debug("DSAMPLE_TIME: 0x%02x\n", fcb->DSAMPLE_TIME);
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pr_debug("NandTimingState: 0x%02x\n", fcb->NandTimingState);
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pr_debug("REA: 0x%02x\n", fcb->REA);
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pr_debug("RLOH: 0x%02x\n", fcb->RLOH);
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pr_debug("RHOH: 0x%02x\n", fcb->RHOH);
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pr_debug("PageDataSize: 0x%08x\n", fcb->PageDataSize);
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pr_debug("TotalPageSize: 0x%08x\n", fcb->TotalPageSize);
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pr_debug("SectorsPerBlock: 0x%08x\n", fcb->SectorsPerBlock);
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pr_debug("NumberOfNANDs: 0x%08x\n", fcb->NumberOfNANDs);
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pr_debug("TotalInternalDie: 0x%08x\n", fcb->TotalInternalDie);
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pr_debug("CellType: 0x%08x\n", fcb->CellType);
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pr_debug("EccBlockNEccType: 0x%08x\n", fcb->EccBlockNEccType);
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pr_debug("EccBlock0Size: 0x%08x\n", fcb->EccBlock0Size);
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pr_debug("EccBlockNSize: 0x%08x\n", fcb->EccBlockNSize);
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pr_debug("EccBlock0EccType: 0x%08x\n", fcb->EccBlock0EccType);
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pr_debug("MetadataBytes: 0x%08x\n", fcb->MetadataBytes);
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pr_debug("NumEccBlocksPerPage: 0x%08x\n", fcb->NumEccBlocksPerPage);
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pr_debug("EccBlockNEccLevelSDK: 0x%08x\n", fcb->EccBlockNEccLevelSDK);
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pr_debug("EccBlock0SizeSDK: 0x%08x\n", fcb->EccBlock0SizeSDK);
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pr_debug("EccBlockNSizeSDK: 0x%08x\n", fcb->EccBlockNSizeSDK);
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pr_debug("EccBlock0EccLevelSDK: 0x%08x\n", fcb->EccBlock0EccLevelSDK);
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pr_debug("NumEccBlocksPerPageSDK: 0x%08x\n", fcb->NumEccBlocksPerPageSDK);
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pr_debug("MetadataBytesSDK: 0x%08x\n", fcb->MetadataBytesSDK);
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pr_debug("EraseThreshold: 0x%08x\n", fcb->EraseThreshold);
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pr_debug("BootPatch: 0x%08x\n", fcb->BootPatch);
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pr_debug("PatchSectors: 0x%08x\n", fcb->PatchSectors);
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pr_debug("Firmware1_startingPage: 0x%08x\n", fcb->Firmware1_startingPage);
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pr_debug("Firmware2_startingPage: 0x%08x\n", fcb->Firmware2_startingPage);
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pr_debug("PagesInFirmware1: 0x%08x\n", fcb->PagesInFirmware1);
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pr_debug("PagesInFirmware2: 0x%08x\n", fcb->PagesInFirmware2);
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pr_debug("DBBTSearchAreaStartAddress: 0x%08x\n", fcb->DBBTSearchAreaStartAddress);
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pr_debug("BadBlockMarkerByte: 0x%08x\n", fcb->BadBlockMarkerByte);
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pr_debug("BadBlockMarkerStartBit: 0x%08x\n", fcb->BadBlockMarkerStartBit);
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pr_debug("BBMarkerPhysicalOffset: 0x%08x\n", fcb->BBMarkerPhysicalOffset);
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pr_debug("BCHType: 0x%08x\n", fcb->BCHType);
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pr_debug("TMTiming2_ReadLatency: 0x%08x\n", fcb->TMTiming2_ReadLatency);
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pr_debug("TMTiming2_PreambleDelay: 0x%08x\n", fcb->TMTiming2_PreambleDelay);
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pr_debug("TMTiming2_CEDelay: 0x%08x\n", fcb->TMTiming2_CEDelay);
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pr_debug("TMTiming2_PostambleDelay: 0x%08x\n", fcb->TMTiming2_PostambleDelay);
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pr_debug("TMTiming2_CmdAddPause: 0x%08x\n", fcb->TMTiming2_CmdAddPause);
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pr_debug("TMTiming2_DataPause: 0x%08x\n", fcb->TMTiming2_DataPause);
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pr_debug("TMSpeed: 0x%08x\n", fcb->TMSpeed);
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pr_debug("TMTiming1_BusyTimeout: 0x%08x\n", fcb->TMTiming1_BusyTimeout);
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pr_debug("DISBBM: 0x%08x\n", fcb->DISBBM);
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pr_debug("BBMarkerPhysOfsInSpareData: 0x%08x\n", fcb->BBMarkerPhysicalOffsetInSpareData);
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}
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static __maybe_unused ssize_t raw_read_page(struct mtd_info *mtd, void *dst, loff_t offset)
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{
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struct mtd_oob_ops ops;
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ssize_t ret;
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ops.mode = MTD_OPS_RAW;
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ops.ooboffs = 0;
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ops.datbuf = dst;
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ops.len = mtd->writesize;
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ops.oobbuf = dst + mtd->writesize;
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ops.ooblen = mtd->oobsize;
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ret = mtd_read_oob(mtd, offset, &ops);
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return ret;
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}
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static ssize_t raw_write_page(struct mtd_info *mtd, void *buf, loff_t offset)
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{
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struct mtd_oob_ops ops;
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ssize_t ret;
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ops.mode = MTD_OPS_RAW;
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ops.ooboffs = 0;
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ops.datbuf = buf;
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ops.len = mtd->writesize;
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ops.oobbuf = buf + mtd->writesize;
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ops.ooblen = mtd->oobsize;
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ret = mtd_write_oob(mtd, offset, &ops);
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return ret;
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}
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static int fcb_create(struct fcb_block *fcb, struct mtd_info *mtd)
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{
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fcb->FingerPrint = 0x20424346;
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fcb->Version = 0x01000000;
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fcb->PageDataSize = mtd->writesize;
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fcb->TotalPageSize = mtd->writesize + mtd->oobsize;
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fcb->SectorsPerBlock = mtd->erasesize / mtd->writesize;
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if (mtd->writesize == 2048) {
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fcb->EccBlock0EccType = 4;
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} else if (mtd->writesize == 4096) {
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if (mtd->oobsize == 218) {
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fcb->EccBlock0EccType = 8;
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} else if (mtd->oobsize == 128) {
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fcb->EccBlock0EccType = 4;
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} else {
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pr_err("Illegal oobsize %d\n", mtd->oobsize);
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return -EINVAL;
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}
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} else {
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pr_err("Illegal writesize %d\n", mtd->writesize);
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return -EINVAL;
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}
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fcb->EccBlockNEccType = fcb->EccBlock0EccType;
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/* Also hardcoded in kobs-ng */
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fcb->DataSetup = 80;
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fcb->DataHold = 60;
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fcb->AddressSetup = 25;
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fcb->DSAMPLE_TIME = 6;
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fcb->MetadataBytes = 0x0000000a;
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fcb->EccBlock0Size = 0x00000200;
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fcb->EccBlockNSize = 0x00000200;
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fcb->NumEccBlocksPerPage = mtd->writesize / fcb->EccBlock0Size - 1;
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/* DBBT search area starts at third block */
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fcb->DBBTSearchAreaStartAddress = mtd->erasesize / mtd->writesize * 2;
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if (mtd->writesize == 2048) {
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fcb->BadBlockMarkerByte = 0x000007cf;
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} else {
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pr_err("BadBlockMarkerByte unknown for writesize %d\n", mtd->writesize);
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return -EINVAL;
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}
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fcb->BBMarkerPhysicalOffset = mtd->writesize;
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fcb->Checksum = calc_chksum((void *)fcb + 4, sizeof(*fcb) - 4);
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return 0;
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}
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static int imx6_bbu_erase(struct mtd_info *mtd)
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{
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uint64_t offset = 0;
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int len = SZ_2M;
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struct erase_info erase;
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int ret;
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while (len > 0) {
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pr_debug("erasing at 0x%08llx\n", offset);
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if (mtd_block_isbad(mtd, offset)) {
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offset += mtd->erasesize;
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pr_debug("erase skip block @ 0x%08llx\n", offset);
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continue;
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}
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memset(&erase, 0, sizeof(erase));
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erase.addr = offset;
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erase.len = mtd->erasesize;
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ret = mtd_erase(mtd, &erase);
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if (ret)
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return ret;
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offset += mtd->erasesize;
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len -= mtd->erasesize;
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}
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return 0;
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}
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static int imx6_bbu_write_firmware(struct mtd_info *mtd, int block, void *buf, size_t len)
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{
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uint64_t offset = block * mtd->erasesize;
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int ret;
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size_t written;
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while (len > 0) {
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int now = min(len, mtd->erasesize);
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pr_debug("writing %p at 0x%08llx, left 0x%08x\n",
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buf, offset, len);
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if (mtd_block_isbad(mtd, offset)) {
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offset += mtd->erasesize;
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block++;
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pr_debug("write skip block @ 0x%08llx\n", offset);
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continue;
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}
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ret = mtd_write(mtd, offset, now, &written, buf);
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if (ret)
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return ret;
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offset += now;
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len -= now;
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buf += now;
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block++;
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}
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return block;
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}
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static int dbbt_data_create(struct mtd_info *mtd, void *buf, int block_last)
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{
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int n;
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int n_bad_blocks = 0;
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uint32_t *bb = buf + 0x8;
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uint32_t *n_bad_blocksp = buf + 0x4;
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for (n = 0; n <= block_last; n++) {
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loff_t offset = n * mtd->erasesize;
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if (mtd_block_isbad(mtd, offset)) {
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n_bad_blocks++;
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*bb = n;
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bb++;
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}
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}
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||||
*n_bad_blocksp = n_bad_blocks;
|
||||
|
||||
return n_bad_blocks;
|
||||
}
|
||||
|
||||
static int imx6_bbu_nand_update(struct bbu_handler *handler, struct bbu_data *data)
|
||||
{
|
||||
struct cdev *bcb_cdev;
|
||||
struct mtd_info *mtd;
|
||||
int ret, block_fw1, block_fw2, block_last;
|
||||
struct fcb_block *fcb;
|
||||
struct dbbt_block *dbbt;
|
||||
void *fcb_raw_page, *dbbt_page, *dbbt_data_page;
|
||||
void *ecc;
|
||||
int written;
|
||||
void *fw;
|
||||
unsigned fw_size;
|
||||
int i;
|
||||
|
||||
if (file_detect_type(data->image, data->len) != filetype_arm_barebox &&
|
||||
!bbu_force(data, "Not an ARM barebox image"))
|
||||
return -EINVAL;
|
||||
|
||||
ret = bbu_confirm(data);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
bcb_cdev = cdev_by_name("nand0");
|
||||
if (!bcb_cdev) {
|
||||
pr_err("%s: No FCB device!\n", __func__);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
mtd = bcb_cdev->mtd;
|
||||
|
||||
fcb_raw_page = xzalloc(mtd->writesize + mtd->oobsize);
|
||||
|
||||
fcb = fcb_raw_page + 12;
|
||||
ecc = fcb_raw_page + 512 + 12;
|
||||
|
||||
dbbt_page = xzalloc(mtd->writesize);
|
||||
dbbt_data_page = xzalloc(mtd->writesize);
|
||||
dbbt = dbbt_page;
|
||||
|
||||
/*
|
||||
* We have to write one additional page to make the ROM happy.
|
||||
* Maybe the PagesInFirmwarex fields are really the number of pages - 1.
|
||||
* kobs-ng has the same.
|
||||
*/
|
||||
fw_size = ALIGN(data->len + mtd->writesize, mtd->writesize);
|
||||
fw = xzalloc(fw_size);
|
||||
memcpy(fw, data->image, data->len);
|
||||
|
||||
block_fw1 = 4;
|
||||
|
||||
ret = imx6_bbu_erase(mtd);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
ret = imx6_bbu_write_firmware(mtd, block_fw1, fw, fw_size);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
block_fw2 = ret;
|
||||
|
||||
ret = imx6_bbu_write_firmware(mtd, block_fw2, fw, fw_size);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
block_last = ret;
|
||||
|
||||
fcb->Firmware1_startingPage = block_fw1 * mtd->erasesize / mtd->writesize;
|
||||
fcb->Firmware2_startingPage = block_fw2 * mtd->erasesize / mtd->writesize;
|
||||
fcb->PagesInFirmware1 = ALIGN(data->len, mtd->writesize) / mtd->writesize;
|
||||
fcb->PagesInFirmware2 = fcb->PagesInFirmware1;
|
||||
|
||||
fcb_create(fcb, mtd);
|
||||
encode_hamming_13_8(fcb, ecc, 512);
|
||||
ret = raw_write_page(mtd, fcb_raw_page, 0);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
ret = raw_write_page(mtd, fcb_raw_page, mtd->erasesize);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
dbbt->Checksum = 0;
|
||||
dbbt->FingerPrint = 0x54424244;
|
||||
dbbt->Version = 0x01000000;
|
||||
|
||||
ret = dbbt_data_create(mtd, dbbt_data_page, block_last);
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
if (ret > 0)
|
||||
dbbt->DBBTNumOfPages = 1;
|
||||
|
||||
for (i = 2; i < 4; i++) {
|
||||
ret = mtd_write(mtd, mtd->erasesize * i, 2048, &written, dbbt_page);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
if (dbbt->DBBTNumOfPages > 0) {
|
||||
ret = mtd_write(mtd, mtd->erasesize * i + mtd->writesize * 4,
|
||||
2048, &written, dbbt_data_page);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
out:
|
||||
free(dbbt_page);
|
||||
free(dbbt_data_page);
|
||||
free(fcb_raw_page);
|
||||
free(fw);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int imx6_bbu_nand_register_handler(const char *name, unsigned long flags)
|
||||
{
|
||||
struct bbu_handler *handler;
|
||||
int ret;
|
||||
|
||||
handler = xzalloc(sizeof(*handler));
|
||||
handler->devicefile = "/dev/nand0";
|
||||
handler->name = name;
|
||||
handler->flags = flags;
|
||||
handler->handler = imx6_bbu_nand_update;
|
||||
|
||||
ret = bbu_register_handler(handler);
|
||||
if (ret)
|
||||
free(handler);
|
||||
|
||||
return ret;
|
||||
}
|
|
@ -33,6 +33,8 @@ int imx6_bbu_internal_spi_i2c_register_handler(const char *name, char *devicefil
|
|||
unsigned long flags, struct imx_dcd_v2_entry *dcd, int dcdsize,
|
||||
unsigned long app_dest);
|
||||
|
||||
int imx6_bbu_nand_register_handler(const char *name, unsigned long flags);
|
||||
|
||||
#else
|
||||
|
||||
static inline int imx51_bbu_internal_mmc_register_handler(const char *name, char *devicefile,
|
||||
|
@ -77,6 +79,10 @@ static inline int imx6_bbu_internal_spi_i2c_register_handler(const char *name, c
|
|||
return -ENOSYS;
|
||||
}
|
||||
|
||||
static inline int imx6_bbu_nand_register_handler(const char *name, unsigned long flags)
|
||||
{
|
||||
return -ENOSYS;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BAREBOX_UPDATE_IMX_EXTERNAL_NAND)
|
||||
|
|
Loading…
Reference in New Issue