Merge branch 'pu/mmc-spi' into next
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commit
97e0b488a9
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@ -81,6 +81,7 @@ config MCI_ATMEL
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config MCI_SPI
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bool "MMC/SD over SPI"
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depends on SPI
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help
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Some systems access MMC/SD/SDIO cards using a SPI controller
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instead of using a "native" MMC/SD/SDIO controller. This has a
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@ -64,23 +64,6 @@
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#define RTOUT 3000000 /* 1 sec */
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#define WTOUT 3000000 /* 1 sec */
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#ifndef CONFIG_MMC_SPI_CRC_ON
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/* Note that while the CRC, in general, is ignored in SPI mode, the very first
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* command must be followed by a valid CRC, since the card is not yet in SPI mode.
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* The CRC byte for a CMD0 command with a zero argument is a constant 0x4A. For
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* simplicity, this CRC byte is always sent with every command.
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*/
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static inline u8 crc7(u8 crc, const u8 *buffer, size_t len)
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{
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/* This is the crc7 value for a CMD0 command with a zero argument.
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* It'll be left shifted and ored with '1' in mmc_spi_command_send
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* to give 0x95 (also known as the CMD0 constant CRC value...)
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*/
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return 0x4A;
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}
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#endif
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struct mmc_spi_host {
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struct mci_host mci;
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struct spi_device *spi;
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@ -141,6 +124,14 @@ mmc_spi_writebytes(struct mmc_spi_host *host, unsigned len, void *data)
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return status;
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}
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/*
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* Note that while the CRC, in general, is ignored in SPI mode, the very first
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* command must be followed by a valid CRC, since the card is not yet in SPI mode.
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* The CRC byte for a CMD0 command with a zero argument is a constant 0x4A. For
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* simplicity, this CRC byte is always sent with every command.
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*/
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#define MMC_SPI_CMD0_CRC ((0x4a << 1) | 0x1)
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static int mmc_spi_command_send(struct mmc_spi_host *host, struct mci_cmd *cmd)
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{
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uint8_t r1;
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@ -153,7 +144,11 @@ static int mmc_spi_command_send(struct mmc_spi_host *host, struct mci_cmd *cmd)
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command[3] = cmd->cmdarg >> 16;
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command[4] = cmd->cmdarg >> 8;
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command[5] = cmd->cmdarg;
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#ifdef CONFIG_MMC_SPI_CRC_ON
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command[6] = (crc7(0, &command[1], 5) << 1) | 0x01;
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#else
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command[6] = MMC_SPI_CMD0_CRC;
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#endif
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mmc_spi_writebytes(host, 7, command);
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