arm: merge proc-armv/ptrace.h and ptrace.h in one file
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD
parent
67254a403f
commit
9956bdf77d
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@ -58,13 +58,6 @@ ifneq ($(KBUILD_SRC),)
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$(Q)ln -fsn $(srctree)/include/asm-arm/$(INCDIR) include/asm-arm/arch
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else
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$(Q)ln -fsn $(INCDIR) include/asm-arm/arch
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endif
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@echo ' SYMLINK include/asm-arm/proc -> include/asm-arm/proc-armv'
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ifneq ($(KBUILD_SRC),)
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$(Q)mkdir -p include/asm-arm
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$(Q)ln -fsn $(srctree)/include/asm-arm/proc-armv include/asm-arm/proc
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else
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$(Q)ln -fsn proc-armv include/asm-arm/proc
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endif
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@touch $@
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@ -111,4 +104,4 @@ lds-$(CONFIG_GENERIC_LINKER_SCRIPT) := arch/arm/lib/u-boot.lds
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lds-$(CONFIG_BOARD_LINKER_SCRIPT) := $(BOARD)/u-boot.lds
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CLEAN_FILES += arch/arm/lib/u-boot.lds
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MRPROPER_FILES += include/asm-arm/arch include/asm-arm/proc
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MRPROPER_FILES += include/asm-arm/arch
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@ -1,3 +1,12 @@
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/*
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* arch/arm/include/asm/ptrace.h
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*
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* Copyright (C) 1996-2003 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARM_PTRACE_H
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#define __ASM_ARM_PTRACE_H
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@ -11,7 +20,102 @@
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/* options set using PTRACE_SETOPTIONS */
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#define PTRACE_O_TRACESYSGOOD 0x00000001
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#include <asm/proc/ptrace.h>
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/*
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* PSR bits
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*/
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#define USR26_MODE 0x00
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#define FIQ26_MODE 0x01
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#define IRQ26_MODE 0x02
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#define SVC26_MODE 0x03
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#define USR_MODE 0x10
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#define FIQ_MODE 0x11
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#define IRQ_MODE 0x12
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#define SVC_MODE 0x13
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#define ABT_MODE 0x17
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#define UND_MODE 0x1b
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#define SYSTEM_MODE 0x1f
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#define MODE_MASK 0x1f
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#define T_BIT 0x20
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#define F_BIT 0x40
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#define I_BIT 0x80
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#define CC_V_BIT (1 << 28)
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#define CC_C_BIT (1 << 29)
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#define CC_Z_BIT (1 << 30)
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#define CC_N_BIT (1 << 31)
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#define PCMASK 0
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#ifndef __ASSEMBLY__
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/* this struct defines the way the registers are stored on the
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stack during a system call. */
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struct pt_regs {
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long uregs[18];
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};
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#define ARM_cpsr uregs[16]
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#define ARM_pc uregs[15]
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#define ARM_lr uregs[14]
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#define ARM_sp uregs[13]
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#define ARM_ip uregs[12]
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#define ARM_fp uregs[11]
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#define ARM_r10 uregs[10]
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#define ARM_r9 uregs[9]
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#define ARM_r8 uregs[8]
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#define ARM_r7 uregs[7]
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#define ARM_r6 uregs[6]
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#define ARM_r5 uregs[5]
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#define ARM_r4 uregs[4]
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#define ARM_r3 uregs[3]
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#define ARM_r2 uregs[2]
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#define ARM_r1 uregs[1]
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#define ARM_r0 uregs[0]
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#define ARM_ORIG_r0 uregs[17]
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#ifdef __KERNEL__
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#define user_mode(regs) \
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(((regs)->ARM_cpsr & 0xf) == 0)
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#ifdef CONFIG_ARM_THUMB
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#define thumb_mode(regs) \
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(((regs)->ARM_cpsr & T_BIT))
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#else
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#define thumb_mode(regs) (0)
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#endif
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#define processor_mode(regs) \
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((regs)->ARM_cpsr & MODE_MASK)
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#define interrupts_enabled(regs) \
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(!((regs)->ARM_cpsr & I_BIT))
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#define fast_interrupts_enabled(regs) \
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(!((regs)->ARM_cpsr & F_BIT))
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#define condition_codes(regs) \
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((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT))
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/* Are the current registers suitable for user mode?
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* (used to maintain security in signal handlers)
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*/
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static inline int valid_user_regs(struct pt_regs *regs)
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{
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if ((regs->ARM_cpsr & 0xf) == 0 &&
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(regs->ARM_cpsr & (F_BIT|I_BIT)) == 0)
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return 1;
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/*
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* Force CPSR to something logical...
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*/
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regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10);
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return 0;
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}
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#endif /* __KERNEL__ */
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#endif /* __ASSEMBLY__ */
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#ifndef __ASSEMBLY__
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#define pc_pointer(v) \
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@ -1,107 +0,0 @@
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/*
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* linux/include/asm-arm/proc-armv/ptrace.h
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*
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* Copyright (C) 1996-1999 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_PROC_PTRACE_H
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#define __ASM_PROC_PTRACE_H
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#define USR26_MODE 0x00
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#define FIQ26_MODE 0x01
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#define IRQ26_MODE 0x02
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#define SVC26_MODE 0x03
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#define USR_MODE 0x10
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#define FIQ_MODE 0x11
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#define IRQ_MODE 0x12
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#define SVC_MODE 0x13
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#define ABT_MODE 0x17
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#define UND_MODE 0x1b
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#define SYSTEM_MODE 0x1f
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#define MODE_MASK 0x1f
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#define T_BIT 0x20
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#define F_BIT 0x40
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#define I_BIT 0x80
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#define CC_V_BIT (1 << 28)
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#define CC_C_BIT (1 << 29)
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#define CC_Z_BIT (1 << 30)
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#define CC_N_BIT (1 << 31)
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#define PCMASK 0
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#ifndef __ASSEMBLY__
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/* this struct defines the way the registers are stored on the
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stack during a system call. */
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struct pt_regs {
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long uregs[18];
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};
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#define ARM_cpsr uregs[16]
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#define ARM_pc uregs[15]
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#define ARM_lr uregs[14]
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#define ARM_sp uregs[13]
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#define ARM_ip uregs[12]
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#define ARM_fp uregs[11]
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#define ARM_r10 uregs[10]
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#define ARM_r9 uregs[9]
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#define ARM_r8 uregs[8]
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#define ARM_r7 uregs[7]
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#define ARM_r6 uregs[6]
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#define ARM_r5 uregs[5]
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#define ARM_r4 uregs[4]
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#define ARM_r3 uregs[3]
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#define ARM_r2 uregs[2]
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#define ARM_r1 uregs[1]
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#define ARM_r0 uregs[0]
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#define ARM_ORIG_r0 uregs[17]
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#ifdef __KERNEL__
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#define user_mode(regs) \
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(((regs)->ARM_cpsr & 0xf) == 0)
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#ifdef CONFIG_ARM_THUMB
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#define thumb_mode(regs) \
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(((regs)->ARM_cpsr & T_BIT))
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#else
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#define thumb_mode(regs) (0)
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#endif
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#define processor_mode(regs) \
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((regs)->ARM_cpsr & MODE_MASK)
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#define interrupts_enabled(regs) \
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(!((regs)->ARM_cpsr & I_BIT))
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#define fast_interrupts_enabled(regs) \
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(!((regs)->ARM_cpsr & F_BIT))
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#define condition_codes(regs) \
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((regs)->ARM_cpsr & (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT))
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/* Are the current registers suitable for user mode?
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* (used to maintain security in signal handlers)
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*/
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static inline int valid_user_regs(struct pt_regs *regs)
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{
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if ((regs->ARM_cpsr & 0xf) == 0 &&
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(regs->ARM_cpsr & (F_BIT|I_BIT)) == 0)
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return 1;
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/*
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* Force CPSR to something logical...
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*/
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regs->ARM_cpsr &= (CC_V_BIT|CC_C_BIT|CC_Z_BIT|CC_N_BIT|0x10);
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return 0;
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}
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#endif /* __KERNEL__ */
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#endif /* __ASSEMBLY__ */
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#endif
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