svn_rev_494
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22df20c143
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9a958adf07
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/* read co-processor 15, register #1 (control register) */
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static unsigned long read_p15_c1 (void)
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{
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unsigned long value;
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__asm__ __volatile__(
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"mrc p15, 0, %0, c1, c0, 0 @ read control reg\n"
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: "=r" (value)
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:
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: "memory");
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#ifdef MMU_DEBUG
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printf ("p15/c1 is = %08lx\n", value);
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#endif
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return value;
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}
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/* write to co-processor 15, register #1 (control register) */
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static void write_p15_c1 (unsigned long value)
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{
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#ifdef MMU_DEBUG
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printf ("write %08lx to p15/c1\n", value);
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#endif
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__asm__ __volatile__(
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"mcr p15, 0, %0, c1, c0, 0 @ write it back\n"
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:
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: "r" (value)
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: "memory");
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read_p15_c1 ();
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}
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static void cp_delay (void)
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{
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volatile int i;
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/* copro seems to need some delay between reading and writing */
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for (i = 0; i < 100; i++);
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}
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#define C1_MMU (1<<0) /* mmu off/on */
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#define C1_ALIGN (1<<1) /* alignment faults off/on */
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#define C1_DC (1<<2) /* dcache off/on */
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#define C1_BIG_ENDIAN (1<<7) /* big endian off/on */
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#define C1_SYS_PROT (1<<8) /* system protection */
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#define C1_ROM_PROT (1<<9) /* ROM protection */
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#define C1_IC (1<<12) /* icache off/on */
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#define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
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void icache_enable (void)
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{
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ulong reg;
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reg = read_p15_c1 (); /* get control reg. */
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cp_delay ();
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write_p15_c1 (reg | C1_IC);
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}
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void icache_disable (void)
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{
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ulong reg;
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reg = read_p15_c1 ();
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cp_delay ();
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write_p15_c1 (reg & ~C1_IC);
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}
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int icache_status (void)
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{
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return (read_p15_c1 () & C1_IC) != 0;
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}
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int cleanup_before_linux (void)
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{
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/*
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* this function is called just before we call linux
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* it prepares the processor for linux
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*/
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disable_interrupts ();
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/*
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* we never enable dcache so we do not need to disable
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* it. Linux can be called with icache enabled, so just
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* do nothing here
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*/
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/* flush I/D-cache */
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i = 0;
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asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));
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return (0);
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}
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#ifdef CONFIG_USE_IRQ
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static int cpu_init (void)
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{
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/*
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* setup up stacks if necessary
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*/
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IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
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FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
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return 0;
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}
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core_initcall(cpu_init);
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#endif
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int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
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{
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disable_interrupts ();
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reset_cpu 0;
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/* NOT REACHED */
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return 0;
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}
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@ -0,0 +1,132 @@
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#ifdef CONFIG_USE_IRQ
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/* enable IRQ interrupts */
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void enable_interrupts (void)
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{
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unsigned long temp;
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__asm__ __volatile__("mrs %0, cpsr\n"
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"bic %0, %0, #0x80\n"
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"msr cpsr_c, %0"
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: "=r" (temp)
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:
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: "memory");
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}
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/*
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* disable IRQ/FIQ interrupts
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* returns true if interrupts had been enabled before we disabled them
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*/
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int disable_interrupts (void)
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{
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unsigned long old,temp;
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__asm__ __volatile__("mrs %0, cpsr\n"
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"orr %1, %0, #0xc0\n"
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"msr cpsr_c, %1"
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: "=r" (old), "=r" (temp)
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:
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: "memory");
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return(old & 0x80) == 0;
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}
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#else
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void enable_interrupts (void)
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{
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return;
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}
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int disable_interrupts (void)
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{
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return 0;
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}
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#endif
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void bad_mode (void)
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{
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panic ("Resetting CPU ...\n");
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reset_cpu (0);
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}
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void show_regs (struct pt_regs *regs)
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{
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unsigned long flags;
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const char *processor_modes[] = {
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"USER_26", "FIQ_26", "IRQ_26", "SVC_26",
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"UK4_26", "UK5_26", "UK6_26", "UK7_26",
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"UK8_26", "UK9_26", "UK10_26", "UK11_26",
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"UK12_26", "UK13_26", "UK14_26", "UK15_26",
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"USER_32", "FIQ_32", "IRQ_32", "SVC_32",
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"UK4_32", "UK5_32", "UK6_32", "ABT_32",
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"UK8_32", "UK9_32", "UK10_32", "UND_32",
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"UK12_32", "UK13_32", "UK14_32", "SYS_32",
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};
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flags = condition_codes (regs);
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printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
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"sp : %08lx ip : %08lx fp : %08lx\n",
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instruction_pointer (regs),
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regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
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printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
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regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
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printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
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regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
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printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
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regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
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printf ("Flags: %c%c%c%c",
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flags & CC_N_BIT ? 'N' : 'n',
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flags & CC_Z_BIT ? 'Z' : 'z',
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flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
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printf (" IRQs %s FIQs %s Mode %s%s\n",
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interrupts_enabled (regs) ? "on" : "off",
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fast_interrupts_enabled (regs) ? "on" : "off",
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processor_modes[processor_mode (regs)],
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thumb_mode (regs) ? " (T)" : "");
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}
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void do_undefined_instruction (struct pt_regs *pt_regs)
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{
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printf ("undefined instruction\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_software_interrupt (struct pt_regs *pt_regs)
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{
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printf ("software interrupt\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_prefetch_abort (struct pt_regs *pt_regs)
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{
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printf ("prefetch abort\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_data_abort (struct pt_regs *pt_regs)
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{
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printf ("data abort\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_not_used (struct pt_regs *pt_regs)
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{
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printf ("not used\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_fiq (struct pt_regs *pt_regs)
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{
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printf ("fast interrupt request\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_irq (struct pt_regs *pt_regs)
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{
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printf ("interrupt request\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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