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ARM: clps711x: Add clocksource driver

This patch adds clocksource driver for CLPS711X targets and adds
support to platform to use this new driver.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Alexander Shiyan 2013-03-11 13:26:34 +04:00 committed by Sascha Hauer
parent 5976f09410
commit 9d9375e6f4
5 changed files with 92 additions and 26 deletions

View File

@ -39,6 +39,7 @@ config ARCH_BCM2835
config ARCH_CLPS711X
bool "Cirrus Logic EP711x/EP721x/EP731x"
select CLKDEV_LOOKUP
select CLOCKSOURCE_CLPS711X
select CPU_32v4T
config ARCH_EP93XX

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@ -9,25 +9,18 @@
#include <common.h>
#include <init.h>
#include <clock.h>
#include <sizes.h>
#include <asm/io.h>
#include <linux/clkdev.h>
#include <mach/clps711x.h>
#define CLPS711X_OSC_FREQ 3686400
#define CLPS711X_EXT_FREQ 13000000
static struct clk {
unsigned long rate;
} uart_clk, bus_clk;
static uint64_t clocksource_read(void)
{
return ~readw(TC2D);
}
static struct clocksource cs = {
.read = clocksource_read,
.mask = CLOCKSOURCE_MASK(16),
};
} uart_clk, bus_clk, timer_clk;
unsigned long clk_get_rate(struct clk *clk)
{
@ -50,22 +43,19 @@ EXPORT_SYMBOL(clk_disable);
static int clocks_init(void)
{
int osc, ext, pll, cpu, timer;
int pll, cpu;
u32 tmp;
osc = 3686400;
ext = 13000000;
tmp = readl(PLLR) >> 24;
if (tmp)
pll = (osc * tmp) / 2;
pll = (CLPS711X_OSC_FREQ * tmp) / 2;
else
pll = 73728000; /* Default value for old CPUs */
tmp = readl(SYSFLG2);
if (tmp & SYSFLG2_CKMODE) {
cpu = ext;
bus_clk.rate = cpu;
cpu = CLPS711X_EXT_FREQ;
bus_clk.rate = CLPS711X_EXT_FREQ;
} else {
cpu = pll;
if (cpu >= 36864000)
@ -74,25 +64,23 @@ static int clocks_init(void)
bus_clk.rate = 36864000 / 2;
}
uart_clk.rate = bus_clk.rate / 10;
uart_clk.rate = DIV_ROUND_CLOSEST(bus_clk.rate, 10);
if (tmp & SYSFLG2_CKMODE) {
tmp = readw(SYSCON2);
if (tmp & SYSCON2_OSTB)
timer = ext / 26;
timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 26);
else
timer = 541440;
timer_clk.rate = DIV_ROUND_CLOSEST(CLPS711X_EXT_FREQ, 24);
} else
timer = cpu / 144;
timer_clk.rate = DIV_ROUND_CLOSEST(cpu, 144);
tmp = readl(SYSCON1);
tmp &= ~SYSCON1_TC2M; /* Free running mode */
tmp |= SYSCON1_TC2S; /* High frequency source */
writel(tmp, SYSCON1);
clocks_calc_mult_shift(&cs.mult, &cs.shift, timer, NSEC_PER_SEC, 10);
return init_clock(&cs);
return 0;
}
core_initcall(clocks_init);
@ -100,6 +88,7 @@ static struct clk_lookup clocks_lookups[] = {
CLKDEV_CON_ID("bus", &bus_clk),
CLKDEV_DEV_ID("clps711x_serial0", &uart_clk),
CLKDEV_DEV_ID("clps711x_serial1", &uart_clk),
CLKDEV_DEV_ID("clps711x-cs", &timer_clk),
};
static int clkdev_init(void)
@ -109,3 +98,13 @@ static int clkdev_init(void)
return 0;
}
postcore_initcall(clkdev_init);
static const char *clps711x_clocksrc_name = "clps711x-cs";
static __init int clps711x_core_init(void)
{
add_generic_device(clps711x_clocksrc_name, DEVICE_ID_SINGLE, NULL,
TC2D, SZ_2, IORESOURCE_MEM, NULL);
return 0;
}
coredevice_initcall(clps711x_core_init);

View File

@ -10,6 +10,10 @@ config CLOCKSOURCE_BCM2835
bool
depends on ARCH_BCM2835
config CLOCKSOURCE_CLPS711X
bool
depends on ARCH_CLPS711X
config CLOCKSOURCE_NOMADIK
bool
depends on ARM

View File

@ -1,4 +1,5 @@
obj-$(CONFIG_AMBA_SP804) += amba-sp804.o
obj-$(CONFIG_ARM_SMP_TWD) += arm_smp_twd.o
obj-$(CONFIG_CLOCKSOURCE_BCM2835) += bcm2835.o
obj-$(CONFIG_CLOCKSOURCE_CLPS711X) += clps711x.o
obj-$(CONFIG_CLOCKSOURCE_NOMADIK) += nomadik.o

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@ -0,0 +1,61 @@
/*
* Copyright (C) 2013 Alexander Shiyan <shc_work@mail.ru>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*/
#include <common.h>
#include <clock.h>
#include <io.h>
#include <init.h>
#include <linux/clk.h>
#include <linux/err.h>
static __iomem void *clps711x_timer_base;
static uint64_t clps711x_cs_read(void)
{
return ~readw(clps711x_timer_base);
}
static struct clocksource clps711x_cs = {
.read = clps711x_cs_read,
.mask = CLOCKSOURCE_MASK(16),
};
static int clps711x_cs_probe(struct device_d *dev)
{
u32 rate;
struct clk *timer_clk;
timer_clk = clk_get(dev, NULL);
if (IS_ERR(timer_clk))
return PTR_ERR(timer_clk);
rate = clk_get_rate(timer_clk);
clps711x_timer_base = dev_request_mem_region(dev, 0);
if (!clps711x_timer_base) {
clk_put(timer_clk);
return -ENOENT;
}
clocks_calc_mult_shift(&clps711x_cs.mult, &clps711x_cs.shift, rate,
NSEC_PER_SEC, 10);
return init_clock(&clps711x_cs);
}
static struct driver_d clps711x_cs_driver = {
.name = "clps711x-cs",
.probe = clps711x_cs_probe,
};
static __init int clps711x_cs_init(void)
{
return platform_driver_register(&clps711x_cs_driver);
}
coredevice_initcall(clps711x_cs_init);